HCL and ALU

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Overview of Logic Design

Fundamental Hardware Requirements

– Communication: How to get values from one place to another

– Computation

– Storage

Bits are Our Friends

– Everything expressed in terms of values 0 and 1

– Communication

• Low or high voltage on wire

– Computation

• Compute Boolean functions

– Storage

• Store bits of information

Digital Signals

– Use voltage thresholds to extract discrete values from

continuous signal

– Simplest version: 1-bit signal• Either high range (1) or low range (0)

• With guard range between them

– Not strongly affected by noise or low quality circuit

elements• Can make circuits simple, small, and fast

Voltage

Time

0 1 0

HCL (hardware control language)

HCLHCL

-- Describes the control logic of different processor design.

Logic Gate Types Logic Gate Types

-- Logic gates are always active

- Input → ... time → output

Voltage

Time

a

ba && b

Rising Delay Falling Delay

Combinational Circuits and HCL

Combinational circuitCombinational circuit

-- Combination of logic gates

- Output cannot be connected together

- Acyclic

Combinational circuit to test for bit equalityCombinational circuit to test for bit equality

- The output will equal 1 when both inputs are 0, or both are 1.

HCL code : Bool eq = (a && b) || (!a && !b)

Combinational Circuits and HCL

MultiplexorMultiplexor

- Sets a value depending on a control input signal

- The output will equal a when s is 1, and b when s is 0.

HCL code : Bool out = (s && a) || (!s && b)

Combinational Circuits and HCL

HCL versus CHCL versus C

- Change occurs over time

- There is no real assignment, just assignment to expressions

- Expressions cannot be partially evaluated

Example:

(a && !a) && func(b,c)

Combinational Circuits and HCL

WordWord--level equality test circuitlevel equality test circuit

HCL code : Bool EQ = ( A == B)

Combinational Circuits and HCL

WordWord--level multiplexorlevel multiplexor

HCL

(case expression)

- 1 stands for default

Combinational Circuits and HCL

MuxMux 44

int Out4 = [

!s1 && !s0 : A;

!s1 : B;

s1 && !s0 : C;

1 : D;

];

Min Min 33

int Min3 = [

A <= B && A <= C : A;

B <= A && B <= C : B;

1 : C;

];

OFZFCF

OFZFCF

OFZFCF

OFZFCF

Arithmetic Logic Unit

Combinational logicContinuously responding to inputs

Control signal selects function computedCorresponding to 4 arithmetic/logical operations in Y86

Also computes values for condition codes

A

L

U

Y

X

X + Y

0

A

L

U

Y

X

X - Y

1

A

L

U

Y

X

X & Y

2

A

L

U

Y

X

X ^ Y

3

A

B

A

B

A

B

A

B

The basic ALU provides the basic logical and arithmetic functions: AND, OR plus addition.

Shift, multiplication and division are usually outside the basic ALU.

Logical operations

1 bit logical unit for AND/OR operations

select (AND or OR)

result

0

1

MUX

a

b

Basic ALU (Combinational Circuit)

The ALU

ALU includes combinational logic.– Combinational logic a change in inputs directly causes a change

in output, after a characteristic delay.

– Different from sequential logic which only changes on the clock.

Two major components of combinational logic are –multiplexors & decoders.

0

1

2

3

4

5

6

7

c

3 X 8 multiplexor

s1s2

0

1

2

3

4

5

6

7

DECODER

0

1

2

3 X 8 Decoder

s0

a b Cin sum Cout

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

inputs outputs

sum = (a b Cin) + (a b Cin) + (a b Cin)

+ (a b Cin) = a + b + Cin

Cout =(b Cin) + (a Cin) + (a b)

= ((a + b) Cin) + (a b)

a

b

Cout

Cin

Adder hardware for Cout

in 2 layers

1 bit FULL adder (3,2)

a b

CinCout

sum

Carry inCarry out

Full Adder from Half Adders

Half adder

Full adder from 2 half adders + or gate

a

b

Cout

sum

Cin

a

b

Cout

sum

1 bit simple ALU for logical / arithmetic operations

a

b

select

result

0

1

2+

2

Cin

Cout

1 Bit Simple ALU

Enhanced for subtraction

a

b

select

result

0

1

2+

2

Cin

Cout

invert

1's complement

2's complement: use Cin = 1

subtraction: a + b + 1 = a + (b + 1) = a + (-b) = a - b

0

1

1 Bit Enhanced ALU

Ripple Carry Type Adder

To produce a 32 bit result, we

connect 32 single bit units

together.

This type of ALU adder is called a

ripple adder

– Carry bits are generated in

sequence.

– Bit 31 result and Cout is not correct

until it receives Cin from previous

unit, which is not correct until it

receives Cin from its previous unit,

etc.

– Total operation time is proportional

to word size (here 32).

a0

b0

result 0

Cin

Cout

Cin

ALU0

Cout

Cin

ALU1

Cout

Cin

ALU2

Cout

Cin

ALU31

Cout

.

.

.

a1

b1

a2

b2

a31

b31

result 1

result 2

result 31

.

.

.

operation = invert

+ select

32 bit ADDER with ripple carry:

3