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Harnessing Multicore Processors for High Speed Secure Transfer Raj Kettimuthu Argonne National Laboratory

Harnessing Multicore Processors for High Speed Secure Transfer

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Raj Kettimuthu Argonne National Laboratory. Harnessing Multicore Processors for High Speed Secure Transfer. Security. Clear No security at all Authentication Verify the connection only, data is clear Integrity Verify each packet, data is clear High processing requirements Private - PowerPoint PPT Presentation

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Page 1: Harnessing Multicore Processors for High Speed Secure Transfer

Harnessing Multicore Processors for High Speed

Secure Transfer

Raj KettimuthuArgonne National Laboratory

Page 2: Harnessing Multicore Processors for High Speed Secure Transfer

Security

Clear No security at all

Authentication Verify the connection only, data is clear

Integrity Verify each packet, data is clear High processing requirements

Private Encrypt all data Very high processing requirements

Page 3: Harnessing Multicore Processors for High Speed Secure Transfer

Security

Security context Includes a symmetric key Associated with each TCP connection Used for faster security processing

Cipher Block Chaining TLS/SSL, GSI, etc Previously encrypted cipher text is used in the encryption of the current block

Cannot parallelize

Page 4: Harnessing Multicore Processors for High Speed Secure Transfer

High Performance Transfers

True security makes the CPU the bottleneck Thus auth or clear are selected there is no data integrity

Post transfer checksums Used to verify data once transfer completes Should be considered part of transfer time Less efficient (most re-open and read data) cannot parallelize

Page 5: Harnessing Multicore Processors for High Speed Secure Transfer

Parallel Streams

Multiple TCP streams between endpoints Network optimization Used to work around TCP backoff

A security context with each stream Can use to parallelize security processing

Each stream has own context cipher block chain associated with that context

Page 6: Harnessing Multicore Processors for High Speed Secure Transfer

Multiple Cores

Up coming technologies Quad core commodity Future will bring .....

Parallel processing power No increase in memory No increase in bus bandwidth No increase in NIC bandwidth

Increases the ratio of processing power to network speed

Page 7: Harnessing Multicore Processors for High Speed Secure Transfer

Transfer Resources and Streams

Memory needed is a function of BWDP

BWDPtotal = RTT * BW

Parallel streams do not increase the BDWP Each stream shares an equal portion

BWDPstream = RTT * (BW/|streams|)

Required resources are not a function of |streams| memory is function of BWDP bus/disk/NIC speed is a function of transfer rate

Page 8: Harnessing Multicore Processors for High Speed Secure Transfer

Full Encryption

Perfect application of multiple cores 1 stream per processor Allows parallelism of security processing Requires a core, but no more memory Results show linear or close to linear increase on different dual-core architectures

Some interesting results on dual-core architectures with hyper threading

Page 9: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Pentium Dual Core 1.1 GHz

Security

Level

Single

P1

Single

P2

Pool

P1

Pool

P2

Clear 814 818 816 818

Authenticated

812 814 813 816

Safe 169 178 164 285

Private 76 78 75 138

Page 10: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Itanium Dual Core 1.2 GHz

Security

Level

Single

P1

Single

P2

Pool

P1

Pool

P2

Clear 903 905 903 906

Authenticated

899 899 899 899

Safe 488 517 488 770

Private 177 183 177 340

Page 11: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Opteron 64 bit Dual Core 2.4 GHz

Security

Level

Single

P1

Single

P2

Pool

P1

Pool

P2

Clear 897 897 897 897

Authenticated

897 897 897 897

Safe 254 268 254 471

Private 100 101 100 196

Page 12: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Xeon dual core 2.8 GHz with hyper threading Safe

0

100

200

300

400

500

600

700

1 2 3 4

Thread Count

Throughput in Mbit/s

p=1p=2p=3p=4

Page 13: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Xeon dual core 2.8 GHz with hyper threading

Priv

0

50

100

150

200

250

300

1 2 3 4

Thread Count

Throughput in Mbit/s

p=1p=2p=3p=4

Page 14: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Opteron dual core 1GHz with hyper threading Safe

0

100

200

300

400

500

600

700

800

900

1 2 3 4

Thread Count

Throughput in Mbit/s

p=1

p=2

p=3

p=4

Page 15: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Opteron dual core 1GHz with hyper threading

Priv

0

50

100

150

200

250

300

350

400

450

1 2 3 4

Thread Count

Throughput in Mbit/s

p=1

p=2

p=3

p=4

Page 16: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Experiments to see the effect of high thread count and high number of parallel streams

|Stream| > min(|CPU|, |Thread|) does not fetch much benefit

|Thread| > |CPU| does not fetch any benefit - it seems to hurt the performance

Page 17: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Clear

0

100

200

300

400

500

600

700

800

900

1000

1 2 4 8 16 32 64

Thread Count

Throughput in Mbit/s

p=1

p=2

p=4

p=8

p=16

p=32

p=64

Page 18: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Auth

0

100

200

300

400

500

600

700

800

900

1000

1 2 4 8 16 32 64

Thread Count

Throughput in Mbit/s

p=1

p=2

p=4

p=8

p=16

p=32

p=64

Page 19: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Safe

0

100

200

300

400

500

600

1 2 4 8 16 32 64

Thread Count

Throughput in Mbit/s

p=1

p=2

p=4

p=8

p=16

p=32

p=64

Page 20: Harnessing Multicore Processors for High Speed Secure Transfer

Results

Priv

0

50

100

150

200

250

1 2 4 8 16 32 64

Thread Count

Throughput in Mbit/s

p=1

p=2

p=4

p=8

p=16

p=32

p=64

Page 21: Harnessing Multicore Processors for High Speed Secure Transfer

Stripes Striping to extrapolate for higher number of

cores 4 way striping with dual cores on each stripe Results show that 6 cores may be sufficient to

get a throughput for fully encrypted transfers that is equivalent to that of a clear transfer with Gigabit NICs Intel Xeon dual core 2.4 GHz

2 way stripe with 1 thread per stripe is better than 1 way stripe with 2 threads Suspected cause is availability of 2 Gigabit NICs for 2 way stripe

Need to do more tests to verify this

Page 22: Harnessing Multicore Processors for High Speed Secure Transfer

Stripes

Striping

0

200

400

600

800

1000

1200

1400

1600

1800

S1,C1 S1,C2 S2,C2 S3,C3 S2,C4 S4,C4 S3,C6 S4,C8

Stripe/CPU Count

Throughput in Mbit/s

Clear

Auth

Safe

Priv

Page 23: Harnessing Multicore Processors for High Speed Secure Transfer

Stripes

S1,C2

S2,C2