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Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

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Page 1: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Hardware Logic Diagrams - The Basics -

Marshall Thomas CIS 21JA – Fall Quarter 2012

Page 2: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Objectives

• Explain some hardware concepts at a high level – appropriate for ASM SW Engineers.

• Show the graphical pictures that the hardware folks use to describe logic diagrams.

• Show how De Morgan’s theorem can be represented graphically.

• Explain the equations and “what is going on” in Lab 5

Page 3: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Terminology• “High” => High voltage or “true” or “1”• “Low” => Low voltage or “false” or “0”.• These mean the same: => high, true, logical “1”

=> low, false, logical “0”.• A means: A is true when it is low, sometimes

written *A (over_scores are hard to type), not the same meaning as !A

• AdressBit0 means that AddressBit0 is true when this voltage is “false”, not the same in as !AddressBit0.

Page 4: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Voltage Levels

• There is uncertainty between what is “sent” and what is “received”.

• This uncertainty can and does happen! This is a problem for hardware folks.

Page 5: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Inversion at every gate

• This is “how the hardware works”• This is the fastest way• If there is an inverted and a non-inverted

output, the inverted output is faster• Easiest example is an “open collector” output

R

Input output

+5V

Page 6: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Basic Gates / Symbols

• AND

• OR

• INVERTER

• NAND

• NOR

Page 7: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

NAND / “OR” Duality• NAND Gate :

• If it takes two “highs” to get “low”. Doesn’t that mean that any low on any input input gives a high on the output?

• So, another way to draw the exact same hardware part is:

Page 8: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

NOR / “AND” Duality

• NOR Gate: • If any high gives a low, then doesn’t

it take all low’s to give a high?• Another way to draw the exact same

physical part:

Page 9: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

De Morgan’s Theorem

• A or B A and B

• A and B A or B

• Swap the bubbles and the symbols

Page 10: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

XOR• Many students freak out about XOR, but is it

not that complicated!• If the 2 inputs are the same:

you get ”false”, 0, or “even” • If the 2 inputs are different:

you get “true”, 1 or “odd”. • It is as simple as that – think “odd” or “even”

• This simple thing can be used for numeric addition, calculating parity (the number of even or odd bits that are turned on in an variable), and even polynomial division!

Page 11: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Half Adder• XOR Version

• Gate Version (same)

AB Sum

Carry

A B sum

Carry

0 0 0 0

1 1 0 1

1 0 1 0

0 1 1 0

Even

Odd

AB Sum

Carry

Sum = (A+B) and ABSum is “1” if A or B is true, unless: A and B

are both true,Then sum=0 with carry

Page 12: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Full Adder• Incorporates the Carryin

• This combines 2 half-adders with an “or”ABCin

Sum

Cout = (A and B) or ( (A xor B) and Cin))Cout= ab + bc + ac

Cout

Note: all Nand gates

Sum=1 if A,B,C

Are odd

Page 13: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Cout= ab + bc + ac• The cascading XOR’s can do the sum:

Sum is “1” if combination of (A,B,C) is odd, else sum is “0”

• 1+1 = 0 (sum is even) with carry1+1+1= 1 (sum is odd) with carry

• The tricky part is the carry.• We are adding 3 bits together, if any

2 of these bits are “1”, we get a carry.If all 3 are “1”, we still get a carry although the sum is different.

Page 14: Hardware Logic Diagrams - The Basics - Marshall Thomas CIS 21JA – Fall Quarter 2012

Full AdderTruth Table A B Cin Sum 2 bit

sumCout

0 0 0 0 00 0

0 1 1 0 10 1

1 0 1 0 10 1

1 1 0 0 10 1

0 0 1 1 01 0

0 1 0 1 01 0

1 0 0 1 01 0

1 1 1 1 11 1

Even => Sum =0

Odd => Sum =1

Cout if any 2 inputs are “1”