GUJARAT TECHNOLOGICAL UNIVERSITY COMPUTER …1 Explain 1st pass of an assembler. 2 Explain 2nd pass of an assembler. 3 Write an assembly language program to add 10 numbers from memory

GUJARAT TECHNOLOGICAL UNIVERSITY

COMPUTER ENGINEERING (07), INFORMATION TECHNOLOGY (16) &

INFORMATION & COMMUNICATION TECHNOLOGY (32) COMPUTER ORGANIZATION

SUBJECT CODE: 2140707

B.E. 4th SEMESTER

Type of Course: NA

Prerequisite: Basic Understanding of Computer System

Rationale: NA

Teaching and Examination Scheme:

Teaching Scheme Credits Examination Marks Total

Marks L T P C Theory Marks Practical Marks

ESE

(E)

PA (M) ESE (V) PA

(I) PA ALA ESE OEP

4 1 0 5 70 20 10 30 0 20 150

Content:

Sr.

No. Topics

Teaching

Hrs.

Module

Weightage

1

Computer Data Representation

Basic computer data types, Complements, Fixed point representation,

Register Transfer and Micro-operations:

Floating point representation, Register Transfer language, Register

Transfer, Bus and Memory Transfers (Tree-State Bus Buffers,

Memory Transfer), Arithmetic Micro-Operations, Logic Micro-

Operations, Shift Micro-Operations, Arithmetic logical shift unit

6 10

2

Basic Computer Organization and Design

Instruction codes, Computer registers, computer instructions, Timing

and Control, Instruction cycle, Memory-Reference Instructions, Input-

output and interrupt, Complete computer description, Design of Basic

computer, design of Accumulator Unit.

4 10

3

Programming The Basic Computer

Introduction, Machine Language, Assembly Language, assembler,

Program loops, Programming Arithmetic and logic operations,

subroutines, I-O Programming.

4 10

4

Micro programmed Control:

Control Memory, Address sequencing, Micro program Example,

design of control Unit

3 5

5

Central Processing Unit

Introduction, General Register Organization, Stack Organization,

Instruction format, Addressing Modes, data transfer and

manipulation,Program Control, Reduced Instruction Set Computer

(RISC)

4 15

6

Pipeline And Vector Processing

Flynn's taxonomy, Parallel Processing, Pipelining, Arithmetic Pipeline,

Instruction, Pipeline, RISC Pipeline, Vector Processing, Array

Processors

3 10

7

Computer Arithmetic

Introduction, Addition and subtraction, Multiplication Algorithms

(Booth Multiplication Algorithm), Division Algorithms, Floating Point

Arithmetic operations, Decimal Arithmetic Unit.

4 10

8

Input-Output Organization

Input-Output Interface, Asynchronous Data Transfer, Modes Of

Transfer, Priority Interrupt, DMA, Input-Output Processor (IOP),

CPUIOP Communication, Serial communication.

4 10

9

Memory Organization

Memory Hierarchy, Main Memory, Auxiliary Memory, Associative

Memory, Cache Memory, Virtual Memory.

2 10

10

Multipreocessors

Characteristics of Multiprocessors, Interconnection Structures, Inter-

processor Arbitration, Inter-processor Communication and

Synchronization, Cache Coherence, Shared Memory Multiprocessors.

4 10

Suggested Specification table with Marks (Theory):

Distribution of Theory Marks

R Level U Level A Level N Level E Level

Legends: R: Remembrance; U: Understanding; A: Application, N: Analyze and E: Evaluate and above Levels

(Revised Bloom’s Taxonomy)

Note: This specification table shall be treated as a general guideline for students and teachers. The actual

distribution of marks in the question paper may vary slightly from above table.

Reference Books:

1. M. Morris Mano, Computer System Architecture, Pearson

2. Andrew S. Tanenbaum and Todd Austin, Structured Computer Organization, Sixth Edition, PHI

3. M. Murdocca & V. Heuring, Computer Architecture & Organization, WILEY

4. John Hayes, Computer Architecture and Organization, McGrawHill

Course Outcomes:

After successful completion of the course students should be able to:

1. To apply knowledge of the processor’s internal registers and operations by use of a

2. PC based microprocessor simulator.

3. To write assembly language programs and download the machine code that will

4. provide solutions real-world control problems.

5. To eliminate or remove stall by altering order of instructions

6. To write programs using the capabilities of the stack, the program counter, the status register and

show how these are used to execute a machine code program.

List of Tutorial:

1) A digital computer has a common bus system for 16 registers of 32 bits each. The bus is

constructed with multiplexers.

How many selection inputs are there in each multiplexer ?

What size of multiplexers are needed ?

How many multiplexers are there in the bus ?

2) The following transfer statements specify a memory. Explain the memory operation in each case.

R2 M[AR]

M[AR]R3

R5M[R5]

3) The adder-subtractor circuit of Fig 4.7 has the following values for input mode M and data

inputs A and B. In each case, determine the values of the outputs : S3, S2,

S1, S0 and C4.

M A B

a. 0 0111 0110

b. 0 1000 1001

c. 1 1100 1000

d. 1 0101 1010

e. 1 0000 0001

4) Design a 4-bit combinational circuit decrementer using four full-adder circuits.

5) Design a digital circuit that performs the four logic operations of exclusive-OR, exclusive-NOR,

NOR, and NAND. Use two selection variables. Show the logic diagram of one typical stage.

6) Register A holds the 8bit binary 11011001. Determine the B operand and the logic

microoperation to be performed in order to change the value in A to :

f. 01101101

g. 11111101

7) The 8bit registers AR, BR, CR and DR initially have the following values :

AR = 11110010

BR = 11111111

CR = 10111001

DR = 11101010

8) Determine the 8bit values in each register after the execution of the following sequence of

microoperations.

AR AR + BR

CR CR Λ DR, BR BR + 1

AR AR – CR

9) An output program resides in memory starting from address 2300. It is executed after the

computer recognizes an interrupt when FGO becomes a 1

(while IEN = 1).

a. What instruction must be placed at address 1 ?

b. What must be the last two instruction of the output program ?

10) Write an assembly level program for the following pseudocode.

SUM = 0

SUM = SUM + A + B

DIF = DIF – C

SUM = SUM + DIF

11) Write a program loop using a pointer and a counter to clear the contents

of hex locations 500 to 5FF with 0.

12) Write an ALP to add two Double-Precision numbers.

13) Write a program that evaluates the logic ex-or of two logic operands.

14) Write a program for the arithmetic shift-left operation. Branch to OVF if an overflow occurs.

15) For the given program below :

1. Explain in words what the program accomplishes when it is executed. What is the value of

location CTR when the computer halts ?

2. List the address symbol table obtained during the first pass of the assembler.

ORG 100

CLE

CLA

STA CTR

LDA WRD

SZA

BUN ROT

BUN STP

ROT, CIL

SZE

BUN AGN

BUN ROT

AGN, CLE

ISZ CTR

SZA

BUN ROT

STP, HLT

CTR, HEX 0

WRD, HEX 62C1

16) Write a subroutine to subtract two numbers. In the calling program, the BSA instruction is followed

by the subtrahend and minuend. The difference is returned to the main program in the third location

following the BSA instruction.

17) Convert the following into reverse polish notation.

1) A+B*[C*D+E*(F+G)]

2) A*[B+C*(D+E)] / [F+G*(H+I)]

18) Explain Stack and evaluate the following expression using stack

(3+4)*[10(2+6)+8]

List of Open Source Software/learning website:

NPTEL Lecture Series

http://www.intel.com/pressroom/kits/quickreffam.htm

web.stanford.edu/class/ee282/

http://www.intel.com/pressroom/kits/quickreffam.htm

ACTIVE LEARNING ASSIGNMENTS: Preparation of power-point slides, which include videos,

animations, pictures, graphics for better understanding theory and practical work – The faculty will allocate

chapters/ parts of chapters to groups of students so that the entire syllabus to be covered. The power-point

slides should be put up on the web-site of the College/ Institute, along with the names of the students of the

group, the name of the faculty, Department and College on the first slide. The best three works should submit

to GTU.

Laxmi Institute of Technology, Sarigam Department of Information Technology

Academic Year: 2018-19 ASSIGNMENT: 1

Name of Subject : COMPUTER ORGANIZATION

Subject Code : 2140707

Unit: 1 Computer Data Representation

Sr. No. Name of Question Remarks

1 Show the block diagram of the hardware that implements the following register transfer statements:

yT2: R2R1

2 Design and explain common bus system using multiplexer. 3 Explain Arithmetic logical shift unit. 4 Explain Binary adder-subtractor. 5 Explain Arithmetic Circuit. 6 How negative integer number represented in memory? Explain with suitable

example.

7 Explain shift micro operations and Draw neat and clean diagram for 4- bit combinational circuit shifter.

8 Explain following operations. Selective Set, Selective Clear, Selective Complement, Mask, Insert, Clear

9 Explain Three state Bus Buffer

Name & Sign of Subject In-charge: Kavita Joshi





Unit: 2 Basic Computer Organizations and Design


1 Give the basic computer instruction format and explain memory reference register, register reference and input output instructions.

2 Discuss the phase of instruction cycle 3 Explain BSA instruction with example. 4 Explain ISZ , LDA, STA and BUN instruction. 5 Explain the types of interrupts. 6 What is the difference between direct and indirect address instruction. 7 Derive the control gates for address register. 8 Explain Interrupt cycle. 9 Derive the control gates for PC.

10 Draw a flowchart describing complete computer operation.






Unit: 3 Programming The Basic Computer


1 Explain 1st pass of an assembler. 2 Explain 2nd pass of an assembler. 3 Write an assembly language program to add 10 numbers from memory. 4 Write a program to add two double precision number. 5 Write an assembly language program to multiply two numbers. 6 Explain subroutine and write a program demonstrating use of subroutine. 7 Explain program interrupt and write a interrupt service routine for addition.






Unit: 4 Micro programmed Control


1 Define: microoperation, microprogram, microinstruction. 2 Explain difference between hardwired control & microprogrammed control. 3 Explain mapping. 4 Explain address sequencing. 5 Explain micro program sequencer. 6 Explain Design of control unit.



Academic Year: 2018-19

COMPUTER ORGENIZATION

Question Bank: 1. Show the block diagram of the hardware that implements the following register transfer statements: 2. Design and explain common bus system using multiplexer. 3. Explain Arithmetic logical shift unit. 4. Explain Binary adder-subtractor. 5. Explain Arithmetic Circuit. 6. Give the basic computer instruction format and explain memory reference register, register reference and input output instructions. 7. Discuss the phase of instruction cycle.

8. Explain BSA instruction with example.

9. Explain ISZ instruction.

10. Explain the types of interrupts.

11. What is the difference between direct and indirect address instruction.

12. Derive the control gates for address register.

13. Explain Interrupt cycle.

14. Derive the control gates for PC.

15. Draw a flowchart describing complete computer operation.

16. Explain 1st pass of an assembler.

17.Explain 2nd pass of an assembler.

18. Write an assembly language program to add 10 numbers from memory.

19. Write a program to add two double precision number.

20.Write an assembly language program to multiply two numbers.

21. Explain subroutine and write a program demonstrating use of subroutine.


Academic Year: 2018-19 22.Explain program interrupt and write a interrupt service routine for addition.

23. Define: microoperation, microprogram, microinstruction

24.Explain difference between hardwired control & microprogrammed control.

25. Explain mapping.

26. Explain address sequencing.

27. Explain micro program sequencer.

28. Explain Design of control unit.

29.What is register stack? Explain push and pop micro-operations.

30. Explain memory stack.

31. Explain types of in instruction formats.

32.Explain Addressing modes

33.Elaborate Flynn’s classification for computers.

34.Explain RISC Pipeline

35.Explain Parallel Processing

36.Explain Array Processors

37.Explain pipelining technique. Draw the general structure of four segment pipeline.

38.Explain Booth’s algorithm.

39.Draw flow chart for multiplication of two floating point numbers.

40.Draw a flowchart of division algorithm.

41. Explain asynchronous data transfer using timing diagrams.

42.Write a detailed note on Direct Memory Access (DMA).

43.Explain Serial Communication.

44.How main memory is useful in computer system? Explain the memory address map of RAM and ROM. 45.Content Addressable Memory: Explain


Academic Year: 2018-19 46.Discuss associative mapping and direct mapping in organization of cache memory. 47.Explain Memory Hierarchy. 48.Explain Virtual Memory. 49.What do you mean by address space and memory space in virtual memory?Also explain the relation between address space and memory space in virtual memory. 50.Describe cache coherence problem and its solutions in detail. 51.Explain Inter-processor Communication 52.State Characteristics of Multiprocessor.

Laxmi Institute of Technology , Sarigam Approved by AICTE, New Delhi; Affiliated to Gujarat Technological University,

Ahmedabad Academic Year 2018-19

Centre Code: 086 Examination : MID-EXAM_1-2019 Branch: IT Semester: 4th Sub Code:

2140707 Sub: Computer Organization

Date: 31-01-2019 Time: 9:00 AM – 10:00 AM

Marks: 20

Q-1 Draw neat diagram and explain Instruction Cycle. [5] Q-2 Explain Arithmetic Circuit. [5] Q-3 Explain tri-state buffer. [3] Q-4 Draw the block diagram of control unit of basic computer. [4] OR Q-4 List and explain types of shift operations. [4] Q-5 Explain any two Memory Reference Instruction. [3] OR Q-5 Draw and explain basic computer instruction format. [3] *****ALL THE BEST*****

Laxmi Institute of Technology , Sarigam Approved by AICTE, New Delhi; Affiliated to Gujarat Technological University,

Ahmedabad Academic Year 2018-19

Centre Code: 086 Examination : MID-EXAM_1-2019 Branch: IT Semester: 4th Sub Code:

2140707 Sub: Computer Organization

Date: 31-01-2019 Time: 9:00 AM – 10:00 AM

Marks: 20

Q-1 Draw neat diagram and explain Instruction Cycle. [5] Q-2 Explain Arithmetic Circuit. [5] Q-3 Explain tri-state buffer. [3] Q-4 Draw the block diagram of control unit of basic computer. [4] OR Q-4 List and explain types of shift operations. [4] Q-5 Explain any two Memory Reference Instruction. [3] OR Q-5 Draw and explain basic computer instruction format. [3] *****ALL THE BEST*****

1

Seat No.: ________ Enrolment No.___________

GUJARAT TECHNOLOGICAL UNIVERSITY BE - SEMESTER–IV (NEW) - EXAMINATION – SUMMER 2018

Subject Code:2140707 Date:24/05/2018 Subject Name:Computer Organization Time:10:30 AM to 01:00 PM Total Marks: 70 Instructions:

1. Attempt all questions. 2. Make suitable assumptions wherever necessary. 3. Figures to the right indicate full marks.

MARKS

Q.1 (a) How negative integer number represented in memory? Explain with

suitable example. 03

(b) Explain floating point representation. 04

(c) Explain shift micro operations and Draw neat and clean diagram for 4-

bit combinational circuit shifter. 07

Q.2 (a) Explain 1) LDA 2) STA 3) ISZ instructions. 03

(b) Explain DMA operation. 04

(c) Draw block diagram of Control unit of basic computer and explain it. 07

OR

(c) What is instruction cycle? Draw Flowchart for Instruction cycle and

explain it. 07

Q.3 (a) List out types of interrupt. Explain any one. 03

(b) List out address sequencing capabilities required in control memory. 04

(c) Explain instruction format with example. 07

OR

Q.3 (a) Write short note on RISC . 03

(b) Differentiate hardwired control and micro programmed control

architecture. 04

(c) List out addressing mode of instructions and explain with example. 07

Q.4 (a) What is cache coherence? 03

(b) Explain pipeline processing conflict. 04

(c) Explain Flynn’s classification. 07 OR

Q.4 (a) What is cache miss and cache hit? 03

(b) Explain the significance of every bit of Program Status Word (PSW). 04

(c) What is speedup? Derive the equation of speedup for k-segment

pipeline processing for task. 07

Q.5 (a) State the differences between register stack and memory stack. 03

(b) Differentiate isolated I/O and memory mapped I/O. 04

(c) Draw flowchart hardware multiplication algorithm and explain it. 07

OR

Q.5 (a) What is tightly coupled and loosely coupled multiprocessor

architecture. 03

(b) Differentiate Programmed I/O and Interrupt initiated I/O 04

(c) Draw and explain shared memory architecture of multiprocessor

system. 07

*************

1


GUJARAT TECHNOLOGICAL UNIVERSITY BE - SEMESTER–IV (NEW) EXAMINATION – WINTER 2017

Subject Code: 2140707 Date:21/11/2017 Subject Name: Computer Organization Time: 02:30 PM TO 05:00 PM Total Marks: 70 Instructions:

1. Attempt all questions.

2. Make suitable assumptions wherever necessary.

3. Figures to the right indicate full marks.

Q.1 (a) What is a Digital Computer System? Explain the role of binary number system

in it. 03

(b) Define RTL. Give an example of register transfer of data through accumulator. 04

(c) What is Register Stack? Explain it with example 07

Q.2 (a) Explain the role if tri-state buffer with example. 03

(b) Write micro operations for ADD instruction. 04

(c) What is multiplexing? Explain the multiplexing of control signals in ALU. 07

OR

(c) List and explain types of shift operations on accumulator. 07

Q.3 (a) What is Interrupt? How it is useful for a system? 03

(b) Differentiate MRI and non-MRI. 04

(c) Write an ALP for multiplying 3 integers stored in register stack. 07

OR

Q.3 (a) What is machine language? How it differs from assembly language? 03

(b) List various addressing modes. Explain any TWO with example. 04

(c) Explain instruction fetching, decoding and executing in pipeline processing. 07

Q.4 (a) What is PSW? Explain each bit of it. 03

(b) Draw flow graph of second pass of assembler. 04

(c) Differentiate synchronous and asynchronous data transfer with examples. 07 OR

Q.4 (a) Signify the cache coherence in memory. 03

(b) What is micro-programmed control architecture? 04

(c) What is the use of IOP? Explain its communication with CPU. 07

Q.5 (a) How virtual memory helps in increasing the storage capacity of a system? 03

(b) Give the use and role of CAM. 04

(c) Draw and explain shared memory architecture of multiprocessor system 07

OR

Q.5 (a) Explain the role of associative memory. 03

(b) Differentiate tightly coupled and loosely coupled systems. 04

(c) Give the features of a multiprocessor system. 07

*************

1


GUJARAT TECHNOLOGICAL UNIVERSITY BE - SEMESTER–IV (NEW) - EXAMINATION – SUMMER 2017

Subject Code: 2140707 Date: 06/06/2017 Subject Name: Computer Organization Time: 10:30 AM to 01:00 PM Total Marks: 70 Instructions:

1. Attempt all questions. 2. Make suitable assumptions wherever necessary. 3. Figures to the right indicate full marks.

MARKS

Q.1 Short Questions 14

1 Define term RTL.

2 What is computer organization?

3 Define Term: Sequencer.

4 Explain Immediate instruction.

5 Explain Delay load.

6 What is PSW (flag).

7 Define Assembler.

8 Give any three feature of CISC

9 Explain term: Pipeline Conflict.

10 Explain Accumulator.

11 What is register stack?

12 Give three Advantage of CD-ROM.

13 Explain Micro operation.

14 Define pseudo instruction.

Q.2 (a) Explain Gray Code. 03

(b) Write note on memory interleaving 04

(c) Explain Instruction cycle with flowchart. 07

OR

(c) Explain first pass of an assemble with flowchart. 07

Q.3 (a) Explain CLA, ISZ, INP instruction. 03

(b) Compare SIMD and MIMD. 04

(c) Explain control unit of basic computer and its working

with diagram.

07

OR

Q.3 (a) Explain vector operation. 03

(b) Explain Direct mapping cache. 04

(c) Explain different addressing mode with example.

07

Q.4 (a) Explain characteristics of RISC. 03

2

(b) Explain Daisy chain arbitration. 04

(c) Explain BCD Adder with its block diagram 07

OR

Q.4 (a) Explain push and pop operation on stack. 03

(b) Compare SRAM and DRAM. 04

(c) Explain Booth’s algorithm with flowchart. 07

Q.5 (a) Explain parallel processing. 03

(b) Explain different types of Interrupts. 04

(c) Explain paging and address translation with example. 07

OR

Q.5 (a) Explain subroutine call and return with micro-operation. 03

(b) Explain Flynn’s classification of computer. 04

(c) Explain Inter-process communication 07

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GUJARAT TECHNOLOGICAL UNIVERSITY COMPUTER …1 Explain 1st pass of an assembler. 2 Explain 2nd pass of an assembler. 3 Write an assembly language program to add 10 numbers from memory