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Journal of VLSI Signal Processing 36, 5–6, 2004c© 2004 Kluwer Academic Publishers. Manufactured in The Netherlands.
Guest Editorial: Field Programmable Logic
Field Programmable Logic has emerged as an ideal platform for implementing complex DSP systems as it permitsthe development of circuit architectures that best match the computational requirements of the system. In orderto achieve efficient implementations, a detailed understanding of the underlying technology is required and clevermethods are needed to map the algorithmic functionality effectively. This motivation drove the content for the specialissue and we selected high quality submissions from two major conferences, the special session on ConfigurableComputing for DSP at the International Conference on Acoustics, Speech and Signal Processing at Salt LakeCity, Utah in 2001 and the International Conference on Field Programmable Logic in Belfast 2001 as a startingpoint for the invited material. The particular focus of the issue is in system level DSP and goes from efficientcomponent generation in first two papers right up to complex system implementation in the final paper. The selectedwork comes from both the US and Europe.
The first paper by Wirthlin presents a clever new way of implementing constant coefficient multiplication onXilinx Virtex FPGA technology. Whilst this topic has been well researched, this new approach cleverly merges theLook-up Table function used to generate the partial products with the adder structures, thereby allowing smallerconstant coefficient multipliers.
The second paper by Mencer and Luk provides a useful insight into the trade-offs between variousapproaches for building FPGA-based elementary function evaluators which are important in complex DSP sys-tems. The paper uses a PAM-Blox design environment that allows parameterisable generation of thefunctions.
The paper by Jain, Laffely, Burleson, Tessier and Goeckel discusses the trade-off of exploiting signal variationfor lower energy. This trade-off is considered for a motion estimation core in an MPEG system and for the DiscreteCosine Transform and Lempel-Ziv compression algorithms.
The fourth paper by Hutchings and Nelson starts off with a comprehensive review of the various features ofFPGAs that can be exploited for efficient DSP system implementation. A detailed realisation of a sonar beamformeris presented which is used to determine the direction of periodic signals in a sensor array. The approach is comparedwith software implementations.
Finally, the paper by Dick, Harris and Rice details the design of a carrier recovery circuit for a digital re-ceiver. Using the Matlab-based System Generator tool, the authors are able to show how the system is con-structed and simulated using existing FPGA hardware cores. FPGA implementation details are alsoprovided.
The issue should give the reader an insight into the challenges of implementing complex DSP systemsusing Field Programmable Logic. In particular, the issue covers topics ranging from the detailedimplementation of simple components, such as multipliers, right up to the design of systems such as adigital receiver. FPGA vendors are now driving towards a complete system-on-chip and the availability ofembedded processors, fast packet-based interconnect and more complex arithmetic components will facilitatethe implementation of highly complex DSP systems over the next few years. A future special issue in thisarea would probably focus on aspects of hardware/software partitioning and FPGA-based design tools. Theseissues are some of the new challenges facing designers who are implementing next generationsystems.
We would like to thank the Kluwer staff, especially Jennifer Evans, Jesikah Allison, Anne Murray and MichelleMisner for their help in producing this special issue.
6 Woods and Tessier
Roger WoodsQueens University of Belfast, Belfast, N. [email protected]
Russ TessierUniversity of Massachusetts, Amherst, MA, [email protected]
