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S. Battiato, V. Zannier, U. P. Gomes, D. Ercolani and L. Sorba
NEST, Istituto Nanoscienze-CNR and Scuola Normale Superiore, Piazza S. Silvestro 12, 56127
Pisa, Italy
Heterogenous nucleation of catalyst-free InAs NWs on silicon
Outline
400 nm
Introduction
Semiconductor nanowires: definition and applications
Catalyst-free growth of semiconductor NWs
Nucleation and density control
Conclusions
Semiconductor nanowires (NWs)
Novel properties: - high surface/volume ratio - carrier confinement - defect-free growth Integration of III-V NWs on silicon substrate key research
1D growth
Quasi-one dimentional crystals
III-V NWs on Si
FETs
LEDs
Solar Cells
Lasers
Chemical Beam Epitaxy
CBE for III-V semiconductor growth Metal-organic precursors: Group III : TMIn, TEGa, TMAl Group V : TBAs, TBP, TDMASb, TMSb
n-doping: TBSe
- Low impurity conc. thanks to the UHV
- Monolayer control
- High flexibility in material combination
Advantages +++
Ultra High Vacuum (UHV) chamber (base pressure: 10-9 Torr)
Growth mechanisms of semiconductor NWs
Gold-assisted growth: Vapour-liquid-solid (VLS) mechanism
200 nm
Au-catalyzed growth Au
× The incorporation of metal catalyst can be detrimental for the applications
Sputtering NW growth
Substrate 200 nm
Absence of foreign metal contamination
Integration of III-V NWs and silicon
InAs NWs
Catalyst-free growth:
InAs NWs
2’ BOE etch +10’’ DI rinse + dry N2
III-V Growth
100 nm
Ar or SiO2
Sputtering
2’ BOE etch +10’’ DI rinse + dry N2
100 nm
Catalyst-free growth of InAs NWs on Si (111) substrate
Substrate preparation
U. P. Gomes, D. Ercolani, V. Zannier, S. Battiato, E. Ubyivovk, V. Mikhailovskii,
Y. Murata, S.Heun, F. Beltram and L. Sorba, Nanotechnology , 28, 065603 (2016).
HRTEM analysis shows defect-free
crystalline order of the sputtered Silicon
substrates after growth.
Amorphization is unlikely to be the source of
nucleation sites.
AFM scans show comparable surface
roughness.
Roughness is unlikely to be the source of
nucleation sites
Catalyst-free and growth of InAs NWs on silicon substrate
Nature of nucleation sites
Sputtering probably creates defects
Defects serve as nucleation sites
Arsenic
Growth time
Tem
per
atu
re
Indium
Arsenic
Growth time
Tem
per
atu
re
Indium
High Radial growth
Low axial growth
High Axial growth
Low radial growth
LT Nucleation stage
HT Growth stage
200 nm 200 nm 200 nm
• LT enhances nucleation but NWs grow only radially
• Two-step temperature growth
• LT nucleation stage to control NW density
• HT stage to enhance anisotropic NW growth
380-400°C
380-400°C
480-500°C
15’ 30’ 45’
100 nm 100 nm 100 nm
10’ 20’ 80’
Catalyst-free growth of InAs NWs on silicon substrate
U. P. Gomes et al., Nanotechnology, 26, 415604 (2015)
Growth protocol
Annealing
Annealing
200 nm 200 nm
Sputtering
III-V Growth
U.P. Gomes et al. Nanotechnology, 2015, 26, 415604.
SiO2 sputtering Argon sputtering Non-sputtered Si (111)
400 nm
100 nm
<111> <112>
InAs NWs islands
Catalyst-free growth of InAs NWs on silicon substrate
Morphological characterization
RF magnetron
SiO2 sputtering
0 400 800 12000
25
50
75
tsputter
(s)
N (
m-2
)
0 200 400 600 8000
25
50
75
N (
m-2
)
Vsputter
(V)
0 30 60 900.0
0.2
0.4
0.6
N (
m-2
)
Vsputter (V)
0 400 800 12000.0
0.5
1.0
1.5
2.0
N (
m-2
)
tsputter
(s)
ICP Argon sputtering
Catalyst-free and growth of InAs NWs on silicon substrate
Effect of sputtering parameters on crystal density and yield
Crystal density increases with tsputter and Vsputter (as long as no etching /amorphization occurs)
Yield = InAs NW density/total crystal density
3 sec 6 sec
200 sec 1000 sec
400 nm
0 500 1000
0.25
0.50
0.75
1.00Y
tsputter
(s)
0 500 10000.0
0.5
1.0
Y
Vsputter (V)
Yield independent of sputtering parameters (~ 50 %)
Catalyst-free and growth of InAs NWs on silicon substrate
Effect of sputtering parameters on NW Yield
Yield vs sputtering
350 385 420 455 490
0
10
20
30
40
50 SiO2 sputtering tsputter=60 s,Vsputter=520 V
SiO2 sputtering tsputter=3 s,Vsputter=450 V Argon sputtering tsputter=600 s,Vsputter=35 V
N (
m-2
)
Tgrowth (oC)
15 16 17 18
-1.0
-0.5
0.0
0.5
1.0
1.5
2.0
lo
g10N
(
m-2)
1/KT
DE=0.23±0.05 eV
DE=1.43±0.30 eV
Catalyst-free and growth of InAs NWs on silicon substrate
Effect of growth parameters on crystal density and yield
• InAs crystal density decreases with Tgrowth
• High Vsputter and tsputter : low ΔE (Arrhenius plot)
• Maximum yield at 400°C
• NW density in the range of 1-30 NWs/µm2
Tgrowth=400°C, tgrowth=15 mins Tann=790°C, tgrowth=15 mins
• Annealing reorders the Si (111) surface
• Defect density decreases and crystal density decreases
• Yield increases with annealing temperature
• Highest yield of NWs at 790°C
350 385 420 455 490
0.0
0.2
0.4
0.6
Y
Tgrowth (o
C)480 560 640 720 800
0.0
0.2
0.4
0.6
T
ann (oC)
Y
0 40 80 120
0.0
0.2
0.4
0.6
0.8 Argon sputtering
tsputter
=600 s,Vsputter
=35 V
(
m-2
)
tgrowth (min)0 20 40 60 80
0
10
20
30
40
50 SiO2 sputtering
tsputter
=60 s,Vsputter
=520 V
(
m-2
)
tgrowth (min)
1000 nm
200 nm
200 nm
15 min 60 min 135 min
Catalyst-free and growth of InAs NWs on silicon substrate
Nucleation mechanism vs growth time
Conclusions
InAs nanowires have been synthesized by Chemical Beam Epitaxy technique using
catalyst-free approach.
We assessed the role of substrate preparation, showing that InAs crystals nucleate
on sputtered Si(111) surfaces while no nucleation occurs on non-sputtered Si(111)
surfaces.
We showed that the silicon surface can be obtained by modifying in situ growth
and ex situ sputtering parameters, allowing us to achieve a good control of the InAs
NWs density.
Although the nucleation of parasitic islands could not be completely inhibited, the
yield of NWs could be increased to about 0.5 by proper choice of growth and
annealing temperatures.
Acknowledgments
• Lucia Sorba • Valentina Zannier • Umesh Prasad Gomes • Daniele Ercolani • Fabio Beltram • Francesca Rossi (IMEM-CNR)
Thank you for your attention!