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September 2008
CHAPTER MEETINGS SCV-SPS - 8/30 | Workshop on Bio-informatics and Bio-signal Processing - molecular biology, computational Methods... [more]
SCV-TMC - 9/4 | Walking on Hot Coals - understanding your pre-disposition toward conflict situations ... [more]
SCV-RAS - 9/4 | Servo Systems: A Tale of Three Actuators - in hard disks, optical disks, atomic force microscopes ... [more]
IEEE-USA - 9/8 | Webinar: Engineering the Art of Negotiation (1 hr, no cost) - process-driven approach to negotiation... [more]
SCV-Mag - 9/9 | A Brief History Of Magnetic Tape Recording At Ampex - 1944 To 1962 - key products, the "glory years" ... [more]
SCV-EMC - 9/9 | Presentation by the Winner of IEEE Region 6 MicroMouse Contest 2008 - team from UC-Davis ... [more]
SCV-CPMT+WIE - 9/10 | Novel Approaches to Low-Cost Solar Cells: Science and Challenges - MEMS processing, packaging ... [more]
SCV-ComSoc - 9/10 | Location Based Services: From Promise to Reality - Google Maps for Mobile, with My Location ... [more]
SCV-SPS - 9/15 | Past and Future of Digital Watermarking - adding auxiliary data to multimedia signals ... [more]
SCV-APS - 9/16 | Target Characterization Using Time Reversal Symmetry of Wave Propagation - new approaches to imaging . [more]
SCV-Nano - 9/16 | Nanotechnology in Emerging Energy: Markets and Applications - renewable energy, energy storage ... [more]
SCV-CNSV - 9/16 | Introduction to Micro Electro Mechanical Systems (MEMS) - micro-scale sensors, actuators, application ... [more]
OEB-GOLD - 9/17 | Night at the Ball Park - Oakland A's vs. Angels - social time, fun, free (for GOLD IEEE members)... [more]
SCV-LEOS - 9/18 | Recent Developments in Large Arrays of Microcavity Plasma Devices: Physics and Applications... [more]]
OEB-IAS - 9/18 | Thinking Green for Transformer Insulation: Using Natural Esters - minimizing collateral environmental damage ... [more]
SCV-PES+IAS - 9/17 | Review of Diesel Generator Air Quality Issues and Regulations - design, install, run, test for backup power ... [more]
SCV-PELS - 9/18 | L-Cell Energy Storage from Deeya - 2-50 KVA of power, 1/3 to 1/10 the cost of traditional batteries ... [more]
SCV-SSC - 9/18 | Teaching CMOS to Surf mm-Waves - active and passive design techniques, circuit approaches ... [more]
SF-IAS - 9/23 | Sustainable Electrical Design - energy efficiency, net zero energy for buildings ... [more]
SCV-PSES - 9/23 | Heretical Views of Product Safety Orthodoxy - validity of some traditional product safety concepts ... [more]
SCV-EDS - 10/2 | PV Technology to Change the World - state-of-the-art applications, various methods of integration... [more]]
SCV-ComSoc - 10/8 | Wireless Backhaul Trends: Future Role of Wireless, Fiber Optics, and Copper Wire - backhaul strategy ... [more]
SCV-LEOS - 10/17 | Planetarium Show and Observing Party at the College of San Mateo - night sky show, black holes ... [more]
SCV-CAS+CPMT - 10/20 | Multichip Module Packaging and its Impact on Server Architecture and Operating Systems -... [more]
SCV-CPMT - 10/23 | The Evolution of MEMS Packaging - Chicken or Egg - history, product case studies, recent trends ... [more]
SCV-CPMT - 11/20 | Electro-Optical Microscopy: Evolution in Component and Package-Level Inspection - image analysis ... [more]
Professional Skills Courses [more]- Communication and Conflict Mgmt - Stress Mgmt - Breakthrough Project Mgmt - Strategic Thinking
Santa Clara University: Fall Quarter [more]Fall Open University courses (Sept. 22 - Dec. 5) - Come to an Information Session
Conference Calendar
Sept 14-19: PCB Design Conference West - Santa Clara Convention Center [more]
Sept 17-18: DISKCON USA -- Data Storage - Santa Clara Convention Center [more]
Sept 17-18: Embedded Power Conference - San Jose Marriott Hotel [more]
Sept 24-25: GSA IP Conference - Santa Clara Convention Center [more]
Embedded Systems Conference - India - - Hyderabad Sept 25-26; - Pune Sept 29-30; - Noida Oct 7-8; - Bangalore Oct 14-17 [more]
Oct. 2: GSA Suppliers Expo & Conference - Santa Clara Convention Center [more]
Oct. 12-15: Compound Semiconductor IC Symp (CSICS) - Portola Hotel & Spa, Monterey [more]
Oct. 13-15: Bipolar/BiCMOS Circuits & Tech’y Meeting (BCTM'08) - Portola Hotel, Monterey [more]
Oct. 22-24: uxTV 2008: Int'l Conf on Designing Interactive User Experiences for TV and Video - Microsoft Conf Center, Mt. View [more]
Oct. 27-30: Embedded Systems Conference - Boston - Haynes Convention Center, Boston [more]
Nov 11-14: Non-Volatile Memory Technology Symposium - Asilomar, Pacific Grove [more]
Support our advertisers
MARKETPLACE – Services page 3
SVTI Technical Skills Courses/Seminars [more]- Design with Verilog - MATLAB & Simulink - Design of RFICs - Biomedical Technologies and more
UCSC-Extension in Sunnyvale, Cupertino [more]- PLL and Clock/Data Recovery Circuits - ASIC Physical Design - Data Storage Essentials: and more
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 2
Your Networking Partner
® September 2008 • Volume 55 • Number 9
IEEE-SFBAC ©2008
IEEE GRID is the monthly newsmagazine of the San Francisco Bay Area Council of the Institute of Electrical and Electronics Engineers, Inc. As a medium for news for technologists, managers and professors, the editorial objectives of IEEE GRID are to inform readers of newsworthy IEEE activities sponsored by local IEEE units (Chapters, Affinity Groups) taking place in and around the Bay Area; to publicize locally sponsored conferences and seminars; to publish paid advertising for conferences, workshops, symposia and classes coming to the Bay Area; and advertise services provided by local firms and entrepreneurs. IEEE GRID is published as the GRID Online Edition
residing at www.e-GRID.net, in a handy printable GRID.pdf edition at the end of each month, and also as the e-GRID sent by email twice each month to more than 24,000 Bay Area members and other professionals.
Editor: Paul Wesling IEEE GRID PO Box 2110 Cupertino CA 95015-2110 Tel: 408 331-0114 / 510 500-0106 / 415 367-7323 Fax: 408 904-6997 Email: edi tor@e-gr id.net www.e-GRID.net
From the Editor’s Desk … Technology is truly amazing in i ts effects
on our l ives and how we now accomplish tasks. Back in the “old days”, our various Chapters would need to submit the detai ls of their upcoming meetings about 6 weeks in advance, to al low Doug Davolt enough t ime to type them up, compose the gal leys for the next issue, and get i t to the printer about 3 weeks before the “ issue date”. Then copies would be printed and mailed to al l the SF Bay Area IEEE members, to arr ive (hopeful ly) a few days before the start of the new month.
Not any more! Through the good services of the internet, I ’m now on a tour through the U.K. and Ireland (I was pub-hopping in Dubl in this afternoon), and now, on a Wednesday evening, and yet I ’m f inishing the September issue that you’ l l be reading on Friday. And there’s no print ing/mail ing delay; rather, after a few hours of proof ing the various Chapter event pages, and adding some last-minute conference publ ic i ty, I can dist i l l the f i le, add hyperl inks, and FTP i t to the website. Similarly, the e-GRID has been taking shape, and I ’ l l send i t out Thursday evening, to arr ive in your email on Friday.
I should also mention the tools involved. There’s my trusty laptop, on which I load al l my cr i t ical desktop f i les ( including my Outlook email f i les), so that I can appear to be working from my home in Si l icon Val ley with the resources I need. Then there are my FTP agent, my HTML editor, my blogging/RSS software, and various other ut i l i t ies that I f ind helpful. Any phone messages (to my VoIP numbers) are wrapped into .wav f i les and emailed to me, to download the next t ime I have internet access. Wow!
Al l of this gives me a “vir tual presence” – unless I ’ve told you ( in an email) that I ’m on vacation, you would assume I ’m st i l l quite nearby. Ain’ t i t great!
Paul
NOTE: This PDF version of the IEEE GRID – the GRID.pdf – is a monthly publication and is issued a few days before the first of the month. It is not updated after that. Please refer to the Online edition and Interactive Calendar for the latest information: www.e-GRID.net
DIRECTORS
Santa Clara Valley Ram Sivaraman Tom Coughlin
Oakland East Bay Victor Stepanians Rosanna Lerma
San Francisco Sandra Ellis Dan Sparks
OFFICERS Chair: Victor Stepanians Secretary: Dan Sparks
Treasurer: Ram Sivaraman
IEEE-SFBAC PO Box 2110
Cupertino, CA 95015-2110
IEEE GRID
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 3
Patent Agent Jay Chesavage, PE
MSEE Stanford 3833 Middlefield Road, Palo Alto 94303
www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835
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• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses
Ozen Engineering (408) 732-4665
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MET Laboratories
EMC – Product Safety
US & Canada
• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)
Facilities in Union City and Santa Clara
www.metlabs.com [email protected] 510-489-6300
Valon Technology, LLC
valontechnology.com
RF and Wireless Product Design & Development
- System Engineering - Test & Measurement - Schematic Capture & PCB layout - Expert Witness
Redwood City (650) 369-0575
Bernie Siegal
650-961-5900
[email protected] www.thermengr.com
Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures
IEEE-CNSV Consultants' Network
of Silicon Valley
• Become a member • Find a Consultant • Submit a Project
CaliforniaConsultants.org
M E S OIn t eg r at io n
Let us help you integrate your product and get it into production • MEMS & Sensors Experts • Product Design ▪ R&D ▪ Failure Analysis • Medical Devices ▪ High-Volume Manufacturing • Experienced Consultants www.MesoIntegration.com
[email protected] TEL: 949.278.0275
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 4
NVMTS showcases new and emerging non-volatile electronic memory technologies. The conference includes advances in existing technologies as well as state-of-the-art technologies and future memory directions. Plan to participate to share and hear about research and advances in new and alternative non-volatile memory technologies.
Session Topics: -Phase Change - Flash - MRAM - Ferroelectrics - Metal oxide resistive memory - Ion conducting (including organic) - New memory concepts - Memory circuit design and integration - NVM in reconfigurable electronics
Sponsors:
Co-Sponsor: Santa Clara Valley Section, IEEE
Design of Radio Frequency Integrated Circuits 12 week course,T/Th 6:00PM-9:00PM (Starts: Sept 2) A balance of communications, physics and IC design. Includes high-speed amplifiers, LNA, Mixer, VCO, PA, PLL and other RF blocks.
Digital VLSI Design with Verilog 12 week course, M/W 6:00PM-9:00PM (Starts Sept 3) Learning language constructs in a progressively more complex project environment. Synthesis of gate-level netlists from behavioral, RTL, and structural code; constraints most useful for area and speed optimization; partitioning, safe coding styles.
Discount of $40 for IEEE Members on 12-week courses.
Plan to Attend!
Keynote Talk: “Phase Change Memory: Technology Status and the Path Forward” Dr. Stephen J. Hudgens, Ovonyx Technologies
Tutorial: “Non-Volatile Memory Technologies” Dr. Krishna Parat, Intel Corp. An overview of non-volatile memory technologies
2-1/2 days of technical sessions (plus a Poster session for students, post-docs and others to present their work)
Held at the beautiful Asilomar Conference Grounds (Reservations required by Sept. 10th)
Reduced registration fee through Sept. 10th
For additional information, and to register:
Visit www.nvmts.org
Upcoming 1-day Seminars:
Sept 4: Biomedical Technologies - Opportunities & Challenges
Sept. 5: Device & Interconnect Reliability in Advanced CMOS
Sept. 6: SystemVerilog Assertions for Design and Verification
Discount of $30 for IEEE Members on Seminars.
Get more information on all upcoming classes:
www.svtii.com/SVTI-calendar.htm
Review all SVTI offerings: www.svti.org
SILICON VALLEY TECHNICAL INSTITUTE
Upcoming Courses with labs
IEEE Ninth Annual
Non-Volatile Memory Technology Symposium November 11-14, 2008
Asilomar Conference Grounds, Pacific Grove
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 5
8:15 – 8:45 AM: Registration and breakfast
(1) 8:45 AM: Molecular Biology Basics Speaker: Dr. Craig Stephens, Santa Clara University
(2) 10:40 AM: Computational Methods in Bioinformatics Speaker: Dr. Sami Khuri, San Jose State University
(3) 1:00 PM: Signal Processing Models and Algorithms for RNA Sequence Analysis Speaker: Dr. Byung-Jun Yoon, Texas A&M University, College Station, TX
(4) 2:40 PM: Biostatisitcs: Statistical Analysis of Bio-data Speaker: Dr. Ru-Fang Yeh, University of California San Francisco
(Full details on website)
UCSC Extension offers practical engineering courses in Silicon Valley and online to help hardware, software and IT professionals develop and advance their skills. We are the largest professional engineering educator in Silicon Valley.
Low-Power Design of Nano-Scale Digital Circuits Sept 10 - Nov 12, Wed 6:30PM to 9:30PM, Cpto Campus Earlybird rate through August 27th – save 10%
PLL and Clock/Data Recovery Circuits (2283-009) Sept 11 - Nov 13, Thu 6:30PM to 9:30PM, Cpto Campus Earlybird rate through August 28th – save 10%
Designing Xilinx CPLDs and FPGAs (6346-021) Sept 17 - Dec 10, Wed 6:30PM to 9:30PM, Cpto Campus Earlybird rate through September 3rd – save 10%
Introduction to Logic Synthesis (4377-090) Sept 18 - Nov 20, Thu 6:00PM to 9:00PM, S’vale Campus Earlybird rate through September 4th – save 10%
Our courses are organized under Certificate Programs. Within a program you will find courses from the basic (for career changers) to the cutting-edge (to help you stay at the
forefront of the profession).
Registration includes a copy of the workshop proceedings, lunch, breakfast, and coffee Registration Fees
By Aug 20
After Aug 20
IEEE member $40 $50 Non-member $50 $60 Student $20 $30
For more information and to register:
ewh.ieee.org/r6/scv/sps/bioSPS
UPCOMING CLASSES FOR ENGINEERS – IN SUNNYVALE,
CUPERTINO Digital Video Compression (6930-008) Sept 18 - Oct 30, Thu 6:30PM to 9:30PM, Cpto Campus Earlybird rate through September 4th – save 10%
Advanced ASIC Physical Design (0634-009) Sept - Dec 1, Mon 6:30PM to 9:30PM, S’vale Campus Earlybird rate through September 15th – save 10%
Data Storage Essentials (21940-001) Oct 2 - Dec 11, Thu 6:30PM to 9:30PM, Cupertino Campus Earlybird rate through September 18th – save 10%
PCB Design for Signal Integrity & EMC Compliance (21943-001) Oct 4 - 11, Sat 9:00AM to 5:00PM, Cupertino Campus Earlybird rate through September 20th – save 10%
“Real-time" courses, and "real-world" instructors – Take one course or a whole certificate.
Find out more. Download our Program Brochure with year-round Course Tables.
www.ucsc-extension.edu/EngTech
IEEE Signal Processing Society, Santa Clara Valley Chapter
Workshop on Bio-informatics and Bio-signal Processing Saturday, Aug. 30, 2008, 8:15 AM – 5:00 PM
Benson Student Center, Santa Clara University
Santa Clara University
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 6
Have you ever wanted to continue your education in engineering while you continued working? Santa Clara University’s School of Engineering offers graduate degree and non-degree programs to both full-time students and working professionals. There's still time to sign up for an Open University class this fall! Simplified registration for Open University. Graduate-level instruction. Up to 12 units may be transferred to a graduate-degree program.
Fall Quarter Classes (Sept. 22 - Dec. 5)
Early-morning classes: (partial listing) - Engineering Statistics - Electromagnetic Field Theory - Finite Element Methods - Introduction to Communication
Evening classes: - Advanced Logic Design - SoC (System-on-Chip) Formal Verification Techniques - Molecular Biology for Engineers - Computer Architecture - Information Security Mgmt - DSP Design in FPGA - Design for Testability
Saturday class: - Building Global Teams - Law, Technology and Intellectual Property
DISKCON USA 2008 September 17-18
Hyatt Regency Hotel/ Santa Clara Convention Center
The requirements for information storage are superseding all limits and bounds, both economic and geographic. The robust demand to retain all data for ease of use at any time in any environment has created the need for storage products whose trends exponentially expand in terms of capacity, performance and availability, and decrease in price per gigabyte. It is this growth environment which is addressed and analyzed at DISKCON for magnetic hard disk drives and solid state storage devices.
As an added feature, a Lithography Symposium will constitute the second day of DISKCON. Since future storage capacity progress is strongly dependent on the technology to expose and etch ultra-fine geometries for HDD magnetic heads and media, as well as SSD devices, this Symposium addresses all aspects of lithography; from the present 193 nm UV exposure tooling capability and its future enhancements, to e-beam mastering and nano-imprinting progress for DTR and PBM.
Presented by IDEMA The Trade Associa t ion for the Data S torage Indus t ry
Prepare for that next
project or assignment!
Studying Engineering in the Heart of Silicon Valley
Fall Classes start Monday, Sept. 22 Inquire now!
To learn more about the graduate program at SCU, attend an information session on September 5 (evening) or September 24 (noon): Visit www.scu.edu/engineering/graduate/event_rsvps.cfm Review fall Open University courses:
www.scu.edu/engineering/graduate
September 17: Keynote Dinner John Coyne, President and Chief Executive Officer, Western Digital Corporation Sessions: • Storage Products • The Global Market • The Expanding World of Storage • Meeting the Supply & Performance Requirements • Storage Technology: The Basis for Success • Future Storage Lithography: A Crossroads in Technology • Process Developments for Fine Lines and Features • Lithography Panel Discussion September 15: Youth Charity Golf Tournament
Register at www.idema.org or call 408-719-0082
Exhibit at DISKCON USA 2008 – contact Paul Moschella at 781-769-8950
Santa Clara University School of Engineering Graduate Programs
SCU Fall Open University
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 7
The interest in 3-D approaches is well founded. 3-D integration and packaging presents both a threat and an opportunity to each industry player along the supply chain - threats and opportunities that are still not well understood.
3-D Architectures for Semiconductor Integration and Packaging is the world's foremost conference on 3-D technology. Join us to hear presentations and panel discussions by experts.
Focus: - Market Impacts and Analysis - End-user Perspectives - 3-D Integration and Packaging Technologies - Design Methodology and Tools - Manufacturing Issues and Solutions
Panels “Examining the Commercialization of 3-D Systems” “Examining Key Process Steps and Tools”
Preconference Symposium: “A Comprehensive Look at 3-D Integration” An up-to-date picture of the world of 3-D integration and thru-silicon vias (TSV) for integrated circuits and systems.
Philip Garrou, IEEE Fellow and Consultant, and Lisa McIlrath, President/Chief Executive Officer, R3Logic
Sessions: - Market Analysis and Forecasts - Going 3-D: Looking At Technology Options And Process Flows - - Thermal Considerations In 3-D Integration - 3-D IC Design Tools And Challenges - 3-D Memory with Logic And Image Sensor Technology - TSV for FPGAs - Key 3-D Efforts From Leading EU Research Institutes Earlybird Rates through October 24th (save $100)
Full details: techventure.rti.org/fall2008
Research Triangle Institute -- TechVentures 2008
3D Architectures for Semiconductor Integration and Packaging November 17-19, 2008 Hyatt Regency S.F. Airport, Burlingame
"Momentum Builds: Examining Routes to Success"
SPONSORS: GOLD – EMA Design Automation; SILVER PLUS – Sierra Proto Express; SILVER – DownStream Technologies; MEDIA – Circuit Cellar; Everything PCB
Conference: September 14 – 19, 2008 | Exhibition: September 16 – 17, 2008
Exhibition Hours: September 16: 12 pm – 7 pm | September 17: 10 am – 3 pm
Santa Clara Marriott | Santa Clara, CA | www.pcbwest.com
MEDIA PARTNERS:
When you attend the 17th annual PCB West at the Santa Clara Marriott this September, you’ll have access to the printed circuit
board courses, technologies, solutions and contacts that will grow your knowledge and your career.
There are more reasons than ever to attend PCB West:
• Expanded course offerings, including a new three-day Professional Development course on “High Speed and Simulation Tool Use” by renowned expert Lee Ritchey• Over 35 Professional Development and Technical Conferences courses• More new speakers—plus the return of our most popular speakers• The PCB Design, Fab and Assembly Roundtable, with perspectives from top-level manufacturers—from niche players to large multinationals • Two-day exhibition, featuring the industry’s leading vendors• The return of “FREE Tuesday,” including six free technical sessions• Keynote Address titled “Bringing Design to Life” by Dr. Chris Urmson, inventor of the “Boss” Chevy Tahoe• “Designer Decision 2008,” a unique session created to let designers’ voices be heard• Networking opportunities throughout the week, including the FREE Opening Night Reception.
Download the conference brochure and register now at www.pcbwest.com
FREESPECIAL EVENT
Opening NightReception
5 pm – 7 pmin the Exhibit HallThe Opening Night
Reception will kick off at 5 pm on the show floor.
This key networking event will provide you with an opportunity to meet and
chat with everyone at the show—including your
fellow attendees, exhibitors and
speakers—in a fun, relaxed atmosphere while
enjoying a selection of beverages and hearty
finger foods.
GROW YOURKNOWLEDGE ...
IN THE HEART OF
SILICONVALLEY
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 8
IEEE Professional Skills Courses
Breakthrough Project Management – Date/Time: W-Th, Sept 10-11, 8:30AM – 4:30PM – Location: – TIBCO Software, Palo Alto
Fee: $625 for IEEE Members; $700 non-members
This 2-day course provides participants with a common methodology, terminology and tools that produce more efficient results and increased buy-in through improved visibility, reliability and consistency. Key Topics: - Project Barriers & Breakthroughs - Team Development & Leadership - Define POS & Scope - Use the Trade-Off Flexibility Matrix - Make Fact-Based Decisions - Define Tasks - Create Work Breakdown Structure - Analyze Risks & Contingency Plans - Diagram Dependencies (CPM,PERT) - Manage the Project: Step-by-Step - Effective Meetings
"The methods and processes used for this class were not just tools and packages. They were a way to approach, manage and think, as well as communicate and deliver projects with less firefighting. I particularly liked the flexibility matrix, POS, risk analysis and critical path analysis."
Management Essentials – Date/Time: T-W, Oct 14-15, 8:30AM – 4:30PM – Location: – Synopsys - Mountain View
Fee: $625 for IEEE Members; $700 non-members
Supervisors, first-line and middle managers will find this two-day workshop relevant and useful. Participants leave with a clear understanding of leadership; the strengths and weaknesses of their personal style; and key skills, such as how to set direction for a group, reinforce productive behavior, and deal confidently with performance problems.
"Thank you!! I wish I could have had this knowledge a long time ago when I first became a supervisor." -Sales Operations Supervisor, @Road
Improve your skills – register for one of these classes, or for others coming up this fall. Bring a team!
San Francisco Marriott Hotel (55 Fourth Street)
7-8 November 2008 No cost – come learn to help our schools!
The Teacher In-Service Program (TISP) is for IEEE volunteers wishing to develop and present technologically oriented subject matter to local middle and high school educators in an in-service or professional development setting. TISP allows IEEE volunteers to share their technical expertise and to demonstrate the application of engineering concepts to support the teaching and learning of science, mathematics and technology disciplines.
The Program now includes sixteen Sections with lesson plans available in English and Spanish for educators and engineers. Approximately 620 pre-university educators have participated, representing over 63,000 students.
SCV Chapters, Engineering Management & Components, Packaging and Manufacturing Technology Societies
Strategic Thinking at the Functional Level
– Date/Time: Tues, Sept 9, 8:30AM – 4:30PM – Location: – Cypress Semiconductor, San Jose
Fee: $400 for IEEE Members; $500 non-members
Finance for Non-Finance Professionals
– Date/Time: Thurs, Oct 2, 8:30AM – 4:30PM – Location: – Synopsys, Mountain View
Fee: $300 for IEEE Members; $350 non-members
Getting Things Done Across Organizational Borders
– Date/Time: Tues, Oct 7, 8:30AM – 4:30PM – Location: – Trimble Navigation, Sunnyvale
Fee: $400 for IEEE Members; $500 non-members
Communication and Conflict Management Using MBTI
– Date/Time: Thurs, Oct 9, 8:30AM – 4:30PM – Location: – Synopsys, Mountain View
Fee: $400 for IEEE Members; $500 non-members
Transitioning from Individual Contributor to Manager
– Date/Time: Thurs, Oct 9, 8:30AM – 4:30PM – Location: – LSI Corp, Milpitas
Fee: $400 for IEEE Members; $500 non-members
For complete course information, schedule, and registration form, see our website:
www.EffectiveTraining.com
Participants learn about tips and strategies on how to connect with their local educators, participate in hands-on activities, hear from key local educators and receive resources to help them conduct teacher in-service presentations. A typical agenda includes:
- TISP Background and Scope - TISP Hands-on Activities - Challenges and Opportunities in the Local School System - Tips on How To Begin - Alignment with Ed’n Standards
There is not a registration fee; attendance includes all meals and a room at the Marriott. Come join us!
For information:
www.ieee.org/web/education/preuniversity/tispt To register:
icm3.ieee.org/eventmanager/onlineregistration.asp?eventcode=4JD
Engineers wanted -- Teacher In-Service Program Training Workshops
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 9
www.isqed.org
CALL FOR PAPERS
Leading Design for Quality & Manufacturability™
Paper Submission Deadline: October 10, 2008 Acceptance Notifications: November 24, 2008 Final Camera-Ready paper: January 2, 2009
The International Symposium on Quality Electronic Design (ISQED) is a leading Design and Design Automation conference, aimed at bridging the gap between and integration of, electronic design tools and processes, integrated circuit technologies, processes & manufacturing, to achieve design quality. ISQED is the pioneer and leading international conference dealing with the design for manufacturability and quality issues front-to-back. ISQED spans three days, Monday through Wednesday, in three parallel tracks, hosting nearly 100 technical presentations, several keynote speakers, panel discussions, workshops/tutorials and other informal meetings. Conference proceedings are published by IEEE and hosted in the IEL/Xplore digital library. Proceedings CD ROMs are published by ACM. In addition, continuing the tradition of reaching a wider readership in the IC design community, ISQED will continue to publish special issues in leading journals. The authors of high-quality papers will be invited to submit an extended version of their papers for special journal issues, such as TCAD, etc.
A pioneer and leading multidisciplinary conference, ISQED accepts and promotes papers related to manufacturing, VLSI design and EDA. Authors are invited to submit papers in the various disciplines of high level design, circuit design, test & verification, design automation tools; processes; flows, device modeling, semiconductor technology, and advanced packaging.
Papers are requested in the following areas:
1. Manufacturing, Semiconductor Process and Devices 1.1 Design for Manufacturability/Yield & Quality (DFM/DFY/DFQ)
2. Design 2.1 System-level Design, Methodologies & Tools (SDM) 2.2 Package - Design Interactions & Co-Design (PDI) 2.3 Robust & Power-conscious Devices, Interconnects, and Circuits (PCC) 2.4 Emerging/Innovative Process & Device Technologies and Design Issues (EDT) 2.5 Design of Reliable Circuits and Systems (DFR)
3. EDA/CAD 3.1 EDA Methodologies, Tools, Flows & IP Cores; Interoperability and Reuse (EDA) 3.2 Design Verification and Design for Testability (DVFT) 3.3 Physical Design, Methodologies & Tools (PDM)
Submission of Papers
Paper submission must be done on-line through the conference web site at www.isqed.org. The guidelines for the final paper format are provided on the conference web site. Authors should submit FULL-LENGTH, original, unpublished papers (Minimum 4, maximum 6 pages) along with an abstract of about 200 words. To permit a blind review, do not include name(s) or affiliation(s) of the author(s) on the manuscript and abstract. The complete contact author information needs to be entered separately. Please check the as-printed appearance of your paper before sending your paper. In case of any problems email [email protected]. Please note the following important dates: The guidelines for the final paper format are provided on the conference web site at www.isqed.org. Authors of the submitted papers must register and attend the conference for their paper to be published.
For full information, visit www.isqed.org
ISQED 2009 - 10th Anniversary International Symposium on
QUALITY ELECTRONIC DESIGN
March 16-18, 2009, San Jose
Review the full Call for Papers on the website
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 10
Visit www.embedded.com/esc/boston
The Embedded Systems Conference Boston brings together embedded designers from around the globe, offering high-caliber, solutions-oriented technical sessions, and providing invaluable opportunities to network with peers and suppliers. ESC is the place to get the toughest technical questions asked and answered. The event delivers real-time embedded advice from experienced industry experts in 85 classes, talks and full-day tutorials, exhibitors across the embedded industry with the tools you need, and solution-swapping opportunities with your peers in discussion groups. Product Exhibition See the latest hardware, software, and development tool solutions from leading vendors in the electronics industry. Watch product demonstrations and hear about new product launches. Speak to product experts, compare products side-by-side and share experiences with your peers. Hear first-hand about tomorrow's technology today. Over 150 exhibitors will be on the 2008 show floor displaying an array and depth of products that will offer answers to any of your tough design questions. Shoptalks Grab a cup of coffee and join us for these popular early morning gatherings. Moderated by notable conference instructors, these free-form discussions are a great opportunity to swap ideas with your peers on common embedded development problems. The focus depends on the attendees present and their interests. Brown Bag Lunches Moderated by notable conference instructors, these informal discussions are a great opportunity to swap ideas with your peers on common embedded development problems. Bring your lunch and topics you’d like to discuss. Signature Sponsor Platinum Sponsor
ESC Tracks • Commercial & Open Source Operating Systems • Debugging, Verification & Test • Design Team Management • DSP & Multimedia: Algorithms & Implementation • Hardware Design, including Programmable Logic • Multi-core Processors & Programming • Real-time Development • Security • Software Development • Virtualization • Wired & Wireless Networking
Tutorials • Common Hardware Mistakes by Embedded System
Designers • Embedded Linux Jumpstart • Architectural Design of Software for Multicore
Systems • Embedded C Programming • Performance, Memory, and Power Optimization for
Embedded DSP Systems • Embedding TCP/IP • Real-Time KernelsManaging Embedded Projects
Flexible Registration Packages • 1-day, 3-day, or the All-Access Pass value • Group rates – bring your team (save up to 20%) • Free no-hassle parking – Free WiFi Visit www.embedded.com/esc/boston* for full
details
Haynes Convention Center Boston, MA
October 27-30, 2008
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Mark Your Calendars and Save These Dates
The Big Tent Event: Bangalore Oct 14-17
Hyderabad Sept 25-26
Pune Sept 29-30 Noida Oct 7-8
ESC India was specifically created for embedded system engineers and technical managers who are actively seeking to upgrade their design expertise, knowledge and skills, as well as provide answers to their design challenges.
ESC India is the LARGEST embedded conference on the Indian sub-continent. Our comprehensive educational program is bar none the BEST, bringing together industry luminaries such as Richard Nass, Jack Ganssle, David Kalinsky, Rob O'Shana and more. ESC India – bringing real world solutions to your real world problems.
We've added more content to the Bangalore event, making it even more educational. And we've expanded ESC to 3 new locations – Hyderabad, Noida and Pune – giving even more developers in India access to our great educational material.
ESC India 2008 offers a winning comnination of informative, technological presentations and an exhibition of embedded products from the world's leading companies operating in the embedded space. This is your chance to be part of India's leading embedded systems design conference and help India's embedded designers create tomorrow's designs. Customize your learning experience: Select unique tracks such as:
• Debugging, Test & Verification • DSP & Multimedia • Hardware • FPGA • Linux • Multi-Core & Multi-Threaded Processors • Networking & Communications • Power Management & Microcontrollers • Real-Time Development • Software & Operating Systems • Standards, Safety & Security • System Design • Wireless
Who Should Attend:
• Design/Development Engineers • System Architects • Software Engineers • Hardware Engineers • Engineering Management • Corporate Management
MyESC is the official networking and scheduling portal of ESC India. This exciting interface will allow you to connect with the people,
products and companies that offer the tools you need for your designs.
Besides the networking features of MyESC, attendees can use the All-In One Scheduler to view: • The Exhibiting companies they would like to see • The Meetings they have set • The Sessions they have selected to attend • The People they would like to meet
Earn World-Class CEU's Attendees at ESC India will be able to earn continuing education units from UC-San Diego towards Professional Certification and develop the critical skills necessary for today's technological industries.
If you interface with design teams in India: • Plan your travels to join team members at ESC-India • Alert your teams in Bangalore, Hyderabad, Noida and Pune of the dates and programs at ESC India 2008 Sign up today for our email list and be the first to find out what's going on with ESC India.
www.cmp-egevents.com/web/esci
To exhibit or reserve a sponsorship, contact: Sean Raman at 415-947-6622
Email: [email protected]
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 12
Join the Revolution in Embedded Applications at
this 3-Day Event.
The AdvancedTCA Summit brings you practical, up-to-date information on the state of AdvancedTCA and MicroTCA, the emerging standard platforms for communications equipment. It is intended as a meeting point between the vendor eco-system and users/potential users of Advanced TCA/MicroTCA products.
Summit themes include the creation of standards-based telecom equipment, design methods, interfaces, reduction of cost and development time, and making equipment more flexible and more maintainable.
The Summit consists of half-day tutorials, panel discussions, keynotes, paper sessions, workshops, and special sessions.
Who Should Attend? • Embedded systems developers • Hardware and software design engineers • Network equipment manufacturers • Telecom engineers • Military/defense equipment contractors
“For the first time, we have a complete ecosystem of customers and vendors working together to specify, implement, and apply the new technologies.”
— Lars Johan Larsson, MODT AB Sponsorship and Exhibiting Information Rudy & Karla Gentry, 707-987-2153
Summit Topics
• AdvancedTCA / AdvancedMC / MicroTCA • One-stop shop for evaluating products or designs • Expert guidance on thermal and mechanical
issues • Interoperability and real applications • Embedded Linux, embedded virtualization,
embedded security • WiMAX, LTE, fixed-mobile convergence, and
10-G Ethernet Keynote Speakers • Rose Schooler, Intel • Shlomo Pri-Tal, Emerson Network Power • David Pearson, Cisco Systems • Anthony Ambrose, Radisys
Understand and Learn • Understand MicroTCA-based design • Learn about AdvancedTCA-based system
development • Learn how to develop shelf management software
and evaluate alternative middleware.
Reduced Fees through October 15th
Full information:
www.AdvancedTCAsummit.com Presenting and Attending Information Lance Leventhal, 858-756-3327
Oct 21-23, 2008 Santa Clara Convention Center
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 13
Keynote Address: Jonathan Luse, Director of Marketing, Digital Enterprise Group, Intel Corporation will discuss innovations in embedded and low-power technology which increase platform intelligence while improving energy efficiency.
Four Tracks: • Software: using software algorithms to reduce
power; or digital power techniques • Heat Management: cooling options; proper
airflow; thermal modeling; temp sensing • System-Level and Backplane Supply Power
Issues: hot-swap; distributed power; supplying multiple voltages
• Circuit-Level Power Issues: increase power efficiency; minimize switching losses; power-estimation
Short Courses: The 20+ courses are practical hands-on targeted content specifically for the embedded engineer, focusing on: • •Line powered systems – rack servers, bank
servers, etc. • • It’s about watts, not microwatts. • • It’s about how to save money by enhancing
power/energy density. • • It’s about discovering new solutions, not
rehashing old protocols.
Sponsored Sessions: Learn cutting-edge power management tactics and techniques from today's leading OEMs. Throughout the two day conference, attendees will have the opportunity to engage technical specialists and experts in intimate learning sessions. • Ease Power Supply Design with Online Tools
Speaker: Jeff Perry, Manager of Web Design Tools, National Semiconductor
• Digital Interfaces in Power Supply Solutions Speaker: Mark Hartman, Applications Engineer in Advanced Power Products, National Semiconductor
• and more!
Platinum Sponsor Gold Sponsor Silver Sponsor Classes in the four tracks are taught by REAL engineers. These systems-level design engineers are facing increasing power-managment issues, such as:
• How do designers deal with excessive heat generated by today’s high-powered systems?
• What role does software play in increasing efficiency?
• Do the latest digital power techniques ease the burden?
Register today!
Visit our website:
www.cmpegevents.com/web/pm Become a Sponsor/Exhibitor for the Embedded Power Conference. Contact Sean Raman at 415.947.6622 or
September 17-18, 2008
Marriott Hotel, San Jose
- Sessions - Classes - Exhibits
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 14
CSICS provides the latest results in high-speed digital, analog, microwave/millimeter wave, mixed mode, and optoelectronic integrated circuits. Advances in compound semiconductors including GaAs, GaN, InP, as well as high-speed and mm-wave CMOS and more advanced materials systems are featured. The technical program is strong, yet the atmosphere is casual. This provides for in-depth learning as well as excellent opportunities to interact with your professional peers.
Highlights: • Short Course – "A Modeling Toolbox for RF
Designers" on Sunday • Vendor’s Exhibition – demonstrations and face-to-
face meetings with state-of-the-art exhibitors • Technical Program - starting with the Plenary
Session on Monday morning • Panel Sessions topics include GaN for Base
Stations, Next Generation Handset Technology, and more
* Co-Location with IEEE BCTM (see below) BCTM 2008 covers leading edge processes, devices, and circuits used in state-of-the-art telecom and power control systems. The conference starts with a one-day short course followed by two full days of contributed and invited papers. On Tuesday evening, BCTM and CSICS attendees will join together for a banquet that will be held at the Chateau Julien Wine Estate in beautiful Carmel Valley.
Keynote Speaker: Dr. Gil Amelio, CEO of Jazz Semiconductor
“Technology Convergence Creating New Opportunities for Innovation”
BCTM Short Course (Monday, October 13) "100Gb/s Ethernet/High-Speed Data Converters"
Advanced bipolar technologies continue to enjoy a significant performance edge over CMOS in high-speed, fiber-optic and multigigabit data converters ICs. This course presents three expert speakers with tutorials on the latest developments in advanced SiGe bipolar-technologies and their applications in high-speed data converters and in the new and exciting 100Gb/s Ethernet standard.
Technical Program: 52 papers including "Integrating III-V on Silicon for Future Nanoelectronics" by Robert Chau of Intel Corp.
Save, through September 19th Full information, and to register:
www.csics.org
Become a CSICS Exhibitor! Space is still available; request details.
Contact Sue Kingston, [email protected] Phone: 310-937-1006
Program: 62 contributed papers including 6 double-length invited papers and a special invited session on Power Devices for Automotive Applications.
Sessions: • Classic Analog • Device Physics • Power Devices and ESD • RF Power Amplifiers • Advanced Modeling • BiCMOS Platforms • ICs for Radar Applications • Exploring the Limits of SiGe HBTs • mmWave Building Blocks • Technologies for System Integration • Tuner/UWB Recievers • High-Speed ADCs ... and more
Co-located with CSICS (above)
Advance registration deadline is September 19
Full Advance Program:
www.ieee-bctm.org
2008 IEEE Compound Semiconductor IC Symposium
INTEGRATED CIRCUITS IN GaAs, InP, SiGe, GaN and OTHER COMPOUND SEMICONDUCTORS
October 12-15, 2008 Portola Hotel & Spa Monterey
22nd IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM2008)
October 13-15, 2008 Portola Hotel & Spa, Monterey
Bipolar/BiCMOS
Circuitsand
TechnologyMeeting B
CT
M
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October 2, 2008
Santa Clara Convention Center
Theme: "Global: Markets, Perspectives, Technology"
The GSA Suppliers Expo & Conference is the semiconductor industry’s must-attend event. The 2008 program features more than 100 exhibiting companies and a full day of educational programming. This conference strives to provide you with the opportunity to meet with potential partners and hear from industry experts regarding the topics most relevant to today’s semiconductor industry. Platinum, Gold Sponsors
Register for the GSA IP Conference, taking place at the Santa Clara Convention Center. This event will focus on the business, quality and metric issues in obtaining quality IP and the importance of incorporating a healthy IP ecosystem in your business strategy. GSA has partnered with distinguished industry leaders who will provide their insights for the semiconductor community in finding and utilizing quality IP. Featuring 2 tracks, numerous presentations, panel discussions and dynamic networking sessions, this event presents your company with an opportunity to learn, contribute and build new relationships and expand existing ones.
Keynote Addresses • "Semiconductor Intellectual Property: The Key to a
$100 Billion Market", Jordan Selburn, Principal Analyst, Semiconductor Design, iSuppli Corporation
• "IP in the SoC Era: Truth & Consequences", Ron Collett, President and Chief Executive Officer, Numetrics Management Systems, Inc.
GSA Annual Briefing Jodi Shelton, Executive Director, GSA
Keynotes Joep van Beurden, Chief Executive Officer, CSR Sudip Nandy, President, Technology, Media and
Telecommunications, Wipro Technologies
Panel Discussions • Challenges in and Solutions for Design and
Verification of Low Power Devices • IP: How to Successfully Use and Integrate IP
No-cost registration/admission thru Sept 29th Includes Lunch and Cocktail Networking Reception
Full details at
www.gsaglobal.org/suppliers_expo/usa2008
Panel Discussions • Expanding Decreasing Margins: Facilitating Improved
Margins, Lower Cost and Faster Time-To-Market • Is Silicon Validation Necessary? • How Do IP Quality, Verification Relate to Yield? • Understanding and Utilizing a Compatible IP Ecosystem • What Key Issues and Drivers are Considered When
Migrating a Design From One Node to the Next? • IP Responsibility: Impact on Time-To-Revenue • Foundry & IP Suppliers: Partners or Competitors?
Why You Should Attend • Expand your knowledge on how to leverage IP to
positively impact your business • Gain an understanding by listening to dynamic leaders
address the significance of third-party IP in the semiconductor industry
• Build partnerships with IP executives worldwide • Learn which IP metrics can improve quality
For more information:
www.gsaglobal.org/ipconference
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 16
One-day Workshop: Bio-informatics and
Bio-signal Processing Speakers: Dr. Craig Stephens, Santa Clara
University; Dr. Sami Khuri, San Jose State University; Dr. Byung-Jun Yoon, Texas A&M University; Dr. Ru-Fang Yeh, UCSF
Time: Registration and breakfast at 8:15 AM; ends at 5:00 PM
Cost: $50 ($40, for IEEE Members), includes breakfast, lunch and handouts
Place: Benson Student Center, Santa Clara University
RSVP: See website Web: ewh.ieee.org/r6/scv/sps/bioSPS 8:15 – 8:45 AM: Registration and breakfast
(1) 8:45 AM: Molecular Biology Basics Speaker: Dr. Craig Stephens, Santa Clara University
(2) 10:40 AM: Computational Methods in Bioinformatics Speaker: Dr. Sami Khuri, San Jose State University
(3) 1:00 PM: Signal Processing Models and Algorithms for RNA Sequence Analysis Speaker: Dr. Byung-Jun Yoon, Texas A&M University, College Station, TX
(4) 2:40 PM: Biostatisitcs: Statistical Analysis of Bio-data Speaker: Dr. Ru-Fang Yeh, University of California San Francisco
Registration Fee:
By Aug 20
After Aug 20
IEEE member $40 $50 Non-member $50 $60 Student $20 $30 Register on-site:
ewh.ieee.org/r6/scv/sps/bioSPS
SATURDAY August 30, 2008SCV Signal Processing
M E S OIn t eg r at io n
Let us help you integrate your product and get it into production • MEMS & Sensors Experts • Product Design ▪ R&D ▪ Failure Analysis • Medical Devices ▪ High-Volume Manufacturing • Experienced Consultants www.MesoIntegration.com
[email protected] TEL: 949.278.0275
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 17
Servo Systems: A Tale of Three Actuators
Speaker: Dr. Daniel Abramovitch, Agilent Time: Presentation: at 7:00 PM Cost: none Place: Carnegie-Mellon West campus, Moffet
Field RSVP: not required Web: ewh.ieee.org/r6/scv/ras
Daniel Abramovitch was born in Saskatoon, Saskatchewan and grew up in Tuscaloosa, Alabama. He earned degrees in Electrical Engineering from Clemson (BS) and Stanford (MS and Ph.D.), doing his doctoral work under the direction of Gene Franklin. Upon graduation, and after a brief stay at Ford Aerospace, he accepted a job at Hewlett-Packard Labs, working on control issues for optical and magnetic disk drives for 11 1/2 years. He moved to Agilent Laboratories shortly after the spin-off from Hewlett-Packard, where he has spent the last 8 years working on test and measurement systems.
Danny is a Senior Member of the IEEE and was Vice Chair for Industry and Applications for the 2004 American Control Conference (ACC) in Boston. He is Vice Chair for Workshops at the 2006 ACC in Minneapolis, for Special Sessions at the 2007 ACC in New York, and for Industry and Applications at the 2009 ACC in St. Louis. He has helped organize conference tutorial sessions on topics as varied as disk drives, atomic force microscopes, and phase-locked loops. He serves as the Chair of the IEEE CSS History Committee. Danny is credited with the original idea for the clocking mechanism behind the DVD+RW optical disk format and is co-inventor on the fundamental patent. He was on the team that prototyped Agilent’s first 40Gbps Bit Error Rate Tester (BERT) and was able to cite a Douglas Adams book in one of his patents relating to that device. Along with his co-author, Gene Franklin, he was awarded the 2003 IEEE Control Systems Magazine Outstanding Paper Award. He currently is doing research on future atomic force microscopes for Agilent. He has multiple publications and patent applications in this area.
Students studying control problems often learn a lot of wondrous algorithms that impart near mythical properties to the systems that they are applied to. At least this is how it works in theory and simulation. In practice, however, a thorough understanding of the system, the use model, and the market is often far more important than the differences between any two optimization algorithms. Knowing when and where a particular algorithm is useful is typically at the heart of real control problems.
This talk will focus on three servo systems with which the speaker has had considerable experience: hard disks, optical disks, and atomic force microscopes. By examining how the particulars of these three systems affect the use of control algorithms, the speaker will try to extract some general lessons.
THURSDAY September 4, 2008 SCV Robotics and Automation
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 18
Walking on Hot Coals Speaker: Helena Dublisky, Omega Coaching Time: Pre-dinner Networking at 6:30 PM; Dinner
at 7:15 PM; Presentation: at 7:45 PM Cost: $25 (IEEE member), $30 (non member)
cash or check at the door ($5 more, without reservation)
Place: Ramada Inn, 1217 Wildwood Ave, Sunnyvale
RSVP: See website Web: www.ieee-scv-ems.org
Helene Dublisky is a certified business coach and information technology management consultant with over 20 years experience in both large established and smaller startup organizations. Her background in executive and high tech positions allows her to understand the unique challenges faced when introducing organizational change, and also provides a basis to connect with highly specialized professionals in an effective manner.
Helene holds a Master's degree in the Dynamics of Organizations from the University of Pennsylvania and is an adjunct professor in the Masters in Information Systems program at the University of San Francisco where she teaches classes in Mastering Organizational Politics, Managing Projects and Change, and Managing Human Resources. She is the co-author of IT People: Doing More with Less to which she contributed the chapter on Understanding and Mastering Positive Political Skills.
This presentation will help people to understand
their own pre-disposition to conflict situations, and to identify their own “automatic behaviors” toward conflict situations, to learn about the life cycle of conflict (and the functional and dysfunctional behaviors associated with each), and then to learn about different strategies for dealing with conflict. It will be an interactive session, with participants doing a quick self-assessment. There will be time during the session to examine the dysfunctional behaviors involved in a particular conflict situation.
THURSDAY September 4, 2008 SCV Technology Management Council
ANSYS Channel Partner
• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses
Ozen Engineering (408) 732-4665
[email protected] www.ozeninc.com
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 19
Webinar: Engineering the Art of Negotiation
Speaker: John Shulman, internationally recognized
negotiation expert, Alignor Time: 10:00 AM - 11:00 AM (PDT) Cost: none (includes complimentary book,
Engineering the Art of Negotiation: Part 1 — How to Handle Your Boss)
Place: online RSVP: See website Web: www.ieeeusa.org/careers/webinars
John Shulman is a Harvard Law graduate and
internationally recognized negotiation experts who has trained and worked with thousands of business people, engineers and project managers on negotiation challenges faced by large organizations. As president of the training and consulting firm, Alignor, Shulman has performed public-interest work for the Government of India; the U.S. State Department; and on Middle East peace issues; and the U.N. War Crimes Tribunal for Rwanda.
Tired of hidden agendas, dealing with difficult
people, or politics derailing projects? Learn a process-driven approach to negotiation and persuasion that you can use to keep projects on track and keep difficult people in check. This webinar will share proven tools and methodologies for:
* Front-end needs analysis on projects to get buy-in and neutralize hidden agendas
* Brainstorming options to solve problems and resolve differences
* Handling difficult people and situations without personal conflict
Webinar participants will receive a complimentary
copy of the forthcoming IEEE-USA e-book, Engineering the Art of Negotiation: Part 1 — How to Handle Your Boss.
MONDAY September 8, 2008IEEE-USA Career Center
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 20
A Brief History Of Magnetic Tape Recording At Ampex –
1944 To 1962 Speakers: John M. Leslie and Jay McKnight, AMPEX
(retired) Time: Cookies, Conversation & Pizza at 7:00 PM;
Presentation at 7:30 PM Cost: none Place: Western Digital, 1710 Automation Parkway,
San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/mag
John M. Leslie BSEE (‘49, Berkeley), MSME (‘63, Stanford), EME
(‘65, Stanford) Military 1942-46 U.S. Navy Ampex Corp. 1948-62 Rising from Subcontractor
to Vice President and General Manager Stanford Univ. 1963-65 Associate Professor
(acting) in Mechanical Engineering Hewlett Packard 1966-69 Manager of Engineering Pemtek Corp. 1970-76 Part owner and Vice
President of Engineering United Scientific Corp 1976-81 Senior Vice President
of Engineering, President of Analytical Instruments
Tracor Xray 1981-84 Vice President and General Manager
Retirement Wonderful time with our 5 children, their spouses, 13 grandchildren
John G. (Jay) McKnight BS in Elec. Eng. from Stanford University in 1952 Ampex Corp 1952-72 Served in the magnetic
recording research group, stereo tape and professional audio division
Magnetic Reference Lab. Co-founder (1973), president since 1975.
Mr. McKnight has published over 60 papers on the theory and practice of magnetic recording, and audio engineering. In 1973/74 he was a member of Judge Sirica's "Advisory Panel on White House Tapes" ('The Watergate Tapes'). Mr. McKnight has been very actively serving the Audio Engineering Society (AES): He is Fellow, President (1978/79), Honorary Member (1979), member of the AES Journal (cont.)
This talk covers the History of Magnetic tape recording at Ampex Corporation from its inception in 1944 to 1962. It includes highlights of: (1) what led a small motor manufacturer to become a major producer of magnetic tape recorders and an industry leader for decades; (2) development of the Ampex 200A; (3) the Model 300, which became the backbone of both the audio and data recording industries; (4) the Model 350 which became the workhorse of many radio and recording studios; (5) multi-channel recorders for widescreen theater productions; and (6) development of the Ampex VR-1000 videotape recorder that revolutionized the television broadcast industry. The paper also includes comments on the equalization characteristics used in Ampex’s audio and data recorders. It closes with a look back at events that slowed the momentum of the "glory years" of Ampex. (cont.) Review Board (1960 - 2007), Governor 4 times, Standards Committee Chairman (1971 - 74), Publications Policy Committee Chairman (1977/78), Historical Committee Chairman (1999 - 2006), and now Chair Emeritus of that Committee. He has been a member of several standards committees on audio engineering and magnetic recording. He received the AES’s Publication Award (1982), AES Award (1971), Board of Governors Award (1990) and the AES Distinguished Service Medal Award (10/2008) for extraordinary service to the Society and contributions to the advancement of knowledge in magnetic recording over a period of more than 50 years. He is IEEE senior member, IEEE Magnetics Society member, "IRE (IEEE) Professional Group on Audio" member (1953 - 70).
TUESDAY September 9SCV Magnetics
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 21
Presentation by the Winner of IEEE Region 6 MicroMouse
Contest 2008 Speakers: Josephine Sabado, Laura Biggs, Michael
Miller, Mark Tuk and Harpreet Kaur, UC-Davis IEEE Student Branch MicroMouse Team
Time: 5:30 PM Cost: none Place: Applied Materials Bowers Cafeteria, 3090
Bowers Ave., Santa Clara RSVP: not required Web: www.ewh.ieee.org/r6/scv/emc
Josephine Sabado is originally from Pomona. She graduated from UC Davis this past June with a bachelor's of science in electrical engineering and a minor in technology management. After working for a few years, she plans to obtain a master's degree in electrical engineering. She enjoys spending time with friends while having a good meal at a restaurant.
Michael Miller graduated from Bella Vista High
School in 1998 and entered active duty with the United States Marine Corps later that same year. After four years of services as a telephone switchboard technician he ended his service. In the fall of 2003 he started studying at American River College and transferred to UC Davis in the fall of 2006 with an associates degree in Physical Science/Mathematics. He plans to obtain his bachelor's degree in computer engineering at the end of the 2008/2009 school year. His interests include computer programming and platform development.
The presentation will focus on what the
MicroMouse contest is and how the UC Davis team went about winning the contest. Issues include design decisions, group dynamics, and overall direction taken.
The team designed the MicroMouse from scratch. We researched what type of microcontroller, motors, sensors, tires, and chassis material to use. The professor for the class, Dr. Tak Auyeung, offered suggestions on designing the mouse, time management, and team organization.
The initial task of choosing which materials to use for the MicroMouse was a team effort. Once the components were chosen, each member took on a portion of the mouse. PCB design, chassis design, high-level software, and low-level software were divided among the members according to our strengths and interests. Each team member provided assistance in the other areas as needed.
Throughout the year, Professor Tak emphasized the importance of reliability of the mouse. With this in mind, we made our error correction algorithm the highest priority. Once this worked properly, we were able to improve the speed, chassis design, and appearance of the MicroMouse. Throughout the design and manufacturing process, Professor Tak has provided us with his experiences with MicroMouse and offered suggestions as to how we can improve our design.
TUESDAY September 9, 2008SCV Electromagnetic Compatibility
Bernie Siegal
650-961-5900
[email protected] www.thermengr.com
Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures
S e p t e m b e r 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 22
Novel Approaches to Low-Cost Solar Cells:
Science and Challenges Speaker: Prof. Peter Peumans, Dept. of Electrical
Engineering, Stanford Univ, and Deputy Director of the Center for Advanced Molecular Photovoltaics (CAMP)
Time: Dinner (optional) at 6:30 PM, Presentation at 7:30 PM
Cost: $25 if reserved by Sept. 8; $30 after & at door; no cost for presentation
Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101 frontage road at Lawrence Expressway), Sunnyvale
RSVP: by email to Janis Karklins, [email protected]
Web: www.cpmt.org/scv/cpmt0809.html
Peter Peumans is an Assistant Professor of Electrical Engineering at Stanford and Deputy Director of the Center for Advanced Molecular Photovoltaics (CAMP). He is an expert in solar cell modeling and characterization. He has developed several efficient organic solar cell device architectures and has contributed to today’s understanding of the mechanisms that play a role in organic solar cells. Peumans also contributed to the development of vapor phase deposition techniques that lend themselves to reel-to-reel processing of organic and organic/inorganic nanocomposite solar cells. Two of Dr. Peumans’ publications are in the top-20 cited papers in the field of solar cells. He holds 10 patents and has 5 or more pending. He is a co-founder and the Chief Scientific Advisor of NetCrystal, a Silicon Valley startup focusing on low-cost microconcentrator solar cells using a technology developed by Peumans’ group at Stanford. Dr. Peumans is on the advisory board of Solexel. Prof. Peumans is the recipient of an NSF CAREER award.
In this talk, I will discuss various approaches to harvesting solar energy that promise to lower the cost of solar electrical power. I will describe an approach that combines monocrystalline silicon with MEMS processing and advanced packaging to make low-cost, high-efficiency silicon solar cells. I will show that organic solar cells are an attractive way to convert sunlight into electrical power since the materials are low-cost, abundant and non-toxic. The efficiency of organic solar cells has increased steadily in recent years by virtue of engineered organic nanostructures that optimize exciton and carrier transport. I will discuss how metal conductors can be made extraordinarily transparent and solution-processable such that they can be used as transparent electrodes in thin-film solar cells. Finally, I will discuss the fundamental limits of light trapping in thin-film solar cells and show how photonic nanostructures can be used to improve solar cell efficiency.
WEDNESDAY September 10, 2008
SCV Components, Packaging and Manufacturing Technology + Women in Engineering
Patent Agent Jay Chesavage, PE
MSEE Stanford 3833 Middlefield Road, Palo Alto 94303
www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835
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Location-Based Services: From Promise to Reality
Speaker: Ravi Jain, manager for mobile engineering,
Google, & IEEE Fellow Time: 6:30 PM Cost: Donation to cover pizza Place: National Semiconductor, Building E,
Conference Room, 2900 Semiconductor Dr., Santa Clara
RSVP: not required Web: www.ewh.ieee.org/r6/scv/comsoc
Ravi Jain is currently with Google, as a manager for
mobile engineering efforts in mobile advertising, location based services, and syndicated mobile search. From 2002 to 2005 he was Vice President and Director of the Network Services and Security Lab in DoCoMo USA Labs. At DoCoMo he led the US team designing DoCoMo's 4th generation (4G) core network in three key areas: mobility management, QoS and security. From 1992 to 2002 he was in Applied Research, Telcordia Technologies (formerly Bellcore) working on mobile wireless architectures, algorithms, protocols and middleware, as well as open programmable networks. Prior to that he worked for several years on systems and communications software development, performance modeling, and parallel programming. Ravi received the Ph.D. in Computer Science from the University of Texas at Austin in 1992, and has numerous publications and patents in the wireless area. Ravi is a member of Phi Kappa Phi, Upsilon Pi Epsilon, ACM, and a Fellow of the IEEE.
• Google Maps for Mobile with My Location • Important Features of My Location • How it works and its challenges
WEDNESDAY September 10, 2008 SCV Communications
Valon Technology, LLC
valontechnology.com
RF and Wireless Product Design & Development
- System Engineering - Test & Measurement - Schematic Capture & PCB layout - Expert Witness
Redwood City (650) 369-0575
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Past and Future of Watermarking
Speaker: Ton Kalker, Mobile and Media Systems
Lab, HP Labs Time: Fast Food & drinks at 6:30 PM; Presentation
at 7:00 PM Cost: $2 Donation Recommended towards
Refreshments Place: National Semiconductor, north end of
Building E, 2900 Semiconductor Dr., Santa Clara
RSVP: not required Web: ewh.ieee.org/r6/scv/sps
Ton (Antonius Adrianus Cornelis Maria) Kalker
is research scientist in the Mobile and Media Systems Lab at HP Labs in Palo Alto, where he is focusing on multimedia security and digital rights management. Kalker joined HP in June 2004 from Philips Research Laboratories Eindhoven, where he worked on security of multimedia content, with an emphasis on watermarking and fingerprinting for video and audio. Earlier, he worked at Phillips Research in the field of computer-aided design, specializing in semi-automatic tools for system verification. Since 1999, Kalker has also served as a part-time professor in the Signal Processing Systems group at the technical University Eindhoven, he Netherlands, in the area of signal processing methods for data protection. A native of The Netherlands, Kalker received both his MS and PhD degrees in mathematics from the University of Leiden, The Netherlands. While pursuing his PhD, he worked as a research assistant at the university, and later as a lecturer in the Computer Science Department at the Technical University of Delft. He is a Fellow of the IEEE (2001) for his contributions to practical applications of watermarking – in particular, watermarking for DVD-Video copy protection. Kalker is co-founder of the recent IEEE Transactions on Information Security and Forensics (ToIFS) and chair of the associated Technical Committee.
The term 'Digital Watermarking' refers to methods
and techniques for adding auxiliary data to multimedia signals. In the mid nineties, digital watermarking was heralded as the solution for all copyright and copy protection issues: in one form or another the opening paragraph of many papers contained the reasoning 'copyright protection is important, therefore we need watermarking'. However today, more than 10 years later, we find very few actually deployed applications of digital watermarking. In this talk we will try to explain why digital watermarking has not lived up to its expectations, as well as making an educated guess about what the future of digital watermarking will be.
MONDAY September 15, 2008SCV Signal Processing
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Target Characterization Using Time Reversal Symmetry
of Wave Propagation Speaker: Dr. David H. Chambers, Lawrence
Livermore National Laboratory Time: Snacks/social at 6:00 PM; Presentation at
6:30 PM Cost: none Place: Cogswell Polytechnical College
(Boardroom), 1175 Bordeaux Dr., Sunnyvale
RSVP: not required Web: www.e-grid.net/docs/0809-scv-aps.pdf
Originally from southeast Kansas, David
Chambers did his undergraduate study at Washington University in St. Louis from 1976 to 1982, earning Bachelor degrees in both physics and mechanical engineering, and a Master's degree in Physics. He continued his graduate study at University of Illinois at Urbana-Champaign, earning a PhD in Theoretical and Applied Mechanics in 1987. His doctoral research with Prof. Ronald Adrian, was on Statistical Representations of Coherent Structure in Turbulent Flow. Afterward he took a position as Physicist at Lawrence Livermore National Laboratory, investigating the propagation of high energy laser beams through the atmosphere. Following this work, he spent several years working on a joint program with the UK on radar imaging of the ocean surface. Following this he moved to Electrical Engineering and worked on ocean acoustics and broad band acoustic beam design for ocean applications. That work led to research in acoustic tomography and imaging, and acoustic time reversal. He has published papers in the fields of laser propagation through turbulence, evaluation of techniques for extracting coherent structure information from turbulent fluid flows, models of dispersive wave propagation for signal processing applications, and acoustic time reversal. He is a Fellow of the Acoustic Society of America, Senior Member of IEEE, and member of the American Physical Society and Society of Industrial and Applied Mathematics.
The fact that wave propagation looks the same
whether time is going forward or backward has been known theoretically since the formulation of wave theory. Only recently, however, have array technology and computers been developed to the point that time reversal of waves can actually be performed in real systems. Experiments using ultrasonic and underwater acoustical arrays have shown enhanced focusing, communications, and imaging through complicated media. Better theoretical understanding of the time reversal symmetry for acoustic and electromagnetic waves has motivated new approaches to imaging and characterization of targets applicable to more conventional array technology. These approaches are based on the decomposition of the time-reversal operator (TRO), which describes the behavior of a time-reversal mirror array. Analysis of this operator shows that the number of eigenstates for a given target depends on the degree of symmetry of the scattering process. This talk will describe the analysis of the TRO for acoustic and electromagnetic scattering from spherical and cylindrical objects. Recent experiments have confirmed the predictions from theory and show that multiple eigenvalues of the TRO can be measured. The utility of the decomposition is illustrated for the case of radar imaging of small objects.
TUESDAY September 16, 2008 SCV Antennas and Propagation
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Nanotechnology in Emerging Energy: Markets and Applications Speaker: Eric Wesoff, Senior Analyst, Greentech
Media Time: Registration & light lunch 11:30 AM;
Presentation at 12:00 Noon Cost: IEEE Members and Students $5; Non-
Members $10 Place: National Semiconductor Bldg E-1 CMA
Room, 2900 Semiconductor Drive, Santa Clara
RSVP: at our web site Web: www.ieee.org/nano
Eric Wesoff is a senior analyst at Greentech
Media where he covers the financing and technology of renewable energy and cleantech markets. Prior to joining Greentech Media, Eric founded Sage Marketing Partners in 2000 to provide sales and marketing-consulting services to venture-capital firms and their portfolio companies in the alternative energy and telecommunications sectors. He also was the publisher of the Venture Power newsletter, a subscription-only newsletter covering venture-capital investment in renewable energy.Eric's expertise covers solar power, fuel cells, biofuels and advanced batteries.
From 1988 to 1996, Eric served as product marketing manager for Siemens Optoelectronics, where he oversaw complex product lines and managed relationships with global customers. He then became the U.S. marketing and sales manger for Akzo Nobel Photonics, which was acquired by JDS Uniphase. Eric later served as the sales director for Dicon Fiber Optics, where he was responsible for selling millions of dollars of fiber-optic telecom equipment.
This talk will cover nanotechnology applications in
renewable energy with an emphasis on solar power and energy storage.
Nanotechnology is enabling new types of material systems and manufacturing that have the potential to improve power production and the ability to scale to utility-scale. We'll look at new technologies, new companies, the funding environment, and the challenges ahead for companies in this crucial, high growth market sector. In addition to solar, we'll also look at batteries, fuel cells, and biofuels.
TUESDAY September 16, 2008 SCV Nanotechnology
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Introduction to Micro Electro Mechanical Systems (MEMS)
Speaker: Alissa M. Fitzgerald, Founder and
Managing Member, A.M. Fitzgerald & Associates, LLC
Time: 7:00 PM Cost: none Place: KeyPoint Credit Union, 2805 Bowers
Avenue, Santa Clara RSVP: not required Web: www.ieee.org/nano
Dr. Alissa Fitzgerald is the founder and Managing Member of A.M. Fitzgerald & Associates, LLC, a firm specializing in early stage MEMS product development, prototyping, analysis, and technical consulting. She has over 13 years of hands-on experience in MEMS design and fabrication.
Alissa has developed over a dozen distinct MEMS devices such as piezoresistive cantilevers, ultrasound transducers, and microcalorimeters for applications ranging from implantable medical devices to spacecraft sensors. She is an expert on the reliability of brittle materials and finite element analysis for MEMS devices, and continues to conduct research in those areas.
Dr. Fitzgerald has worked at Jet Propulsion Laboratory (JPL), Orbital Sciences Corporation, Sigpro and Sensant Corporation (acquired by Siemens). She received her bachelors and masters degrees from the Massachusetts Institute of Technology and her doctorate from Stanford University, all in the discipline of Aeronautics and Astronautics.
Alissa has numerous journal publications, holds two patents, and is a frequent lecturer at Stanford University and local professional group meetings. Dr. Fitzgerald is the Director of the Semiconductor Entrepreneursnia Semiconductor Entrepreneurship Program.
MEMS (Micro-Electro Mechanical Systems),
sometimes called Microsystems Technology (MST), encompasses the manufacturing technologies that enable the fabrication of micro-scale sensors and actuators on silicon and glass wafers.
MEMS grew out of the semiconductor industry and uses many of the same tools, but that is where the similarity ends. MEMS is a highly fragmented, non-standardized industry that more closely resembles the custom machine-shop world, albeit at much smaller dimensions.
Hundreds of innovative and exciting devices have been developed which are finding application across all industries. MEMS devices are in your car, your cell phone, in biotech laboratories, at the doctor's office, and even in the "Waving Torches" used in the Beijing Olympics opening ceremony.
This talk will provide an introduction to MEMS, an overview of how MEMS products are made, and a review of current and future applications of this exciting technology.
TUESDAY September 16, 2008 SCV Consultants' Network of Silicon Valley
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Night at the Ball Park – Oakland A's vs. Angels
Time: 6:30 PM gathering, 7:05 Start Cost: Free for IEEE GOLD members, half-off for
non-members Place: McAfee Coliseum, Oakland RSVP: By Sept 5th to Brent McHale,
[email protected] for details
Come on out to the ball game! There is no cost for
GOLD members (ie, those IEEE members who graduated from college within the last 10 years), so come join us for this great night out! Contact Brent for more details and to reserve.
WEDNESDAY September 17, 2008 OEB GOLD (Grads of the Last Decade)
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Recent Developments in Large Arrays of Microcavity
Plasma Devices: Physics and Applications
Speaker: Prof. J. Gary Eden, University of Illinois at
Urbana-Champaign Time: Networking and Pizza Social at 6:00 PM;
Presentation at 7:00 PM Cost: none Place: KLA-Tencor Corporation, 3 Technology
Drive, Milpitas RSVP: through website Web: www.ewh.ieee.org/r6/scv/leos
J. Gary Eden received the Ph.D. degree in Electrical Engineering from the University of Illinois, Urbana, in 1976 and was appointed a National Research Council Postdoctoral Research Associate at the U.S. Naval Research Laboratory (Washington, DC). As a research physicist in the Laser Physics Branch (Optical Sciences Division) of NRL from 1976 to 1979, he made several contributions to the area of visible and ultraviolet lasers and laser spectroscopy, including the co-discovery of the KrCl rare gas-halide excimer laser, and received a Research Publication Award (1979) for his work at NRL in which he co-discovered the proton beam pumped laser (Ar-N2, XeF). Since joining the faculty of the University of Illinois in 1979, he has been engaged in research in atomic, molecular and ultrafast laser spectroscopy, the discovery and development of visible and ultraviolet lasers, and the development of photochemical vapor deposition. He has served as Assistant Dean in the College of Engineering, Associate Dean of the Graduate College, and Associate Vice-Chancellor for Research, and is currently Professor in the Department of Electrical and Computer Engineering and Director of the Laboratory for Optical Physics and Engineering, as well as Research Professor in the Coordinated Science Laboratory, and the Micro and Nanotechnology Laboratory. Dr. Eden has over 200 publications and 22 patents, is a member of four honorary organizations, and is a Fellow of the IEEE, the Optical Society of America, and the American Physical Society. continued ==>
Microcavity plasma devices are a new class of hybrid plasma/optoelectronic device in which a non-equilibrium low temperature plasma is spatially confined to a microcavity with a characteristic cross-sectional dimension of nominally 10-200 µm. Plasmas so confined are stable glows having nanoliter volumes and operating at gas pressures up to and beyond one atmosphere. Conventional mass production techniques can be used to fabricate arrays of microplasma devices having precisely-controlled microcavity dimensions and dielectric structures, thereby tailoring the electric field within the microcavity. Arrays of microcavity plasma devices have been demonstrated in a wide range of materials and device structures including Si, glass, and ceramics, but this presentation will focus on recent results in our laboratory in which arrays having active areas >200 cm2 have been realized with Al2O3Al multilayer structures and plastic-based devices. Both are flexible and the latter are fully transparent. Furthermore, plasma channels having widths of 20 µm and aspect ratios >104:1 have been demonstrated. The performance of these arrays and selected applications in lighting, displays, and biomedical phototherapeutics will be discussed.
(continued …) He has served as Editor-in-Chief of the IEEE
Journal of Quantum Electronics and, in 1998, as President of the IEEE Lasers and Electro-Optics Society (LEOS). Previously, he served as a member of the LEOS Board of Governors, and as the Vice-President for Technical Affairs. Dr. Eden received the LEOS Distinguished Service Award, was awarded the IEEE Third Millennium medal in 2000 and was named a LEOS Distinguished Lecturer for 2003-2005. From 1996 through 1999, he was the James F. Towey University Scholar at the University of Illinois. In 2005, he received the IEEE/LEOS Aron Kressel Award. Recently he was awarded the C.E.K. Mees Medal of the Optical Society of America, and was also named the recipient of the Fulbright-Israel Distinguished Chair in the Natural Sciences and Engineering for 2007-2008.
THURSDAY September 18, 2008 SCV Lasers and Electro Optics
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Thinking Green for Transformer Insulation: Using Natural Esters
Speaker: Dave Brucker, Senior Regional Power
Systems Engineer, Cooper Power Systems Time: No-host social at 5:30 PM; Presentation at
6:15 PM; Dinner at 7:15 PM; Presentation continues at 8:00 PM
Cost: $20 for IEEE members; $25 for non-members
Place: Marie Callender's Restaurant, The Garden Room; 2090 Diamond Blvd, Concord (near the Concord Hilton Hotel)
RSVP: by email to Gregg Boltz, [email protected], 925-210-2571
Web: www.e-grid.net/docs/0809-oeb-ias.pdf
Dave Brucker is a Life Member of the IEEE, an engineering graduate of the University of Notre Dame, and is the Senior Regional Power Systems Engineer for Cooper Power Systems supporting electric utilities in states of California, Nevada and Utah. He is a past member and Chairman of the IEEE West Coast Transformers Subcommittee, a member of IEEE Substations Committee, and the IEEE 693 Standards Committee. His past life included participation in many HVDC projects including the Pacific Intertie, Intermountain Power Project, Hydro Quebec Three Terminal HVDC Intertie plus others. A former resident of the Bay Area, he now resides a bit to the south near Paso Robles.
In order to maintain the high standard of living that we as members of today’s society enjoy, we are challenged to find ways to more resourcefully utilize utility assets – extend, if possible, their life; minimize the collateral damage to our environment from unexpected failures; and, increase their operating efficiency. Electrical transformers, both transmission and distribution, are a case in point. They populate electric utilities, provide the lifeblood to our infrastructure and industries, and, like the rest of us, they aren’t getting any younger. Natural ester fluids, in this case soy oil, provide an elixir of life for these aging assets. These fluids also provide for a cleaner environment, safer operating conditions, longer asset life, and equipment overloadability.
This presentation offers an overview of the technical situation in the present day transformer business with a special emphasis on the use of biodegradable natural ester fluids in distribution and power transformers. Design and application economics are discussed with particular emphasis on environmental, fire safety and operating experience.
THURSDAY September 18, 2008 OEB Industry Applications
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Review of Diesel Generator Air Quality Issues and Regulations
Speaker: Kenneth J. Lim, PH.D., Supervising Air
Quality Engineer, Bay Area Air Quality District
Time: Dinner at 6:00 PM, Presentation at 6:45 PM Cost: $25.00 IEEE members, $30.00 non-
members, $10.00 students Place: Ramada Inn, 1217 Wildwood (near
Lawrence and 101), Sunnyvale RSVP: by email to James Alvers,
[email protected], 925-463-7115
Web: www.e-grid.net/calendar.html
Kenneth J. Lim, PH.D., is Supervising Air Quality Engineer for the Bay Area Air Quality District.
Electrical consultants, contractors and end users
design, install, run, and test diesel generators for backup power systems throughout the Santa Clara Valley. This presentation will review the air quality and regulatory issues in regards to diesel generators.
More details on the presentation to follow.
WEDNESDAY September 17, 2008 SCV Power & Energy, and Industry Applications
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L-Cell Energy Storage from Deeya Speaker: Saroj Sahu, Founder & Izak Bencuya
Executive Director. Deeya Time: Pizza & Networking 6:00 PM, Business Mtg
and Presentation at 6:30 PM Cost: Donations for food accepted Place: SEMI Global Headquarters, at 3081 Zanker
Road at Montaque Expwy, San Jose RSVP: by email to Rich Keller, [email protected]
Dr. Izak Bencuya, executive director of Deeya, recently resigned from his position as the Executive Vice President of Fairchild Semiconductor and the General Manager of the Functional Power Products Group in San Jose. He has over 25 years of industry experience. He began his career at Yale University where he researched ultra thin oxide MOS devices. Dr. Bencuya later worked at GTE Laboratories and Siliconix in various research and management roles to develop and market leading edge Power Devices, such as MOSFETs, IGBTs and SITs. He joined Fairchild in 1994 to start the Low Voltage MOSFET business. The Functional Power Products Group, at $950M annual revenue, mainly supplies Power Semiconductor devices for power supply applications in the computing, communications, industrial, consumer and automotive markets. He has a B.S. in Electrical Engineering from Bogazici University in Istanbul, Turkey, an M.S. and Ph.D. in Engineering and Applied Science from Yale University and an M.B.A. from the University of California-Berkeley. He is a member of the IEEE Electron Device Society. Dr. Bencuya holds 22 patents and has published extensively in the electronics field.
Saroj Sahu, Founder & Chief Technology Officer, holds a Ph.D. in Experimental Physics. Some of his best academic works include determination of structure of photon and particle detectors for b-quark physics. He has worked in technology leadership positions at Raychem/Tyco Electronics, Jasmine Networks, and Santec Corp, prior to founding Deeya Energy. He has been a Visiting Scholar (Monbusho Fellow) at the Japanese National Accelerator Physics Lab (KEK) invited by the Japanese Ministry of Education, and a Researcher at University of Hawaii (Honolulu), and National Taiwan University (Taipei). He has over 60 publications in international journals, 1 published book and 1 US patent, with several pending.
Deeya Energy is a technology start-up focused on developing and manufacturing Electrical Energy Storage Systems based on its proprietary technology called L-Cell. The systems are based on a novel battery technology that allows a new level of cost and performance metrics to be reached in the energy industry.
Deeya’s products are focused on peak-off-peak Load Shifting, a market estimated to be worth $10B for electricity consumers and worth $160B for electricity producers and distributors. They are also for commercial energy storage in Renewable Energy and UPS (Uninterruptible Power Supply) industries, presently estimated at $5B, and inadequately served mostly by Lead-Acid batteries and diesel generators.
Deeya L-Cells are suitable and economic replacements for Lead-Acid batteries and diesel generators for applications requiring 2-50kVA of power and 4-24 hours of backup. The lifetime of a Deeya L-Cell is 7 years, after which it can be refurbished with minimal cost to run for another 7 years, ad infinitum. The L-Cells require minimal or no maintenance during this period. They are temperature independent and can be placed in an outside environment. Most importantly, they can be charged very fast. A 4-hour system can be charged in about 2 hours.
The system represents a Clean Energy Technology, with no poisonous or expensive metals or fume release. L-Cells are effectively 3 times cheaper than Lead-Acid batteries, and 10-20 times cheaper than NiMH, Li-Ion and Fuel Cell options.
THURSDAY September 18, 2008 SCV Power Electronics Kickoff Meeting to Restart Chapter
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Teaching CMOS to Surf mm-Waves
: Speaker: Prof. Ali Niknejad, UC Berkeley Time: Refreshments at 6:00 PM; Presentation at
6:30 PM Cost: small donation for food Place: National Semiconductor Building E,
Auditorium, 2900 Semiconductor Dr., Santa Clara
RSVP: not required Web: www.ewh.ieee.org/r6/scv/ssc
Ali M. Niknejad received the B.S.E.E. degree from the University of California, Los Angeles, in 1994, and the M.S. and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 1997 and 2000. From 2000-2002 he worked in industry where he was involved with the design and research of CMOS RF integrated circuits and devices for wireless communication applications. Presently he is an associate professor in the EECS department at UC Berkeley. He is a co-director of the Berkeley Wireless Research Center (BWRC) and also the co-director of the BSIM Research Group. He served as an associate editor of the IEEE Journal of Solid-State Circuits and is currently serving on the TPC for the International Solid-State Circuits Conference (ISSCC). His current research interests lie within the area of RF/microwave and mm-wave integrated circuits, particularly as applied to wireless and broadband communication circuits. His interests also include device modeling and numerical techniques in electromagnetics.
This talk will highlight seven years of research at
the Berkeley Wireless Research Center (BWRC) related to mm-wave electronics. Active and passive design techniques, circuit approaches, and system architecture for short range mm-wave communication links will be discussed. The design of several key building blocks, such as the LNA, mixer, and PA will be highlighted.
THURSDAY September 18, 2008 SCV Solid State Circuits
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Sustainable Electrical Design Speaker: Mark Fisher, PE, LC, LEED AP, Integrated
Design Associates, Inc. Time: Social at 5:30 PM; Presentation at 6:00
PM; Dinner at 7:00 PM Cost: $25 (at door), $10 for IEEE Student
Members Place: Sinbad’s Restaurant, Pier 2 The
Embarcadero, San Francisco RSVP: by email to Jack Lin, [email protected],
415.551.4894 Web: www.e-grid.net/docs/0809-sf-ias.pdf
Our speaker is Mark Fisher, PE, LC, LEED AP, for Integrated Design Associates, Inc. He has 23 years experience in electric design since graduating from Penn State’s AE program. Mark has instructed courses for IES, AIA, BOMA, PGE and community colleges. He has spoken on sustainable engineering at conferences/meetings for AIA, BOMA, CASH, Green California Summit, University of Nebraska and the Architectural Engineering Institute 2007 National Conference among others. In addition, Mark also sits on the State Architect’s Green Ad Hoc Committee.
We will explore a variety of options that can be
designed into a commercial building to improve sustainability and energy efficiency. Included will be a case study of Integrated Design Associates’ (IDeAs) new facility, the first net zero energy commercial building in the country.
Please join us in welcoming our speaker to San Francisco for what is sure to be an interesting and productive session.
TUESDAY September 23, 2008 SF Industry Applications
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Heretical Views of Product Safety Orthodoxy
Speaker: Richard Nute Time: Optional dinner: 5:45 – 7:00 PM at El Torito
Mexican Restaurant, 2950 Lakeside Drive, Santa Clara (two blocks north of the meeting site). Presentation at 7:00 PM at Bowers Cafe
Cost: none, for presentation Place: Applied Materials, Bowers Café, 3090
Bowers Ave, Santa Clara RSVP: not required Web: www.ewh.ieee.org/r6/scv/pses
Richard Nute has worked in the field of product safety since 1973, mainly at Tektronix and Hewlett Packard. Mr. Nute has also worked as a manufacturing engineer, R&D engineer and engineering manager. He has contributed to the development of both national and international standards. He is currently a member of ECMA TC-12, the US TAG to IEC TC-108, and IEC TC-108, working on the hazard-based safety standard, IEC 62368. Mr. Nute is also the co-author and an instructor of "Hazard-Based Safety Engineering," a Hewlett-Packard Company proprietary course in product safety.
Mr. Nute has conducted original research in product safety and published "Dynamic Aspects of Body Impedance," appearing in Electrical Shock Safety Criteria, Proceedings of the First International Symposium on Electrical Shock Safety Criteria, edited by J.E. Bridges, Pergamon Press. He is co-holder of a patent for a ground isolation monitor.
Other publications include "Technically Speaking", a regular column of the Product Safety Newsletter. Some of these articles have been re-published in national and international magazines and most are available online. Mr. Nute twice has been an invited speaker to UL’s annual Professional Engineers’ recognition program. He is recipient of the Michael J. DeMartini award for education in the field of product safety and is both a Senior Member and a Life Member of the IEEE.
Mr. Nute holds a Bachelor of Physical Science degree from California State Polytechnic University, San Luis Obispo.
Product safety standards can be considered the
dogma or orthodoxy of product safety. Conventional wisdom about product safety derives from this orthodoxy. This presentation compares electrical engineering concepts with product safety orthodoxy and conventional wisdom. In these examples, the engineering concepts bring forth questions as to the validity of some traditional product safety concepts.
TUESDAY September 23, 2008 SCV Product Safety Engineering
MET Laboratories
EMC – Product Safety
US & Canada
• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)
Facilities in Union City and Santa Clara
www.metlabs.com [email protected] 510-489-6300
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Wireless Backhaul Trends: Future Role of Wireless, Fiber
Optics, and Copper Wire Speaker: Dr. Jonathan Wells, Founder and Principal
Partner, AJIS LLC Time: 6:30 PM Cost: none (donation to cover pizza) Place: National Semiconductor, Building E,
Conference Room, 2900 Semiconductor Dr., Santa Clara
RSVP: not required Web: www.ewh.ieee.org/r6/scv/comsoc
Dr. Jonathan Wells is Founder and Principal
Partner at AJIS LLC, an independent consultancy advising clients on microwave and millimeter-wave wireless product development, commercialization and marketing. Prior to founding AJIS, Jonathan was Director of Product Management for GigaBeam, where he had responsibility for product management, technical marketing and worldwide regulatory affairs for the company's novel mm-wave wireless technology. Before this, he led all RF and microwave product development at Stratex Networks, a leader in microwave backhaul, and ran the Wideband Product Division for Adaptive Broadband, an early adopter of unlicensed wireless access products. Jonathan has a PhD in millimeter-wave electronics and an MBA with specialization in strategic R&D management. He is a Senior Member of the IEEE, a Chartered Engineer in Europe and has over 30 published papers. He has presented extensively on every continent of the world.
Wireless operators are seeing continuous strain on
their backhaul networks. 50 million new mobile subscribers are added worldwide every month. Data usage is exploding. Future 4G technologies will require base station to deliver 100s of Mbps per site. Despite this, most base stations are currently services with just a few T1 (1.5 Mbps) copper lines. Backhaul already commands 25% or more of a wireless operator's capex budget. No longer can carriers simply lease or switch on another T1 line. Time for a rethink of backhaul strategy!
This presentation will explore backhaul trends going forward. Backhaul networks will be both scalable and multi-format. They will need to grow as networks build out, and be able to handle legacy TDM-based 2G networks as well as high-speed 4G IP-centric networks. Ethernet will place an increasingly important role. Advances in copper and fiber wireline technology will result, and higher capacity microwave and millimeter-wave radios will play an increasingly important role.
WEDNESDAY October 8, 2008SCV Communications
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Planetarium Show and Observing Party at the College of San Mateo
Speaker: Professor Darryl Stanford, College of San
Mateo Time: Networking, Pizza Social and registration at
6:30 PM, show starts at 7:00 PM sharp Cost: $10 Place: College of San Mateo, 1700 West Hillsdale
Boulevard, San Mateo RSVP: Registration is limited to the first 95 people;
register on website Web: www.ewh.ieee.org/r6/scv/leos
Professor Darryl Stanford will show a night sky
show in the nearby Planetarium. This will include stars and planets, with discussion of the deep sky objects, followed by an all dome video called "Black Holes". CSM has established America's first HYBRID planetarium and the world's first CHRONOS HYBRID planetarium in their 40 foot planetarium dome. The system consists of the GOTO CHRONOS opto-mechanical space simulator from GOTO Optical Mfg. Co.(Japan) and the Digistar 3 SP2 HD projector from Evans & Sutherland.
The CHRONOS will show over 8000 stars to about 6th magnitude, 26 deep sky objects and the Milky Way! The D3 projectors, in conjunction with Spitz ATM4, will present all-dome, surround IMAX-like sound videos, intimate planet fly-bys and Messier objects. There will also be a short Power Point presentation on CCD astrophotography and the use of CCDStack software to produce sharp images from a series of short exposures, needed to overcome light pollution in an urban environment, and enhance faint detail.
Following the planetarium show, we'll go up to the observatory (weather permitting), for some live digital CCD imaging through the 20" RCOS telescope, as well as some observing through CSM's 140mm refracting telescope.
CSM observing events are always popular and usually filled to capacity. We expect the event to sell out, so registration is limited to the first 95 people to sign up. It will be open to IEEE members and their guests only until 2 weeks prior to the event. NO WALK-INS ALLOWED - YOU MUST RESERVE YOUR PLACE IN ADVANCE.
FRIDAY October 17, 2008SCV Lasers and Electro Optics
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Multichip Module Packaging and its Impact on Server Architecture
and Operating Systems Speaker: Dr. Hubert Harrer, Senior Technical Staff
Member, IBM Server and Technology Group (Boeblingen, Germany)
Time: Seated dinner served at 6:30 PM; Presentation at 7:30 PM
Cost: $25 if reserved by Oct. 16; $30 after & at door; vegetarian available (no cost for presentation only)
Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101 frontage road at Lawrence Expressway), Sunnyvale
RSVP: by email to Janis Karklins, [email protected]
Web: www.cpmt.org/scv Dr. Hubert Harrer is a Senior Technical Staff
Member (STSM) since 2002 working in the IBM Server and Technology Group. He received his Dipl.-Ing. degree in 1989 and his Ph.D. degree in 1992 from the Technical University of Munich. In 1993 he received a DFG research grant to work at the University of California at Berkeley in the paradigm of Cellular Neural Networks. Since 1994 he has worked for IBM in the Boeblingen Packaging Department. In 1999 he was on international assignment at IBM Poughkeepsie, New York. He was leading the z900 MCM designs and is the technical lead for z-series CEC packaging designs since 2001. This includes the system z990 and system z9 mainframe computers. His technical interests focus on packaging technology, high frequency designs and electrical analysis for first and second level packaging. He has published multiple papers and holds 7 patents in the area of packaging.
An IEEE Circuits and System Society Distinguished Speaker Lecture
The presentation compares the system packaging and technologies of IBM's latest system z high end servers. Starting from the z900, the system design change towards a blade-like architecture will be explained. The latest system generation z9 has achieved a doubling of the multiprocessor performance compared to the z990 system by maximizing its CPU configuration in combination with increasing the speed of the interconnections.
The heart of a processor node consists of a multi chip module (MCM) which contains the double-core processor chip, the cache chips and the bus adaptors to the memory and the IO chips. This MCM technology is the key enabler for the high bandwidths between processor chips and the cache chips. The glass ceramic module has accomplished this challenge within the 102 layers resulting in a total wiring length of 545m. The increase of bandwidth requirements for the packaging will be compared for the last generations. Also the complex board and card technology of the second level packaging will be discussed. The cooling of the system is being done with a modular refrigeration unit (MRU), which cools the processor chips down to 45C. This low temperature ensures highest reliability and reduced leakage current of the chips. An air cooled backup mode at a lower frequency ensures that the system does not go down in case of an MRU fail. The MCM has been designed for a maximum power of 850W during nominal operation and 1200W in case of the air-cooled backup mode.
The presentation will focus on the electrical design methodologies for high end servers like power delivery concepts, signal integrity methodologies and power integrity designs for delivering such high currents.
MONDAY October 20, 2008
SCV Circuits and Systems & Components, Packaging and Manufacturing Technology, with Computer and Signal Processing
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The Evolution of MEMS Packaging –
Chicken or Egg Speaker: Paul Eugene (Gene) Burk, Jr., consultant to
MEMS companies Time: Registration at 11:30 AM, Buffet lunch at
11:45 AM, Presentation at 12:15 PM Cost: $15 if reserved by Oct. 20; $20 after & at
door Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101
frontage road at Lawrence Expressway), Sunnyvale
RSVP: by email to Ed Aoki, [email protected] Web: www.cpmt.org/scv
Paul Eugene (Gene) Burk, Jr. received his BA in Physics and Mathematics from the University of Minnesota in 1969, and his MS in Clinical Psychology from San Jose State University in 1981. He has been involved in the MEMS industry for over 40 years. He started his career at Honeywell SSEC in 1963 where he was one of the first members of the technical staff. While working there as a CVD engineer he developed processes and equipment for silicon epitaxy and CVD oxides and nitrides. He participated as the process engineer in the development of the original Hall effect sensor and early piezoresistive accelerometers and pressure sensors. In 1966 he invented the first Anisotropically etched integral-constraint pressure sensor for in-vivo blood pressure applications.
He worked at Fairchild R&D from 1969 to 1971 were he continued analytical work in piezoresistive sensors. In 1972 he was a founder of IC transducers and as VP of Engineering he led the team that invented the disposable blood pressure sensor. Mr. Burk has had Senior Management positions in Operations at ICT and IC Sensors where he has participated in building those companies to sales in excess of $10 million each.
He started his sales career with Sentir Semiconductor, now Merit Medical Systems in 1994 and along with Mr. Manny Rossell build that foundry’s revenues over 10 times in five years. He was Director of Sales and Marketing at Standard MEMS during that companies short rise and fall. He is then became the Sales Manger of MEMS Products for DALSA Semiconducteur where his leadership helped them become a leading MEMS foundry.
Mr Burk is now semi-retired and a consultant to MEMS companies in New Business Development and Strategic Planning.
The first devices using what are now called MEMS
technologies were sensors developed to overcome deficiencies in component performance and cost due to the silicon chip-package interface. The need to consider this interface has continued to the present. This talk gives a brief history of MEMS development focusing on these considerations, and provides product case studies for illustration. These include the first MEMS device and the first high-volume MEMS device, supplemented with some analysis of recent MEMS market trends. I focus on the device-package requirements from the market-driving business opportunities throughout my presentation.
THURSDAY October 23, 2008SCV Components, Packaging and Manufacturing Technology
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Electro-Optical Microscopy: Evolution in Component and
Package-Level Inspection Speaker: Andrew Kominek, Micro Analysis Group,
Keyence Corporation Time: Registration at 11:30 AM, Buffet lunch at
11:45 AM, Presentation at 12:15 PM Cost: $15 if reserved by Nov. 17; $20 after & at
door Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101
frontage road at Lawrence Expressway), Sunnyvale
RSVP: by email to Ed Aoki, [email protected] Web: www.cpmt.org/scv
Andrew Kominek is a Sales Executive and Applications Engineer with the Micro Analysis Group at Keyence Corporation. He received his B.S.E.E. from the University of Texas at Austin in 2006 and has been responsible for marketing and supporting the Keyence digital microscope in the Bay Area for the past two years. During that time he has worked with numerous companies spanning a variety of industries, including automotive, semiconductor, medical device, defense, and more recently, solar.
His efforts have been a driving force in the penetration of the solar market and have resulted in nearly a threefold increase in sales to both medical device and semiconductor industries, with sales exceeding 2.5 million dollars over the past two years. He also secured the largest quantity microscope order in Keyence America history with one of the top semiconductor equipment suppliers in the world.
This presentation introduces digital microscope
technology and its application in semiconductor development, failure analysis, and quality control. The integration of rapidly advancing digital image processing with slowly improving optical microscopy has advanced the use of microscopy as a tool for the component, process and packaging engineer. Bridging of the two technologies has allowed for unprecedented inspection and image analysis capabilities. Advanced optics and software algorithms produce high resolution images with near-infinite depth-of-field; SEM-like images are the result. Post-processing of captured images allows the user to change point of view and to make critical measurements, as well as inserting comments and arrows.
THURSDAY November 20, 2008 SCV Components, Packaging and Manufacturing Technology
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