GNDHALT

TDI_1

TCK

TMS

VREFTDO_10

Signal distribution on the JTAG cable

We will try the buffer solution first, and if it doesn’t work, try one cut cable.

GNDHALT

TDI_1

TCK

TMS

VREFTDO_10

SN74LVC126A

Cut here

VREFVREF

VREF

GND

Using driver for TCK and TMSResults (2 iterations): all 10 boards are found.Successful configuration of boards 1, 4, 5, 6, 8, 9Failure to configure boards 2, 3, 10Using Xilinx USB programmer

Cut here

Place patch here

3 shorter JTAG cable solution with drops of 3, 3, 4 each fed with a Xilinx programmer. All 3 cables the same.

Using a shorter JTAG daisy chain cable (4 boards)JTAG recommended termination in place.All boards configure all times for 4 boardsAll boards configure all times for 3 boards (end board bypassed with switch)Using Xilinx USB programmer

Cut here

Place patch here

2 shorter JTAG cable solution with drops of 5 boards each fed with a Xilinx programmer.

Using a shorter JTAG daisy chain cable (5 boards and no termination)

3 tries – all configure all times

Using Xilinx USB programmer

NOTE: initial try in this configuration did not work well as the cable used was damaged (by cutting the traces to be used for the driver test) and the traces could not be reliably repaired.This cable did not work with termination attached.

• The five drop daisy chain works reliably.• We have fabricated three 5-drop daisy chain

cables from the rest of the flex cables fabricated for the run.

• The operating configuration will consist of two 5-drop JTAG daisy chain cables driven with Xilinx USB JTAG programmers.

• We will bring the Digilent JTAG programmers (10) and the adapter boards as a backup.

Conclusions