1/14/2016 GATEPaper.in: GATE Previous Questions on Latches & Flip Flops with Solutions (1987 Till Date)

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14, 2014Friday, November

on Latches & Flip Flops withSolutions (1987 Till Date)GATE Previous Questions

1987

1. Choose the correct statements relating to the circuit of figure shown

Solution : https://www.youtube.com/watch?v=zryKYl3Dg

1988

1. The circuit given below is a

a. JK flip flop b. Johnson counter c. RS latch d. None of the above

Solution : https://www.youtube.com/watch?v=vgY4u6Yqfqo

1991

1. An SR flip flop can be converted into a T flip flop by connecting ____ to Qbarand _____ to Q.

Solution : https://www.youtube.com/watch?v=sxSeKlxdxSc

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1/14/2016 GATEPaper.in: GATE Previous Questions on Latches & Flip Flops with Solutions (1987 Till Date)

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1992

1. A new clocked XY flip flop is defined with two inputs, X and Y is in addition tothe clock input. The flip flop functions as follows:If XY = 00, the flip flop changes state with each clock pulseIf XY = 01, the flip flop state Q becomes ‘1’ with the next clock pulseIf XY = 10, the flip flop state Q becomes ‘0’ with the next clock pulseIf XY = 11, the change of state occurs with the clock pulse

a. Write the truth table for the XY flip flop b. Write the excitation table for the XY flip flop c. It is desirable to convert a JK flip flop into XY flip flop by adding

some external gates, if necessary. Draw a circuit to show how you willimplement in XY flip flop using a JK flip flop.

Solution : https://www.youtube.com/watch?v=c8PZBGHCGDQ

1994

1. For the digital circuit shown in the figure, explain what happens at nodes N1, N2, Fand F’ when

Solution : https://www.youtube.com/watch?v=yl2GD3Hetm8

1995

1. A switchtail ring counter is made by using a single D flip flop. The resulting circuitis a

a. SR flip flop b. JK flip flop c. D flip flop d. T flip flop

Solution : https://www.youtube.com/watch?v=NgHdSqy1YKw

2. An SR latch is a a. Combinational circuit b. Synchronous sequential circuit c. One bit memory element d. One clock delay element

Solution : https://www.youtube.com/watch?v=C8x2OcVIKh8

1997

1. In a JK flip flop, we have J = Q’ and K = 1. Assume the flip flop was initiallycleared and then clocked for 6 pulses, the sequence at the Q output will be

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1/14/2016 GATEPaper.in: GATE Previous Questions on Latches & Flip Flops with Solutions (1987 Till Date)

http://www.gatepaper.in/2014/11/gatepreviousquestionsonlatchesflip.html 3/6

a. 010000 b. 011001 c. 010010 d. 010101

Solution : https://www.youtube.com/watch?v=xLkAhzePI90

1998

1. In the figure shown is A = 1 and B = 1, the input B is now replaced with asequence 101010....., the output X and Y will be

a. Fixed at 0 and 1 respectively b. X = 1010... while Y = 0101.... c. X = 1010.... and Y = 1010.... d. Fixed at 1 and 0 respectively

Solution : https://www.youtube.com/watch?v=DPWbOTGp_9I

2000

1. A sequential circuit using D flip flop and logic gates is shown in figure, where Xand Y are the inputs and Z is output. The circuit is

a. SR flip flop with inputs X = R and Y = S b. SR flip flop with inputs X = S and Y = R c. JK flip flop with inputs X = J and Y = K d. JK flip flop with inputs X = K and Y = J

Solution : https://www.youtube.com/watch?v=Z9naO48RJT8

2001

1. In the figure, the output of the oscillator, V1 has 10 volts peak amplitude with zeroDC value. The transfer characteristic of the Schmitt inverter is also shown in thefigure. Assume that the JK flipflop is at time t=0.

a. What is the period and duty cycle of the waveform V2? b. What is the period and duty cycle of the waveform V3? c. Sketch V1, V2 and V3 for the duration 0 ≤ t ≤ 6 µsec. Clearly indicate

the exact timings when the waveforms V2 and V3 make high to low and lowto high transitions.

Solution : https://www.youtube.com/watch?v=Gr8CESH_ZJM

reset

1/14/2016 GATEPaper.in: GATE Previous Questions on Latches & Flip Flops with Solutions (1987 Till Date)

http://www.gatepaper.in/2014/11/gatepreviousquestionsonlatchesflip.html 4/6

2004

1. A Master – Slave flip flop has the characteristic that a. Change in the input immediately reflected in the output. b. Change in the output occurs when the state of the master is affected c. Change in the output occurs when the state of the slave is affected d. Both the master and the slave states are affected at the same time.

Solution : https://www.youtube.com/watch?v=oViyDQttV2E

2005

1. The present output Qn of an edge triggered JK flipflop is logic ‘0’. If j = 1, thenQn+1 is a. Cannot be determined b. Will be logic ‘0’ c. Will be logic ‘1’ d. Will race around

Solution : https://www.youtube.com/watch?v=3Txg02Wb8N0

2007

1. In the following circuit, binary values were applied to the inputs X and Y inputsof the NAND latch shown in the figure in the sequence indicated below: X = 0, Y = 1; X = 0, Y = 0; X = 1, Y = 1;

The corresponding stable P, Q outputs will be

Solution : https://www.youtube.com/watch?v=PEBoEN_8dW8

2008

1. For the circuit shown in the figure, D has a transition from 0 to 1 after CLKchanges from 1 to 0. Assume gate delays to be negligible.

Which of the following statements is TRUE? a. Q goes to 1 at the CLK transition and at 1 b. Q goes to 0 at the CLK transition and stays at 0 c. Q goes to 1 at the CLK transition and goes to 0 when D goes to 1 d. Q goes to 0 at the CLK transition and goes to 1 when D goes to 1

Solution : https://www.youtube.com/watch?v=FvPG9aLQcHg

2009

1. Refer to the NAND and NOR latches shown in the figure. The inputs (P1, P2)for both the latches are first made (0, 1) and then, after a few seconds, made (1, 1).The corresponding stable outputs (Q1, Q2) are

stays

1/14/2016 GATEPaper.in: GATE Previous Questions on Latches & Flip Flops with Solutions (1987 Till Date)

http://www.gatepaper.in/2014/11/gatepreviousquestionsonlatchesflip.html 5/6

Posted by GATE paper at 14:11

Labels: Flip Flops & Latches, GATE Questions

Solution : https://www.youtube.com/watch?v=CmdmJ9qQjdk

2012

1. Consider the given circuit. In the circuit, the race around

Solution : https://www.youtube.com/watch?v=VGgKVxbWrfw

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Raj Sekhar 5 months ago - Shared publicly

sir u have cleared lot of doubts ,,,,please upload remainingsubjects(EMT,COMMUNICATION and networks)

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SONU KUMAR 2 months ago - Shared publicly

thanks

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Abinash Das 2 months ago - Shared publicly

Sir can you add the 2014 paper solutions of JK flip flop?

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Add a comment as Dhruv Chauhan

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