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Gary S. VarnerUniversity of Hawai
,i
XTEST2XTEST2 A first Belle Pixel Readout Prototype
100 m
OverviewOverviewA number of options for readout of a pixel sensor for use in a B-Factory environment have been proposed. The performance requirements and demands on concurrent operation differ from those of the readout electronics being developed for the LHC project, as well as future fixed target applications. Considering these architectures, a specific technique, based upon providing maximally parallel signal encoding, has been chosen for initial prototyping tests. Designated XTEST2XTEST2, this design was optimized for use in reading out thin hybrid detectors (bump-bonded commercial electronics and custom, thin silicon pixel sensors). The use of thin sensors is required to obtain good position resolution for the low momentum tracks of interest in B meson decay. Simulation and prototyping results are presented below.
160uA
Summary/Future PlansSummary/Future PlansInitial prototyping of the XTEST2 chip has been successful in demonstrating the radiation hardness and good analog performance of components of the basic design. Unfortunately, due to wiring mistakes in the final artwork, errors precluded testing the encoding and LVDS output. These problems have been fixed and another version, XTEST2A was submitted and should be available for testing in November, 2000. While the radiation hardness of the HP0.5m process may be adequate, the design rules preclude reducing the pixel size to 40m x 60m, an eventual goal. Therefore, in the future it is envisioned to migrate to the TSMC0.25m process, recently available through the MOSIS multi-project wafer service.
50 m
Monolithic versus Hybrid
To reduce the minimum pixel size, input capacitance and material, a monolithic detector, such as shown above, is preferred.
Prototype Prototype FabricationFabrication
Testing ResultsTesting Results
Design and Design and SimulationSimulation
However, in order to utilize commercial foundries for the deep sub-mm electronics, bump-bonding is the current baseline.
A block diagram of the electronics found within each pixel cell. Upon receipt of an external trigger, a sample is stored on the capacitor shown. A voltage ramp is used to convert this voltage into a 5-bit code. A time constant, RC, is established between the storage capacitor and biasing FET, which sets the integration time. To save power, the comparator is only active during a 40s encoding period. After which, he 5 bits of ADC information from all pixel cells are multiplexed and driven off chip via a set of high-speed LVDS drivers (not shown), all within 200s.
SPICE simulation results of the performance of a given XTEST2 pixel cell ADC for the case of a linear ramp. Because the ramp voltage value can be an arbitrary function of the Gray-code encoding values, a non-linear ramp may be used to maximize the input dynamic range.
Simulation results of the noise (Equiv. Noise Charge) versus integral time , with each of the noise components shown. Results shown are for a 100m detector, after 2MRad dose.
Optimization of the Signal to Noise Ratio (SNR) by adjusting for each of 3 likely Belle trigger conditions. Again, results shown are for a 100m detector, after 2MRad dose.
Photograph of XTEST2 fabricated in the HP0.5m process during the spring of 2000. The die is dominated by the 84 wire-bonding pads around the periphery and approximately 2.5mm on each side.
16x24 ArrayDetailed view of the
layout of a single pixel cell (metal2,3 not shown for clarity). Each cell contains 36 transistors, most ofwhich are minimum size.
A Low Voltage Differential Signal (LVDS) Output driver.
Radiation test structures
20m bump pads
5-bit Gray-code
Counter
90m2 wire bond pads
A diagram showing the dominant radiation damage effect in the B-Factory environment: the shift in threshold voltage values due to charge trapping.
Measurement of threshold voltage shift versus radiation dose, indicating survival to >10MRad.
Adjustment range for the R of the RC combination. 5M is the nominal value, which is easily obtained.
2Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Overview
• XTEST2A Status– In Fab. @ HP, due back
11/10
• LCPIX0 Design– LCPIX0 design
parameters – LCPIX0 proposed
architecture– Pre-amp performance– Comparator choice and
performance– Hit time encoding– Performance simulations– Summary of performance– Remaining design work– HP0.5um
• Oct. 2, Nov. 6
3Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
XTEST2 Radiation Results
• Radiation hardness consistent with Tox
– Quite adequate total dose performance
4Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
XTEST2 Initial Prototype
LVDS Drivers
16x24 Arrayof pixels:
Gray-codeCounter
Rad-teststructures 50 m
100 m
5Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Problems 1: Gray-code Counter
6Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Problems 2: LVDS Driver
No connect
• HS LVDS test circuit also showed dynamic FF – unexpected behavior, required
redesign– no obvious problems with LVDS
driver itself
7Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
XTEST2 Performance
Results
• Successes:– 2 key
analog issues
– comparator works
– radiation tolerance
• Failures:– GCC +
LVDS– nENC
logic– DRC/LVS
• Redesigns:– better
power distrib.
– D-FF, dynamic FFs
– replaced probe pads
– cleaned up wiring
8Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
SPICE Sim.: front-to-back
9Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
SPICE example waveforms
10Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
XTEST2A Encoding
11Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Pair Monitor Specifications
– Pixel rather than strip (occupancy)
– Fast collection time --> 3D Pixel
– Trapezoidal geometry
– Radiation hard
• Conceptual Design Parameters:
12Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Simulation Input
Previous simulation results:– Reduction of drift time - model for
SPICE input?– Range/spread of
amplitudes/risetimes for TWC?
13Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
LCPIX0 Footprint
Design LCPIX0 to match sensor currently being fabbed:
Required size only slightly larger than min. allowed:– ~8 mm2
– no need for complete pad ring (control/readout much simpler)
5 mm
1.6mm
14Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Readout Electronics progress
Gaining experience in design/test of XTEST2, a pixel upgrade effort: Pixel size # Pixel
(total)Sensor
thicknessHeat disp./
cell
DELPHI 330x330m 1.2M 300m 40W
WA97 50x500m 1.2M 300m
ATLAS 50x400m 105M 200-250m 50W
CMS 150m2 56M 200-250m 60W
ALICE 50x300m 15.7M 150m 30W
BTeV 50x300m 60M 300m <40W
Belle 40x60m 3.8M 100m <1WLC-PMpix 100x100m 2.3M 100-200m
• Many common aspects of designs
Constraints:
– Smallest pixel
– thin sensor
– low power
15Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
• To improve vertexing– reduce radius
• rad hard, high occupancy, thin
Belle Vertexing Upgrade
16Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
XTEST2 Design Concept
• Simple readout structure– Decent performance w/o
pre-amp (see below)– Comparator powering
during encoding– 5-bit Wilkenson encoding
(1mV/s ~ 40s)– After encoding, fast LVDS
data transfer out
17Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Expected Performance
• Results for 100m thick
18Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Interconnect Concerns
• Excellent SNR and Timing– However,
interconnect issues:
19Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
LCPIX0 Design
• Specifications:– BX timing
possibility– TWC
implementations
– Encoding Options:
• analog ramp
• TDC • 1-2ns
resolution
• LCPIX0:– Submit in 3
months– same
process as XTEST2
– proto chips early ‘01
20Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Bump Bonding Tests
• Global tender:– only 2
companies willing to work with thin devices:
• AIT (Hong Kong)
• GEC-Marconi (U.K.)
– GEC withdrew ARO
• Concern for LHC community also
• Bonded both 300m and 100m thick devices
21Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Bump Bonding Results (1)
• Sample measurement:
22Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Bump bonding Results(2)
23Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Bump bonding Summary
• Problems encountered with 50x100m
• Probably no problem for 100x100m
• We continue to seek other solutions
Loose Indium? Bad UBM?misalignment
24Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Thinning (after bonding)
• Utilize Xe-F etcher to thin – If can protect the sides (e.g. with
photoresist), metal/others OK– Initial tests leave room for
improvement in uniformity, but solutions being sought:
25Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
• Despite some problems with uniformity– Allows bump-bonding of
thick devices– Can thin electronics
extremely thin– uniformity problems may
have easy solution
Thinning Summary
26Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
• R&D into technologies proceeding well:– Have established Rad. Hard
processes for both sensor and readout electronics
– Developing experience at handling interconnect issues
• Plans– Sensor prototype available in
2-3 months– Readout electronics
prototype design submission in 2-3 months, prototypes ~3 months thereafter
– first prototype system mid next year
Summary
27Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
LC Interation Region
Few x105 e+e- pairs/Bunch crossing
28Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Enabling Technologies:
MEMS
• Micro-Electro-Mech Structures
29Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Detector Development
Reduction of distance between electrodes:– Reduction of drift time– Reduction of depletion
voltage
300m
100m
30Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Detector Results - sensitivity
• Slow amp. readout
• Excellent resolution
• Energy deposition largely contained within a single drift cell
• though electrodes of finite extent, efficient Q acq.
31Gary S. Varner, Readout Electronics Update, 8 SEP 00 @ UHGary S. Varner, Readout Electronics Update, 8 SEP 00 @ UH
Detector Results - Leakage Current
• Excellent performance at “LHC” doses:– Respectable plateau at tolerable
leakage current– comparable ATLAS planar sensor
difficult to deplete with 600V