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Garrick Orchard CVPR Event-based Vision Workshop 17 th June 2019, Long Beach, CA Intel’s Loihi Neuromorphic Research Chip

Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

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Page 1: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Garrick Orchard

CVPR Event-based Vision Workshop

17th June 2019, Long Beach, CA

Intel’s Loihi Neuromorphic Research Chip

Page 2: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

This presentation contains the general insights and opinions of Intel Corporation (“Intel”). The information in this presentation is provided for information only and is not to be relied upon for any other purpose than educational. Intel makes no representations or warranties regarding the accuracy or completeness of the information in this presentation. Intel accepts no duty to update this presentation based on more current information. Intel is not liable for any damages, direct or indirect, consequential or otherwise, that may arise, directly or indirectly, from the use or misuse of the information in this presentation.

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No computer system can be absolutely secure. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. Intel, the Intel logo, Movidius, Core, and Xeon are trademarks of Intel Corporation in the United States and other countries.

*Other names and brands may be claimed as the property of others

Copyright © 2019 Intel Corporation.

Legal Information

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Page 3: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Spatial filters using neurons as coincidence detectors

Visual Recognition

NeuronActivation

rest

threshold

SPIKE

5 pixelsNeuron sensitive

to vertical linessynapses

3

Orchard, G.; Meyer, C.; Etienne-Cummings, R.; Posch, C.; Thakor, N.; and Benosman, R., "HFIRST: A Temporal Approach to Object Recognition," Pattern Analysis and Machine Intelligence, IEEE Transactions on vol. 37, no. 10, pp. 2028-2040, Oct. 2015

Page 4: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Visual RecognitionBasic HMAX (frames) HFirst (spikes)

Pool

Convolution

Convolution

Gabor

Templates

Pool

Convolution

Pool

Convolution

Classifier

Gabor

Templates

SVM

Max

Max

Max (first spike)

Serre, Thomas, Lior Wolf, and Tomaso Poggio. Object recognition with features inspired by visual cortex. Massachusetts Inst Of Tech Cambridge Dept Of Brain And Cognitive Sciences, 2006.

Orchard, G.; Meyer, C.; Etienne-Cummings, R.; Posch, C.; Thakor, N.; and Benosman, R., "HFIRST: A Temporal Approach to Object Recognition," Pattern Analysis and Machine Intelligence, IEEE Transactions on vol. 37, no. 10, pp. 2028-2040, Oct. 2015

Pool Max (first spike)

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Page 5: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Visual Motion Estimation

5

5 pixel regionNeuron sensitive

to rightward motion at a fixed speed

synapse delays

NeuronActivation

rest

threshold

SPIKE

Creating coincidence using delays

Orchard, G.; Benosman, R.; Etienne-Cummings, R.; and Thakor, N. "A Spiking Neural Network Architecture for Visual Motion Estimation,” IEEE Biomedical Circuits and Systems, Rotterdam, Holland, Nov 2013.

Page 6: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

pix/s20 30 50 70 90 130 270 290

Visual Motion Estimation

Orchard, G.; Benosman, R.; Etienne-Cummings, R.; and Thakor, N. "A Spiking Neural Network Architecture for Visual Motion Estimation,” IEEE Biomedical Circuits and Systems, Rotterdam, Holland, Nov 2013.

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Page 7: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

HFirst and SAVME models were both hand-tuned on very small self-captured datasets

There was a clear need for larger better datasets

Turning attention to Datasets

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Orchard, G.; Cohen, G.; Jayawant, A.; and Thakor, N. “Converting Static Image Datasets to Spiking Neuromorphic Datasets Using Saccades", Frontiers in Neuroscience, vol. 9, pp. 437, Oct. 2015

Page 8: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Applying Deep Learning to SNNs

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Two main obstacles to using backpropagation for SNNs

1) Non-differentiability of spike generation

2) Error assignment

1) Non-differentiability of spike generation

A proxy function can be used in place of the derivative

Easily and successfully implemented by many works

2) Error assignment

A neuron’s state depends on its previous inputs

Error at the current time should be distributed to these previous inputs

Largely ignored by most works

Page 9: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER

9

Spike LAYer Error Reassignment

Synapse A spike

Synapse B spike

Synapse A PSP

Synapse B PSP

Soma voltage

Error Signal

Page 10: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

A proxy function for the derivative of the spike function (s)

If at time � a small perturbation ±� of the Soma voltage � causes the spike � to change

The “derivative” can be approximated as

SLAYER

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Shrestha, S. B.; and Orchard, G.; "SLAYER: Spike Layer Error Reassignment in Time", Neural Information Processing Systems, Montreal, Canada, Dec 2018

Page 11: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: Forward Model

ANNSNN

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Shrestha, S. B.; and Orchard, G.; "SLAYER: Spike Layer Error Reassignment in Time", Neural Information Processing Systems, Montreal, Canada, Dec 2018

Page 12: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: Backpropagation

ANNSNN

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Shrestha, S. B.; and Orchard, G.; "SLAYER: Spike Layer Error Reassignment in Time", Neural Information Processing Systems, Montreal, Canada, Dec 2018

Page 13: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: Radcliffe Camera

Zenke, Friedemann, and Surya Ganguli. "SuperSpike: supervised learning in multilayer spiking neural networks. “Neural computation 30, no. 6 (2018): 1514-1541. Data licensed under GNU GPL v3

Target SLAYER

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Page 14: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: NMNIST

Shrestha, S. B.; and Orchard, G.; "SLAYER: Spike Layer Error Reassignment in Time", Neural Information Processing Systems, Montreal, Canada, Dec 2018Orchard, G.; Cohen, G.; Jayawant, A.; and Thakor, N. “Converting Static Image Datasets to Spiking Neuromorphic Datasets Using Saccades", Frontiers in Neuroscience, vol. 9, pp. 437, Oct. 2015 Dataset licensed under CC BY 4.0:

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Page 15: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: DVS Gesture

Amir, Arnon, Brian Taba, David Berg, Timothy Melano, Jeffrey McKinstry, Carmelo Di Nolfo, Tapan Nayak et al. "A low power, fully event-based gesture recognition system." In Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, pp. 7243-7252. 2017. Dataset licensed under CC BY 4.0

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Page 16: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

SLAYER: Results

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First results on Loihi!

92.23%

98.5%

Shrestha, S. B.; and Orchard, G.; "SLAYER: Spike Layer Error Reassignment in Time", Neural Information Processing Systems, Montreal, Canada, Dec 2018

Page 17: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

128x128x2 - 4a - 16c5z - 2a - 32c3z - 2a - 512 – 11

1.05M weights to learn

0.47M weights are zero

2 weights (8,9) are outside range of a 4 bit signed number

Loihi DVS Gesture Implementation

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-100000

0

100000

200000

300000

400000

500000

-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9

Weights

Weight

Page 18: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

We have come a long way from hand tuning weights and delays in tiny models on tiny datasets!

SLAYER is a thoroughly derived powerful framework for configuring SNNs

Enables learning in deep spiking networks (10+ layers)

Can learn both weights and delays

Allows learning of precise spike times and/or rates (depending on loss function)

Preliminary results indicate good translation to limited precision hardware

Summary

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Page 19: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

Thanks!

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Sumit Shrestha

Luca Della Vedova

https://nusneuromorphic.github.io/labmembers/index.html

Page 20: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation

PyTorch implementation of SLAYER (use this one!)

https://github.com/bamsumit/slayerPytorch

Singapore lab website

https://nusneuromorphic.github.io/

Links to code (SLAYER/Hfirst/SAVME), datasets (NMNIST/NCaltech101), and papers

www.garrickorchard.com

Resources

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Page 21: Garrick Orchard - rpg.ifi.uzh.chrpg.ifi.uzh.ch/docs/CVPR19workshop/CVPRW19_Garrick_Orchard.pdf · This presentation contains the general insights and opinions of Intel Corporation