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Ganesh Hegde Mobile No.: +91 9591793543 Email Address: [email protected] Career Aspiration A successful career in a growth-oriented organization which will best utilize my skills resulting in fulfillment of professional goals and growth of the organization. Professional summary 5 Years and 3+ Months of work experience accented with the latest trends and techniques of the field. Currently working with Broadcom limited, Bangalore as PC Board Designer Assct. Work experience in Circuit Schematic Entry and PCB Designing and routing. Circuit Boards Assembly (Soldering of Components). Testing and Verification. Work Experience on Standard Global Library IPC 7351B. Creation of components like CONNECTORS, BGA, SURFACE MOUNT etc. Work Experience Using the tools like Allegro, Altium15.0, Mentor Expedition and PADS. Academics Diploma in Electronics and Communication Engineering KIET polytechnic, Board of Technical Education, Karnataka May 2008 Aggregate: 66.33% “Hardware and Networking” training in Manipal Institute of Computer Education (MICE). Technical Skills

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Ganesh HegdeMobile No.: +91 9591793543Email Address: [email protected]

Career Aspiration

A successful career in a growth-oriented organization which will best utilize my skills resulting in fulfillment of professional goals and growth of the organization.

Professional summary

5 Years and 3+ Months of work experience accented with the latest trends and techniques of the field. Currently working with Broadcom limited, Bangalore as PC Board Designer Assct.

Work experience in Circuit Schematic Entry and PCB Designing and routing. Circuit Boards Assembly (Soldering of Components). Testing and Verification.

Work Experience on Standard Global Library IPC 7351B. Creation of components like CONNECTORS, BGA, SURFACE MOUNT etc.

Work Experience Using the tools like Allegro, Altium15.0, Mentor Expedition and PADS.

Academics

Diploma in Electronics and Communication Engineering KIET polytechnic, Board of Technical Education, Karnataka May 2008 Aggregate: 66.33%

“Hardware and Networking” training in Manipal Institute of Computer Education (MICE).

Technical Skills

Languages : Basic C, Assembly Languages: 8085, 8051 Design / Development tools : Cadence Or CAD, Allegro PCB Designer, Mentor

Graphics PADS. Altium15.0. Mentor Expedition, Cadence Allegro 15.7,

ORCAD DESIGN ENTRY CIS, PADSTACK designer. Platforms : Windows, UNIX

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Design Skills

PCB Design for single to multilayered (up to 20) boards. High Speed Board Design Analog, Digital and Mixed signal PCB Routing. Footprint Creation for various through hole and Surface Mount Devices (SMD)

using PCB EDITOR with pads being created in the PADSTACK DESIGNER, using Cadence Allegro 15.7 and 16.3 versions.

Net list importing from schematics and component placement. Critical component placement and verification for Board-to-Board connectors

Setting constraints for signals track length to match with clock signals. Routing, routing cleanup, length matching and plane splitting. DRC clearing according to set constraints. DDR2 and DDR3 routing. Silk screen (Legend) preparation and verification for the designed boards of

various projects. Drill legend customization and drill drawing. NC drill, Pick & Place Data generation. Property edit for the components according to the BOM and verification wrt

Manufacturer and manufacturer part number. Netlist verification wrt to schematics and imported netlists. Circuit Schematic Designing, Schematic entry, creation of symbols. Bill of Materials preparation and Validation. PCB Soldering of SMD and Through hole components. Basic Signal Integrity, Thermal, EMI EMC analysis.

Work Experience

Organization : Broadcom LimitedDesignation : PC Board Designer-AssctDuration : November 2015 – Till DateResponsibility : PCB Design

Organization : CoreEL TechnologiesDesignation : Design Engineer-PCBDuration : February 2012 – November 2015Responsibility : Circuit Schematic Designing, Library Creation Using Global Standard 7351B, PCB

Routing. CAM Check using CAM 350.

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Organization : Stem Technologies Pvt LtdDesignation : Hardware Engineer Duration : November 2010 – November 2011Responsibility : Circuit Schematic Designing, PCB Routing and Design,.

Assembly of printed circuit boards. Model Testing and bug fixing. Preparing test documents.

Major Projects:

Project #1- AEGIS_VDB_DC

Customer-TEXAS INSTUMENTSBoard Name – AEGIS_VDB_DCBoard Dimension – 250X200 mmNo. Of Layers - 20No. Of Components – 1500+ including 2no of 0.65 mm BGA with guide pins.No. Of Nets - 2000+This board used to communicate with different cards in a single cabinet which had keyed guide pins to mate with the particular card.Role: Footprint Creation, component placement wrt DXF, constraints for the board, routing, constraints for length matching, length matching, DRC Errors correction, planesplitting, Silkscreen clean up and Gerber generation.

Project #2: DVI ENCODER BOARDCustomer-KARL STORZ ENDOSCOPYBoard Name – DVI_ENCODERBoard Dimension – 119X119 mmNo. Of Layers - 12Tool - ALTIUM 15.0No. Of Components - 1800+ including one DM8148 Processor 0P8 mm pitch, one Xilinx 900pin FPGA No. Of Nets - 1600+The board mainly contains one 900 pin BGA, 684 pins one processor, Ten DDR3’s, and consists of all interfaces like Ethernet, USB, HDMI,MICRO_SD .The Board has DVI Connector and DVI-PHY also,Handled the board own for placement routing and length matching to Gerber release.

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Project #3: RCI J2KVCS (RESEARCH CENTER IMARAT JPEG2000 VIDEO COMPRESSION SYSTEM)Board Name - RCI J2KVCS ENCODER BOARD V1.0Board Dimension – 100X90 mmNo. Of Layers - 10No. Of Components - 380+ including one 484 pin, two 144 pin BGAs and two Board-to-Board Connectors to mate with IO BoardNo. Of Nets - 430+This board mainly consists of TSOP-56 SDRAM and TSOP-54 NOR FLASH with a 484 pin BGA, two 144 pin CSPBGAs and two 160 pins Board to Board connectorsRole: Footprint Creation, component placement wrt mother card, constraints forthe board, routing, constraints for length matching, length matching, DRC Errors correction, plane splitting, Silkscreen clean up and Gerber generation.

Project #4-ECIL BP (Back Plane)

Board Name – BACK PLANEBoard Dimension – 107X234 mmNo. Of Layers - 16No. Of Components – 300+ including twelve 144 pins TH connectors provided with keyed guide pinsNo. Of Nets - 800+This board used to communicate with different cards in a single cabinet which had keyed guide pins to mate with the particular card.Role: Footprint Creation, component placement wrt mother card, constraints for the board, routing, constraints for length matching, length matching, DRC Errors correction, planesplitting, Silkscreen clean up and Gerber generation.

Project #5: OTO FLEET Vehicle Tracking System

Role : PCB Design and Product Testing.

Description: It uses GPS and GSM Technology to accurately locate the geographical co ordinate of the entities (truck, car, asset etc) to which the device is attached. Records and/or sends the co ordinates along with the events (if any) to a central control room where the information can be plotted on a geographical map.

Responsibilities: Providing hardware support. Schematic design of the controller, GSM and GPS Boards. Pcb Assembly, Board testing, bug fixing, test report preparation.

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Personal Information

Full name : Ganesh Hegde Date of birth : 03-05-1986Marital status : Married.Language : English, Kannada, Hindi

I hereby declare that the above-mentioned information is correct to the best of my knowledge.

Place: Bangalore Ganesh Hegde Date :