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Guidelines for Meeting IEC60730 Class B Requirements

with FM3 MCUsSelf-Test Library Implementations


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ContentsO

1. Introduction .....................................................................................................................................3

Fujitsu FM3 Microcontrollers and Code Library ....................................................................................3

2. IEC 60730 Self-Test Library Structure ................................................................................................3

2.2. Self-Test Library: Structure of Test Routines ..................................................................................4

2.2.1 CPU Test and Fow Chart ...........................................................................................................4

2.2.2 CPU Register Test ....................................................................................................................4

2.2.3 Clock Tests ..............................................................................................................................5

2.2.4. Interrupt Test .........................................................................................................................6

2.2.5. ROM/Flash checksum integrity check .....................................................................................6

2.2.6. RAM Test (using checkerboard) and Flow Chart ......................................................................8

2.2.7. IO Peripheral Tests .................................................................................................................8

3.3. Fujitsu Self-Test Library Deliverables: ...........................................................................................9

3. Conclusion .....................................................................................................................................10


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1. IntroductionO

Fujitsu ARM Cortex FM3 family microcontrollers (MCUs) offera variety of integrated functional safety features that suit homeappliances, white goods and other motor-control applications.Fujitsu also provides an extensive library of safety-relatedsoftware routines to make these features easier to use. Becausethese software routines are compliant with International Electro-Technical Commission (IEC) safety standards, using the routines

greatly simplifies IEC certification for the final product.

This application note gives an overview of the use of Fujitsu FM3microcontrollers and code libraries to comply with the standards.The focus of this paper is on the library of self-test routines thataddress IEC 60730 Class B requirements.

Fujitsu FM3 Microcontrollers and Code LibraryAll the members of Fujitsus wide-ranging MCU family incorporatestandard ARM CPU core, tools and features, so future programmingcan build on a steady foundation. By using the de facto industrystandard ARM core, Fujitsu offers easier migration of code across

product lines and from one product generation to the next.

The high-performance 32-bit architecture of Fujitsus ARM Cortexmicrocontrollers provides the computational power necessary forhigh-energy-efficiency motor control, while the devices also offera versatile range of on-chip peripherals. The FM3 family includesBasic, High-Performance and Low-Leakage groups of MCUs thatare well suited to applications such as air conditioners, washingmachines, induction cookers and refrigerator compressors.

Supporting these hardware enhancements is a new version ofthe FM3 firmware library pre-coded digital power and motor-specific algorithms available free from Fujitsu. The Fujitsulibrary minimizes code development time and provides a way toimmediately use the MCUs on-chip safety features rather thanexpensive external devices. The library supports assembly and Cmixed coding on IAR and Keil Compiler IDE platforms.

2. IEC 60730 Self-Test Library StructureO

The Fujitsu self-test library (STL) for the 32-bit ARM Cortex FM3 Family covers IEC 60730 and IEC60335 requirements. Theselibraries use a standard application programming interface (API)between the system hardware and the application software.

Figures 1A and 1B show the self-test library solution structure.The Fujitsu Class B routines include two types of processes

start up and periodic runtime self tests: Pre-Operation Self-Test (POST): These are tests that should

be implemented at system startup. POST tests cover itemssuch as the CPU, RAM/ROM, and I/O peripherals.

Built-In Self-Test (BIST): These tests should run periodicallywhile the product is in service.

Fujitsu provides two example projects for this self-test Library:one is based on the IAR compiler and the other on the Keilcompiler.

As shown in Figure 3B, seven test items are provided: CPU,

Clock, Interrupt, Flash memory, RAM, GPIO and ADC peripheraltests. CPU test and RAM test are in assembly and all other testsare coded in C. IEC 60730_demo.c provides an example projectfor self-test library calls and an interface for user applicationsoftware.

Figure 3A. Fujitsu FM3 Self-Test Library Solution Structure


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2.2. Self-Test Library: Structure of Test Routines

2.2.1 CPU Test and Fow Chart

Flowchart for PC Test

PC (Program Counter) Test

API name

pc_test

API Description

The PC test makes use of eight subroutines and validateswhether a PC value from each subroutine is the same asa pre-defined value.

Use assembly to implement PC test due to access to PCregister directly.

As the PC is highly critical, the test is designed so thatany PC test error detected causes the program to run intoan infinite loop.

Fulfills IEC 60730 Annex H.2.18.10.2

Function Description

The PC test mainly verifies whether the routine jumps

to the right address when calling a subroutine. Thismethod can detect stuck-at errors.

2.2.2 CPU Register TestAPI Name

reg_test,

API Description

reg_test performs complete test of registers and isimplemented in privilege mode as POST.

Assembly is used to implement register tests due toaccess to registers directly.

.s .c .c .s.c

_test() 16 Test()

16 Gen()

16 Test()

()

()

()

.c

Figure 3B. FM3 Self-Test Library Project Structure

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As registers are highly critical, the test is designed sothat any register test error detected causes the programto run into an infinite loop.

Fulfill IEC 60730 Annex H.2.19.6


Fujitsu uses the checkerboard method to test the W/Roperation of registers; different test patterns are usedfor different registers. The checkerboard method is veryeffective for detecting stuck-at errors.

Flowchart for Register Test

2.2.3 Clock TestsCPU Clock Test

API name

ClkInit, ClkTestReset, ClkCnt, ClkMonInMainloop

API description

ClkInit: Set to clock test variable (upper/lower frequencyvalue, threshold value).

ClkReset: Clear clock test flag

ClkTest: Verify if clock frequency is in pre-defined range(called in watch counter interrupt handler).

ClkCnt: Count clock frequency (called in a timer interruptroutine)

ClkMonInMainloop: check occurrence of watch counterinterrupt

Fulfill IEC 60730 Annex H.2.18.10.1


This test uses the watch counter prescaler which issourced by the sub clock (32.768kHz oscillator) as thestandard clock, and tests whether the frequency of the

CPU clock is within acceptable bounds by verifying atime tick counted in a timer interrupt. The time tick ofthe timer interrupt should be same as that of the CPUclock. The case in which the CPU clock is sourced by thesub clock cannot be tested, as the 32.768kHz oscillatoris assumed accurate.

API ClkCnt is used to count a global variable frequency,which is called in a timer interrupt handler. The source clockof the timer should be the same as the CPU clock.

API ClkTest checks whether frequency is in the pre-definedrange, which is called in the watch counter interrupthandler.

API ClkMonMainloop guarantees the occurrence of thewatch counter interrupt in a defined period; this perioddepends on the threshold value set by the user application.

Verify if read

data is same with write

data

Verify if read


data

R1

R13(PPS or MPS)

R14(LR) ASPR PRISMASK

Low general register

Special register

High general register

FAULTMASK BASEPRI

R2 R3 R4 R9 R10 R11 R12R5 R6 R7 R8

Fujitsu Cortex M3 Register List

Flowchart for CPU Clock Test


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2.2.4. Interrupt TestFor example, to measure if timer03 interrupts happen fivetimes in 10 seconds, assume 10 second timing is obtained froma reload timer

Interrupt Test

API name

IntTest, IntInit

API description

IntInit initializes lower and upper occurrence frequencyof interrupts to be tested.

IntTest should be called in a certain period. It verifies ifoccurrence frequency of interrupts is in the setting range.

If the program cannot match the range, the programjumps to the interrupt error handler routine. This testbelongs to BIST.



It is assumed that IntTest is called in specified intervals,e.g. triggered by a timer or line-frequency interrupt.Each specific interrupt handler to be supervised mustdecrement a dedicated global variable (Freq). IntTestcompares that variable to predefined upper and lowerbounds, sets it to its preset value and calls an error-handling function if the limits are exceeded.

Flowchart for Interrupt Test

, , };

_upper[] = { , , , };

_initial[] = {10,10, , };

[] = { , , };

= {freq, freq_lower, freq_upper,

_initial, sizeof(freq)/sizeof(freq[0])};

?

User code

2.2.5. ROM/Flash checksum integrity checkInvariable Test

API Name

MakeHardwareCRC, HardwareCRCTest

MakeSoftwareCRC, SoftwareCRCTest

API description

MakeHardwareCRC generates CRC code using build-inCRC generator.

HardwardCRCTest checks if the CRC code generated bybuild-in CRC generator is the same as the expected CRCcode.

MakeSoftwareCRC generates CRC code with software CRCarithmetic using the same CRC generator polynomials asthe build-in hardware CRC generator.

HardwardCRCTest checks if the CRC code generated bysoftware CRC arithmetic is the same as the expected CRCcode.


CRC arithmetic in communication

The CRC code is the remainder after an input data string isdivided by the pre-defined generator polynomial, assumingthe input data string is a high order polynomial. Ordinarily,a data string gets a CRC suffix when sent, and the receiveddata is divided by a generator polynomial. If the received

data is dividable, it is judged to be correct.CRC functions

This module can either use CCITT CRC16 or IEEE-802.3CRC32, which can be configured by the CRCCR:CRC32 bit.In this module, the generator polynomial is fixed to thenumeric values for those two modes.

CCITT CRC16 generator polynomial: 0x1021

IEEE-802.3 CRC32 generator polynomial: 0x04C11DB7


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CRC generation sequence

Initial CRC control register CRCCR and initial value register

CRCINIT Write 1 to the initial value bit (CRCCR:INIT). The value of

CRCINIT is loaded into CRC register CRCR.

Write data into input data register CRCIN continuously.

Then CRC calculation starts. To obtain a CRC code, read the CRC register (CRCR).

FM3 MCU) other MCU)

Flowchart for Hardware and Software CRC Checks

:CRC

Data writting ()

Data writting ()

Data writting ()

CRC reading ()

Start ()

Initialization ()

CRC calculation ()

:DMA :CPU

Flowchart for CRC Data Read/Write


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2.2.6. RAM Test (using checkerboard) and Flow ChartRAM Test

API Names

ram_test

API description

ram_test tests all RAM area at reset handler, which isPre-Operation Self-Test (POST).

Assembly is used to implement RAM-test due to the

need to test all of the RAM area. As RAM is highly critical, the test is designed so that any

RAM test error detected causes the program to run intoan infinite loop.

Fulfill IEC 60730 Annex H.2.19.6


Checkerboard method is used to do RAM test. It is veryeffective at detecting stuck-at errors.

Checkerboard arithmetic test flow

Checkerboard arithmetic writes alternate 0 and 1 tomemory, and verifies if the write data is right by readingback the data written. This method can detect stuck-at

faults and direct coupling faults. The flow to verify one wordusing this method is shown in the flowchart below.

2.2.7. IO Peripheral TestsGPIO Test

API Name

GPIOInputTest GPIOOutputTest

API description

GPIOInputTest can check if selected IO input value is thesame as the expected value. This test is POST and shouldbe done before user code initialization.

GPIOOutputTest can check if the output value is correct.This test is POST and should be done before user codeinitialization.

Fulfill IEC 60730

Annex H.2.18.8 (input test)

Annex H.2.18.12 (output test)

Input mode: Set ADE=0,PFR=0,DDR=0

Output mode: Set ADE=0,PFR=0,DDR=1

Flowchart for RAM Test

I/O Port functionADE PFR DDR PCR EPFR

Available main function Available sub function

Analog input pin N/A 1 Disconnect *0

GPIO function input pin Peripheral function input pin

0

0

0Valid

*1GPIO function output pin GPIO function input pin (FB)

Peripheral function input pin (FB)

1Disconnect

Peripheral function output pin GPIO function input pin (FB)

Peripheral function input pin (FB)

1

Disconnect *2

Peripheral function bidirectional

pin

GPIO function input pin (FB)

Peripheral function input pin (FB)Valid *3

Peripheral function input pin GPIO function input pin Valid *4

Table 3: Example of FM3 MCUs GPIO Register Settings


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_NORMAL

_ERROR

_NORMAL

_ERROR

Check if read


data

Check if read


data

Flowchart for GPIO Test

_NORMAL

_ERROR/D>min

Flowchart for AD test

AD Test

API Name

ADTest

API Description

ADTest samples the signal from a selected A/D channeland checks if the AD convert value is in the expectedrange. If the program cannot match the range, theprogram calls the AD error handler routine. This routineis a Pre-Operation Self-Test or POST, which should beimplemented during the startup procedure.

Scan mode is used. Multi-channel mode can be tested atthe same time.

Fulfill IEC 60730

Annex 2.18.8

MB9B500 Series A/D converter

The MB9B500 Series has three 10/12-bit A/D converterswith a total of 16 channels.

3.3. Fujitsu Self-Test Library Deliverables: FM3 IEC 60730 Class B Self-Test Library (STL) source code

Example projects (based on IAR EV-board and KeilMCB9BF506 board)

FM3 IEC 60730 Class B STL User Manual and Application No


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3. ConclusionO

The introduction of IEC/UL 60730 into the design of whitegoods and other appliances will add a new level of safetyfor consumers. By taking advantage of Fujitsus FM3 FamilyMCUs, design teams can comply with the regulations whilemaintaining or reducing electronic system cost. Use of theseMCUs and the Self-Test Library enables teams to create a strongsystem-level development platform and achieve superior

performance, fast time to market and energy efficiency.

FUjITSU SEMICONDUCTOR AMERICA, INC.Corporate Headquarters1250 E. Arques Avenue, M/S 333, Sunnyvale, CA 94085-5401Tel: (800) 866-8608 Fax: (408) 737-5999E-mail: [email protected] | Website: http://us.fujitsu.com/semi

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2011 Fujitsu Semiconductor America, Inc.All company and product names are trademarks or registeredtrademarks of their respective owners.

Printed in the U.S.A. MCU-WP-21400-04/2011

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