FSBB-M and FSBB-A: Two Large Scale CMOS Pixel Sensors Building Blocks Developed for the Upgrade of the Inner Tracking System of the

ALICE Experiment Frédéric Morel (on behalf of PICSEL team of IPHC Strasbourg)

Outline

Starting point: STAR-PXL MISTRAL and ASTRAL

Description Test results

Conclusions

Starting point: Ultimate chip in STAR

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Physics data taking from March to June 2014

MIMOSA28(ULTIMATE)

Pictures Credit: Berkley Lab and IPHC

Towards Higher Read-Out Speed and Radiation Tolerance Requirements for inner and outer barrel (compared to STAR-PXL):

Main improvements required while remaining inside the virtuous circle of spatial resolution, speed, material budget, radiation tolerance move to 0.18 µm process

To enhance the radiation tolerance High resistivity epitaxial layer Smaller feature size process

To accelerate the readout speed More parallelised read-out Optimised number of pixels per column New pixel array architectures Smaller feature size process

Tight schedule (production in 2016) and large surface (10 m²) 2 readout architectures R&D in parallel

Synchronous readout: mature and robust architecture (MIMOSA28 like) Asynchronous readout: new and challenging architecture

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tr.o. sp TID Fluence T op Power Active Area

STAR-PXL <~ 200 µs < 4 µm 150 kRad 3x1012 neq/cm² 30 °C 160 mW/cm² 0.15 m²

ITS-in <~30 µs <~ 5 µm 700 kRad 1013 neq/cm² 30 °C < 300 mW/cm² 0.17 m²

ITS-out <~30 µs <~ 10 µm 15 kRad 4x1011 neq/cm² 30 °C < 100 mW/cm² ~ 10 m²

Sensors R&D for the upgrade of the ITS: Our Strategy

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R&D of up- & down-stream of sensors performed in parallel at IPHC in order to match the ITS timescalefor 2 final sensors (~3x1.3 cm²)

- Mature architecture: MISTRAL = MIMOSA Sensor for the inner TRacker of ALICE Relatively moderate readout speed (200 ns/ 2rows)

~ 200 mW/cm² , σsp ~ 5 µm for inner layers ~ 100 mW/cm² , σsp ~ 10 µm for outer layers

- Improved architecture: ASTRAL = AROM Sensor for the inner TRacker of ALICE Higher speed (100 ns/ 2rows) + Lower power

~ 85 mW/cm², σsp ~ 5 µm for inner layers

Modular design + reused parts optimising R&D time FSBB-M (Full Scale Building Block) : 1/3 of MISTRAL final sensor FSBB-A (Full Scale Building Block) : 1/3 of ASTRAL final sensor

Alternative sensor with asynchronous readout: ALPIDE Ref: Ping Yang @ PIXEL 2014

IPHC christine.hu@in2p3.fr 8TWEPP 2013

~1.2

cm

~1 cm

SUZE

~1.2 cm² array

Discriminators

SUZE

~1.2 cm² array

Discriminators

SUZE

~1.2 cm² array

Discriminators

Serial read out RD block PLLLVDS

~1.3

cm

~1 cm

Serial read out RD block PLLLVDSSUZE

~1.3 cm² array

SUZE

~1.3 cm² array

SUZE

~1.3 cm² array

MISTRAL_in ASTRAL_inFSBB_M FSBB_A

IPHC christine.hu@in2p3.fr 8TWEPP 2013

~1.2

cm

~1 cm

SUZE

~1.2 cm² array

Discriminators

SUZE

~1.2 cm² array

Discriminators

SUZE

~1.2 cm² array

Discriminators

Serial read out RD block PLLLVDS

~1.3

cm

~1 cm

Serial read out RD block PLLLVDSSUZE

~1.3 cm² array

SUZE

~1.3 cm² array

SUZE

~1.3 cm² array

MISTRAL_in ASTRAL_inFSBB_M FSBB_A

Upstream Downstream

²

Amp cDS ADC SUZE Data trans

Steering, Slow control, Bias DAC- Column-level discriminators MIMOSA: based on architecture of MIMOSA28- In-pixel discrimination AROM (Accelerated Read-Out Mimosa)è 2 rows read out at once in a Rolling shutter mode

Pixel 1

Pixel 2

Pixel N

Power density, Integration time and Spatial resolution MISTRAL for outer layers:

Sensitive area ( 3 x 1.3 ) cm² 1 SUZE per final sensor N Col = No. of Columns (modulo 32) NFSBB = No. of FSBBs per final sensor N Col /NFSBB = No. of rows Pitch Row = 13000 µm / (N Col /NFSBB ) Pitch col = 30000 µm / N Col

Pixel pitches vs Spatial resolution (sp ) sp = 7 [Pitch col x Pitch row )/(22 x 66) ]k µm

with k = ½ or 1 Empirical formula for a specific tech-

nology and architecture based on the spatial resolution of tested chip with a pixel area of 22 x 66 µm²

No. of Rows vs Readout time (TRO) TRO = 200 x (N Col / NFSBB ) / 2 ns

No. of columns vs Power density (PD) PD = P / area P = (0.117 x N Col x 2) x 1.8 + 46.5 + 0.5 x N Col / 32 mW Popt = (0.09 x N Col x 2) x 1.8 + 46.5 + 0.5 x N Col / 32 mW

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Pixel Array

Common Digital Part

Pixel Array Pixel Array

Discri Discri Discri

~3 cm

1.3

cm

2.5 mm

Total of NC columns for NFSBB pixel arrays

Upstream of MISTRAL Sensor

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Pixel optimisation: Sensing node: Nwell-PEPI diode

Optimisation = f (diode size, shape, No. of diodes/pixel, pixel pitch, EPI) No accurate model exists need submission iterations

In-pixel amplification and cDS: Limited dynamic range (supply 1.8 V) compared to the previous process (3.3 V) Noise optimisation especially against random telegraph signal (RTS) noise

Sensing diode: avoid STI around N-well diode RO circuit: avoid using minimum dimensions for key MOS & avoid STI interface Trade off between diode size, input MOS size w.r.t. S/N before and after irradiation

Beam test of MIMOSA-22THRa Detection efficiency ≥ 99.8% while Fake hit rate ≤ O(10−5) 22×33 μm² binary pixel resolution: ~5 µm as expected from former studies Final ionisation radiation tolerance assessment under way

Designed by Y. Degerli (Irfu/AIDA)Layout of 2 discri. (1 columns)

~300

µm

Pixel level Column level

MIMOSA-34Sensing node opt.

MIMOSA-32FEEAmp opt.

MIMOSA-32NRTS opt.

MIMOSA-22THRa1&2Chain opt. => 1 D/col

MIMOSA-22THRbChain opt. => 2 D/col

sf

sf

Bias Bias

sf

sf

Bias Bias

Latch

latch

Vclp

Vclp

Vref1

Vref2

ф1

ф1

ф1

ф1

ф1

ф2

Out

Outbф1

ф2cs

Power

Vclp_pix

sf

Slct_Row

2 x FSBB_M0Verify full chain

and full functionalities1.

6 cm

1.8 cm

Test Results of FSBB-M Transfer function measurement:

208 discriminators connected to 80,000 pixels SUZE activated normally pure noise measurement performed in obscurity

Perturbations due to cross-talk with modest impact on TN & FPN Submission of a corrected version next month

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TN & FPN for 17 different chips

Threshold Fake rate

4 mV 1.4 10-5

5 mV 4.3 10-6

6 mV 1.3 10-6

7 mV 4.9 10-7

8 mV 2.8 10-7

FPN in transfer function mode FPN in detection mode

TN ~ 0.87 mV FPN ~ 0.55 mV

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Upstream of ASTRAL sensor Thanks to the quadruple-well technology, discriminator integrated inside each pixel

Analogue buffer driving the long distance column line is no longer needed Static current consumption reduced from ~120 µA up to ~14 µA per pixel

Readout time per row can be halved down to 100 ns (still with 2 rows at once) due to small local parasitics Sensing node & in-pixel pre-amplification as in MISTRAL sensors In-pixel discrimination

Topology selected among 3 topologies implemented in the 1st prototype AROM-0 Several optimisations on the 2 most promising topologies in AROM-1

AROM-0

AROM-1

FSBB_A01/3 of final sensor

1.6

cm

0.9 cm

vRef1

vRef2

read

read

read buffLatch

latch

Pow

er

Powerclamp

vRef

3

Bias

Bias

Sel_

D

A1 A2cs

Power

calib

read

readca

lib

calibtest

Test Results of the Upstream Part of ASTRAL Sensor Preliminary lab test results @ 30 °C and @ 100 MHz (instead of 160 MHz)

Current acquisition board limitation AROM-1b/c

Discri alone: TN ~ 0.75 mV, FPN ~ 0.63mV Discri+pixel: TN ~ 1.1 mV, FPN ~ 0.66mV

AROM-1e tests are ongoing Discri alone: TN ~ 0.29 mV, FPN ~ 0.19mV Discri+pixel: TN ~ 0.94 mV, FPN ~ 0.23mV

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AROM-1e optimisation is validatedSome residual coupling effects are investigated

Summary

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MISTRAL: architecture validated FSBB-M:

Spatial resolution (22x33 µm² pixel) ~5 µm Integration time ~40 µs Power consumption ~200 mW/cm² Detection efficiency <~ 100 % for fake hit rate ≤ O(10−5) (beam test of FSBB-M in Oct./Nov.) Yield: 25 chips operational among 25 chips tested

MISTRAL for outer layers to be submitted in Q2/2015: Spatial resolution (36x62.5 µm² pixel) ~10 µm expected Integration time ~20 µs Power consumption ~100 mW/cm²

ASTRAL: architecture validation on going ASTRAL pixel front-end amplification (same as in MISTRAL) validation completed Downstream of ASTRAL (shares the same logic with MISTRAL) validation completed In-pixel discrimination validation completed ASTRAL exhibits 2 x faster readout and lower power consumption than MISTRAL

Integration time: <~20 µs Power consumption ~85 mW/cm² for inner layers

Conclusions

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ALICE-ITS sets a new challenge in pixelated devices Large detector areas may be equipped with granular and thin pixels (at affordable cost)

3 complementary sensor architectures developed 1st full scale prototypes fabricated in Spring ’14 1st test results

MISTRAL : rolling shutter, directly derived from the STAR-PXL sensor mature & robust ASTRAL : rolling shutter approach pushed towards its limits with in-pixel discrimination ALPIDE : asynchronous (like hybrid pixels), most challenging but highest potential

All 3 seem operational but their performance assessment is still under way Further optimisation of design parameters on-going Design finalisation in 2015 production in 2016

High potential 0.18 μm CIS process for HEP experiment Feature size, deep P-well, 6 ML, ”thick” and high-resistivity epitaxy, large reticule

New step in particle detection performances with CPS w.r.t STAR-PXL pioneering device Still room for improvement towards real potential of CPS: smaller feature size, more ML,

etc. New horizons to develop high potential CPS to reach sub-microsecond integration time, ultra

low power (few tens of mW/cm²), and high radiation tolerance.

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Thank You !