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From Technologies to Markets
© 2019
From technology to market
Stacking is becoming necessary in multiple markets
& applications
Mario IBRAHIM
Advanced packaging, technology & market analyst
June 2019
2
• Semiconductor market mutation
• 2.5D & 3D Stacking:
• 3 stacking technologies
• 2.5D & 3D platforms & market
• Where these technologies can be found?
• Stacking in High Performance Computing
• Stacking in CIS
• Embedded die stacking for automotive
• Conclusions
OUTLINE
Leti Days 2019, Yole Développement confidential
3
• The semiconductor future is different from its past
Leti Days 2019, Yole Développement confidential
SEMICONDUCTOR MARKET MUTATION
Advanced packaging at the heart of innovation
Miniaturization &
reduced footprint
Higher performance
Advanced tech nodes
Advanced
packaging
3 players are
still in this
race. High
CAPEX
How to reach?
Requirements?
Enabling advanced
technologies &
products?
HBM
TSV
3D stacking
4
Stacking technologies
Leti Days 2019, Yole Développement confidential
PACKAGING PLATFORMS – FOCUS ON STACKING
No substrate
Fan-Out WLCSP
Organic substrates
Wirebond
BGA CSP
COB
BOC
WB CSP
LGA
Flip-Chip
BGA
FC BGA
FO on Substrate
2.5D
3D
CSP LGA
Leadframe substrates
Wire Bond
QFN/QFP
SOIC
TSOP
LCC
DIP
Flip Chip
FC QFN (MIS)
Ceramic substrates
Wirebond
Hi Rel
Flip-Chip
HTCC
LTCC
Embedded Die
5Leti Days 2019, Yole Développement confidential
GLOBAL STACKING MARKET
Packaging revenue per market segment
$3 374M
CAGR 20%
$18M
CAGR 31%
$2 619M
CAGR 34%
$6 221M
$1 125M
$446M
$5M
$1 578M
2018
2024
**CAGR
+25%
**CAGR: Compound Annual Growth Rate
Telecom & Infrastructure
Mobile & Consumer
Automotive
Others
$2M
$210M
CAGR 125%
6Leti Days 2019, Yole Développement confidential
WHAT ARE THE STACKING TECHNOLOGIES
3 different technologies are used for vertical integration
Em
bed
ded
die
Hyb
rid b
ondin
gTSV
Massively used in memory stacking
Massively used in 2.5D structure based on Si interposer
Massively used in 3D stacked CIS
Massively used in 3D stacked CIS
Huge potential for memory stacking
Infant technology used in:
Automotive, Mobile, Telecom & Infrastructure
Single & multiple die(s) embedded, active(s) and passive(s)
Wafer level technologiesPanel level
technology
Courtesy of Xperi
7
Access semiconductor
Leti Days 2019, Yole Développement confidential
2.5D & 3D STACKING PLATFORMS
With / Without TSV
i-THOP FC-EIC EMIB
Hybrid BondingW
ith O
r
With
out T
SV
3D SoC
TSV
+ h
ybrid
bondin
g
With TSV
Without TSV
Stacked memory & CIS
TSV
Embedded die
Em
bedded in
substrate
8Leti Days 2019, Yole Développement confidential
WHERE CAN WE FIND STACKING TECHNOLOGIES?
Stacking technologies
Telecom & Infrastructure
Mobile & consumer
Medical & others
Automotive
iMac Pro
Gaming PC
Server
Datacenter
Switches
AI / ML
CIS MEMS & sensors
Power amplifier
Memory
SiPM
Computing unit
CIS
DC-DC converter
9Leti Days 2019, Yole Développement confidential
2.5D & 3D STACKING TECHNOLOGIES
The answer for high performance computing (HPC) market segment requirements
10Leti Days 2019, Yole Développement confidential
HIGH END HARDWARE USING STACKING TECHNOLOGIES, PRODUCT LAUNCHES
2011 2014 2015 2016 2017 2018
GPU
Volta
V100
GPU Pascal 100
*Stratix 10
FPGA
Xeon Phi processor
based on Knight
Landing processor
2019
FPGA
GPU RX Vega
DDR4 3D 64GB
GPU Fiji
DDR4 3D 128GB
Xeon Phi based
on Knights Mill
processor
FPGA Virtex
Ultrascale + 16nm
POST
FX10
Lake Crest based
product DDR4 3D 128GB
*Kaby Lake-G
processor
Yole Développement, December 2018
GPU Radeon
instinct MI60
GPU Navi
>2020
NPU on
interposer Radeon
pro
WX9100
HGX 2
based on
V100GPU
DGX 2
Alveo U200
Jericho 2
TPU3
TPU3
SX Aurora
Tsubasa
TPU3
Fuji A64FX
To be installed
in the post-K
supercomputer
DDR4
3D
256GB
FP4
* Using EMIB no TSV
11Leti Days 2019, Yole Développement confidential
EXAMPLE OF STACKING TECHNOLOGIES USAGE FOR HPC
Supply chain for Nvidia Tesla P100 GPU
• Nvidia relies on TSMC to manufacture the
P100 GPU. TSMC also provides the
interposer & assembles the module using
their CoWoS processTSMC Taiwan CoWoS process
TSMC
Taiwan
Ibiden
Japan
Samsung
Korea
TSMC
Korea
16nm node
GPU HBM2 Interposer Substrate
12Leti Days 2019, Yole Développement confidential
CIS TREND IN MOBILE MARKET
Leading players add one camera per year
Source: YOLE Status of the CCM Industry report
13Leti Days 2019, Yole Développement confidential
CIS WAFER LEVEL PACKAGING EVOLUTION
From FSI to BSI multi-stack TSV sensors
Used in iPhone
I7+:
2 wafers
interconnected
via TSV
2016
Used in Galaxy
S7:
2 wafers
interconnected
via Hybrid
Bonding
Used in Sony
XZs:
3 wafers
interconnected
via TSV
2016
2017
4 stack high CIS
& pixel to pixel
high density
interconnection
CIS under
development.
14Leti Days 2019, Yole Développement confidential
STACKING TECHNOLOGY TREND IN MOBILE
Interconnection choice depends on the required interconnection density
Backside
illumination
will
enable ~
100% fill-
factor!
Stacked
BSI - 1st-gen
Silicon bulk
TSVTSV
Interco upper-
to-lower
wafer
Backside
illumination
will
enable ~
100% fill-
factor!
Stacked
BSI - 2nd-gen
Silicon bulk
TSV
Backside
illumination
will
enable ~
100% fill-
factor!
Hybrid stacked
BSI
Silicon bulk
Interco upper-
to-lower wafer
Connection within
pixels becomes
possible
Source: YOLE Status of the CCM Industry report
15Leti Days 2019, Yole Développement confidential
STACKED CIS USE CASES IN MOBILE
Hybrid VS TSV
Sony = Hybrid Samsung = TSV
Apple iPhone X
Xiaomi Mi8 explorer
Huawei Mate 20 Pro
Oppo Find XVivo X21UD
Samsung Galaxy S9+Huawei P20 Pro
16
• In 2024, the stacked CIS market share will be around 70-80% of the global CIS production
• Switch from pure TSV stacked technology to hybrid & multi-stack technology (hybrid/fusion bonding + TSV)
• New mobile functionalities, other than slow motion, for multi-stack CIS should appear. The multi-stack CIS can beused in other applications / markets than mobile (AI, automotive, industry)
Leti Days 2019, Yole Développement confidential
CIS PACKAGING REVENUE REPARTITION BY TECHNOLOGY
17Leti Days 2019, Yole Développement confidential
EMBEDDED DIE TECHNOLOGY
Market drivers
Embedded
Die
Cost-drivenForm factor
&
integration
driven
Performance-
driven
IC
Power / audio
amplifiers
DC-DC converter RF SiP
Power appsAC-DC inverter
CIS
Electrical performance
Signal transmission
Heat management
Reliability
Can Embedded die
compete with 2.5D & 3D
technology in term of
performance & cost
effectiveness?
Die integration
foot print
18Leti Days 2019, Yole Développement confidential
AUTOMOTIVE MARKET
Where can we find embedded die in a vehicle?
DC-DC converter in Mild hybrid, 48V vehicles (hybrid & full electric)
Motor inverter
Head Lamps
Radar systems
Radar systems
CIS CISInfotainment
Voltage
regulator in
EV charger
EV
charging
station
Commercialized
R&D
19Leti Days 2019, Yole Développement confidential
EMBEDDED DIE REVENUE FORECAST
**CAGR
+49%
**CAGR: Compound Annual Growth Rate
$21M
2024
$231M
• Considered markets:• Mobile
• Automotive
• Telecom & infrastructure
• Consumer
• Medical
• Aerospace, Defense & Industry
2018
20
• Stacking technologies are driven by high performance computing & memory markets
• CIS is the biggest market for stacking. Hybrid bonding getting market shares from stand-alone TSV.Stacked CIS will have 70-80% market share of the global CIS production in 2024
• Embedded die is still an infant stacking technology. Driven by automotive, Telecom & infrastructure,its adoption is on-going. Revenue will reach $230M in 2024
• Stacking packaging revenue to reach $6.2B in 2024 exhibiting a +25% CAGR
Leti Days 2019, Yole Développement confidential
CONCLUSIONS
21Leti Days 2019, Yole Développement confidential
Contact:
Mario Ibrahim
![Yole 3DIC & TSV Interconnects July 2012 Sample[1]](https://img.pdfslide.us/doc/110x75/54650439af795974338b4c77/yole-3dic-tsv-interconnects-july-2012-sample1.jpg)
