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Fred Pollack([email protected])
Intel Fellow and Director of
Microprocessor Research Labs
February 2000
Shaping the Future of Shaping the Future of ComputingComputing
Page 2Rev 2.2 MRL e ®int l
Agenda
Mission
Key technology challenges
Direction
Summary
Page 3Rev 2.2 MRL e ®int l
Intel’s Strategy:Be the building block supplier
to the Internet economy
ClientClientPlatformPlatform
NetworkNetworkInfrastructureInfrastructure
ServerServerPlatformPlatform
SolutionsSolutions& Services& Services
Page 4Rev 2.2 MRL e ®int l
Mission of MRLIntel Architecture Focus
Develop key technologies for future microprocessors and platforms ahead of MPG’s product development groups
Develop new uses and users for our microprocessors focused on internet environment
Drive University Research in the above
Page 5Rev 2.2 MRL e ®int l
Core Technology TrendsNew Challenges in Process
Technology Scaling
Power – not Mfg – limit traditional general purpose microarchitecture improvements
Internet, Wireless, High-Performance CPUs, etc facilitate new Computing Models beyond PCs
Page 6Rev 2.2 MRL e ®int l
Technology ChallengesMicroprocessor
Circuits
Communications
Video, Vision, Speech
New models of computing
Goal: Lower-cost, lower-power, and higher Goal: Lower-cost, lower-power, and higher performance computingperformance computing
Page 7Rev 2.2 MRL e ®int l
Microprocessor Technical Challenges
High Performance Microarchitecture– Workload-optimized performance
»Scalar integer (single-thread)»Throughput oriented (multi-thread, MP)»Application-specific
Database, Web server Human Interface Communications
– Advanced performance simulation engines»Flexible environment for microarchitecture prototyping (C-based)
Compilers– advanced optimization techniques for IA64– multithreading– dynamic compilation– binary re-compilation
Page 8Rev 2.2 MRL e ®int l
Microprocessor Technical Challenges
Developing technologies beyond just increasing general purpose MIPS, e.g:– special-purpose MIPS--MMX™, SSE™ technologies– security, privacy– integration
Maintain IA32/IA64 Competitiveness and Differentiation
Page 9Rev 2.2 MRL e ®int l
Low Power, High Performance Circuits
Reduction in load capacitance
Enable 30% supply voltagescaling each technologygeneration
TransistorPerformanceat low Vdd
Circuit topologies for low supply voltage
Body bias and leakage controltechniques
High speedSignaling,on and offChip
Page 10Rev 2.2 MRL e ®int l
CommunicationsObjective:
–Reduce cost of broadband & wireless communication–While maintaining real-time performance
Enable range of programmable wireless capabilities in notebooks
– To allow notebook to smoothly move between different wireless environments
Make a fundamental core platform capability
Page 11Rev 2.2 MRL e ®int l
The Challenges--New Computing Models
Moving from machine based to human based Computing
Moving from data computing to knowledge computing
Computing available at anytime and anywhere
Page 12Rev 2.2 MRL e ®int l
The Core Technologies that Will
Shape the Future of ComputingInternet is the backbone and data sourceXMLWireless: HomeRF, Bluetooth, G3 CellularBroadband: Cable, xDSL, SatelliteVideo, 3D GraphicsSpeech, Natural Language Understanding, VisionJini, UPnP, Inferno for Distributed ComputingIncreasing Processor Performance
Page 13Rev 2.2 MRL e ®int l
Direction
Looking at Non-PC Computing Models for New Uses and Users
Many new/emerging technologies will shape the future of computing–Expect a lot of experimentation
Page 14Rev 2.2 MRL e ®int l
Smart Visual ComputingPrototype New Usage Models and Environment
–Internet Media: SceneGrid, CDS, Smart mobile environment, Office of the future, Large scale information visualization
Compelling Applications–Video navigation, Visual input, etc.
Enabling Technique/Infrastructure –MPL, CVL, Media I/O - (Hydra, Lightening2), CML, Digital
Watermark for MPEG, etc.
Technology Research–Easy-to-use video, digital watermark,vision algorithms,
interactive image/video/graphics-rendering, etc.
Page 15Rev 2.2 MRL e ®int l
Speech ResearchRealize intelligent, connected, listening, talking and
seeing computing devices
Develop next generation human-computer interface in HW & SW technology
Develop network-based intelligent knowledge decision support system
Collaborate inside & outside Intel on technology R&D
Page 16Rev 2.2 MRL e ®int l
MRL Research DirectionDevelop 0.10µ Circuit technology (power, speed,
density, SER)
Develop next generation cost/power-efficient µarch/compiler techniques for IA
Develop core platform technologies for IA platforms (eg in security/privacy, RAS, Signaling, Interconnect)
Develop core technology for increasing the efficiency of the storage hierarchy
Develop core human interface technologies for Internet Computing (speech, TTS, NLP, video, vision, pen, etc) – Smart Computing
Drive University Research in the Above
Page 17Rev 2.2 MRL e ®int l
MRL Labs(Santa Clara, California; Hillsboro, Oregon;
Beijing, China; Haifa, Israel)Circuit Technology
–Hillsboro; Shekhar Borkar; [email protected]
Architecture– IA64; Santa Clara; Ralph Kling (acting); [email protected]– IA32; Haifa; Ronny Ronen; [email protected]– IA64+Storage-Hierarchy; Hillsboro; Konrad Lai; [email protected]–John Shen joining us in July
New & Emerging Platforms–Hillsboro; Wen-Hann Wang; [email protected]
Privacy/Security–Hillsboro; Ticky Thakkar; [email protected]
Page 18Rev 2.2 MRL e ®int l
MRL Labs (cont’d)
Compilers and Java–Santa Clara; Jesse Fang; [email protected]
Graphics, Video, Vision–Santa Clara; Bob Liang; [email protected]
Speech, Natural Language Understanding–Beijing; Robert Yung; [email protected]
Me and my Admin–Santa Clara; Judith Anthony; [email protected]– In-the-Air; Fred Pollack; [email protected]
Page 19Rev 2.2 MRL e ®int l
Summary:The Challenge & Opportunity
To Shape the Future of Computing
