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Physics and Computing Issues Harry Cheung ( Fermilab ) Presenting work of the Tracker Upgrade Simulations Group. Focus on Physics Case for Pixel Upgrade TDR Upgrade Pixel Software and CMSSW Integration Pixel Upgrade Simulation Tracking Performance - PowerPoint PPT Presentation
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Physics and Computing IssuesPhysics and Computing Issues Harry Cheung ((Fermilab)Fermilab)
Presenting work of the Tracker Upgrade Simulations GroupPresenting work of the Tracker Upgrade Simulations Group
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 1
Focus on Physics Case for Pixel Upgrade TDRUpgrade Pixel Software and CMSSW Integration
Pixel Upgrade SimulationTracking Performance
Software and Computing Issues for Physics Case
Introduction: Focus on TDRIntroduction: Focus on TDR
Demonstrate and strengthen physics case for upgrade TDRUpdate simulation studies and results for tracking performance
• CMSSW software version update, tracking, details in parallel session
• Sridhara Dasu will present on other subsystems
Study pixel Phase 1B scenario (with modified inner layer)• Smaller pixel size, thinner sensor (lower threshold), smaller radius
Demonstrate gain for upgrade in at least one physics channel• Use CMSSW, update on data samples & software/computing issues
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 2
Pixel Phase 1 GeometryPixel Phase 1 Geometry
Phase 1 pixel detector replacement4 barrel layers, outermost layer closer to TIB
3 FPIX disks per side, split into inner and outer disks
New ROC chip, readout, power, cooling, etc.: Total material less than in current pixel detector
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 3
Phase 1 BPIX geometry
Current BPIX geometry
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 4
Pixel Upgrade Material BudgetPixel Upgrade Material Budget
Reduced material even with more layers“Volumes” Mass (g)
Current Design Upgrade As Simulated
BPIX <2.16 16801 6618 6686
FPIX <2.50 8582 7024 7040
Rad. Len. Nucl. Int. Len.
Dots – Curr geom
Green – Upgrade
Pixels Pixels
Upgrade SoftwareUpgrade Software
Upgrade simulation software is part of CMSSWMostly integrated (incl. bug fixes, speedups). Have CMSSW release CMSSW_4_2_3_SLHCx (Stick with this for TDR studies)
Some code in branches still to be merged in CMSSW main trunk• Implement fake conditions and data loss scenarios (e.g. via upgrade DB
entries and global tags)
• Rid of hardcoded parameters e.g. pixel size, threshold, ADC bits, tracker geometry (e.g. via merged code with configurable parameters)
• Tracking software changes to account for extra pixel layers (e.g. seeding) (via merged code with configurable parameters)
• Change parts of Fastsim geometry that are hardcoded (need FW solution)
Tracking studies for TDRUse CMSSW_4_2_3_SLHCx with CMSSW_4_4_X tracking
• Iterative tracking changes for CPU and memory reduction
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 5
Upgrade TrackingUpgrade Tracking
Study at 2×1034 cm-2s-1,<PU>=50 (100) for 25 (50) nsData loss used in simul. due to ROC/readout limitations (from TP)
Tracking steps modified for upgrade geometry and high PUExtra layer: quadruplet seeds and efficient triplet seeding (3-out-of-4)
Tuning of tracking steps for <PU> of 50 and 100 to reduce fakesDrop pair seeds, low pT seeds, and detached tracking steps
Optimization still ongoing
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 6
Current Detector
Radius
(cm)
% Data loss at 21034 @25ns
% Data loss at 21034 @50ns
BPIX1 4.4 16 50
BPIX2 7.3 5.8 18.2
BPIX3 10.2 3.0 9.3
FPIX1&2 3.0 9.3
Phase 1 Detector
Radius
(cm)
% Data loss at 21034 @25ns
% Data loss at 21034 @50ns
BPIX1 3.9 4.7 9.4
BPIX2 6.8 1.5 3.1
BPIX3 10.9 0.6 1.2
BPIX4 16.0 0.28 0.59
FPIX1-3 0.6 1.2
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Using MultiTrackValidator, Muon flat pT, high purity tracks
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 7
No Pileup<PU>=50 no data loss
<PU>=50 with (Pixel ROC) data loss
Efficiency
Efficiency
eta
pT
Fake Rate
Fake Rate
Effect of ROC data loss: Loss of tracking efficiency, fake rate the same
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Using MultiTrackValidator, ttbar sample, high purity tracks
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 8
No Pileup<PU>=50 no data loss
<PU>=50 with (Pixel ROC) data loss
Efficiency
Efficiency
eta
pT
Fake Rate
Fake Rate
Effect of ROC data loss: Loss of tracking efficiency, fake rate the same
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Using MultiTrackValidator, ttbar sample, high purity tracks
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 9
Current Pixel GeometryPhase 1 Upgrade Geometry
Efficiency
Efficiency
eta
pT
Fake Rate
Fake Rate
No Pileup
Upgrade improves tracking efficiency, and fake rates at high PU
Transverse IP Resolutions vs pTransverse IP Resolutions vs p
Compare Std Geometry and Phase 1 zero PU using muons
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 10
1.5 < η < 2.0 2.0 < η < 2.5
1.0 < η < 1.50 < η < 1.0Current Pixel Geometry
Phase 1 Upgrade Geometry
Longitudinal IP Resolutions vs pLongitudinal IP Resolutions vs p
Compare Std Geometry and Phase 1 zero PU using muons
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 11
1.5 < η < 2.0 2.0 < η < 2.5
1.0 < η < 1.50 < η < 1.0Current Pixel Geometry
Phase 1 Upgrade Geometry
Primary Vertex Resolution vs NPrimary Vertex Resolution vs Ntktk
Compare Std Geometry and Phase 1 zero PU and <PU>=50 using ttbar
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 12
No pileup
No pileup
<PU>=50
<PU>=50
Transverse
Longitudinal
Current Pixel Geometry
Phase 1 Upgrade Geometry
B-Tagging PerformanceB-Tagging Performance
Using b-tagging validation, ttbar sample, no pileup
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 13
No Pileup
Track Counting HE
Simple Secondary Vertex HE
Combined Secondary Vertex
B-Tagging PerformanceB-Tagging Performance
<PU>=50, ttbar, no tuning of b-tag algos
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 14
No tuning done for high pileup: CVS seems to
perform the best at high PU
<PU>=50
Track Counting HE
Simple Secondary Vertex HE
Combined Secondary Vertex
B-Tagging PerformanceB-Tagging Performance
<PU>=50, ttbar, effect of ROC datalossImprovement for upgrade geometry even without ROC data loss
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 15
<PU>=50 with (Pixel ROC) data loss<PU>=50 no data loss
CombinedSecondaryVertex b-tagging algorithm
B-Tagging PerformanceB-Tagging Performance
<PU>=50, ttbar, no tuning of b-tag algos
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 16
Medium
Significant improvement in b-jet tagging efficiency at fixed mistag rate, (or in mistag rate for fixed b-jet tagging efficiency
B-Tagging PerformanceB-Tagging Performance
Compare <PU>=100 and 50, ttbar, no tuning of b-tag algos
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 17
Need tuning and optimization of tracking and b-tagging algorithms at <PU>=100
Relevant if we run with 50 ns crossing time at 2×1034 cm-2s-1
Simulations for Physics CaseSimulations for Physics Case
Study the boosted ZH μμbb-bar channel as in the TPChannel still relevant in the >100 fb-1 regime
Use CMSSW simulation instead of generator analysis used in TP
Use Modified Fastsim: simhits (including PU) from fastsim but then the regular Fullsim digi steps and full track pattern recognition
• Faster and lower memory usage, Fullsim digi+reco step needs >4GB RAM/job slot (max 2-3 GB/slot on GRID)
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 18
Geometry Phase 1 (s) Current (s)
Fulsim (CPU/evt) GEN+SIM 88 83
Fullsim (CPU/evt) digi+full reco PU=50 85 66
Modified Fastsim (Full process) PU=50 39 (4.4x faster) 17 (8.8x faster)
Fullsim (CPU/evt) digi+full reco PU=100 ~1225 260
Modified Fastsim (Full process) PU=100 286 (4.6x faster) 58 (5.9x faster)
ttbar:LPCCAF
““Validate” Modified Fastsim 4 PhysicsValidate” Modified Fastsim 4 Physics
Compare modified Fastsim vs Fullsim, ttbar, No PileupModified Fastsim: use Fastsim for simhits & pileup only
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 19
Phase 1 geometry Current GeometryFullsim
Modified Fastsim
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Compare Fastsim, ttbar, <PU>=50Modified Fastsim: use Fastsim for simhits & pileup only
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 20
Phase 1 geometry Current GeometryFullsim
Modified Fastsim
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Compare Fastsim, Muon gun (flat pT), No Pileup
Modified Fastsim: use Fastsim for simhits & pileup only
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 21
Phase 1 geometry Current GeometryFullsim
Modified Fastsim
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Compare Fastsim, Muon gun (flat pT), <PU>=50
Modified Fastsim: use Fastsim for simhits & pileup only
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 22
Phase 1 geometry Current GeometryFullsim
Modified Fastsim
B-Tagging PerformanceB-Tagging Performance
Compare Fastsim, ttbar, No PileupModified Fastsim b-tagging performance similar for a wide operating
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 23
CombinedSecondaryVertex b-tagging algorithm
Phase 1 geometry Current Geometry
B-Tagging PerformanceB-Tagging Performance
Compare Fastsim, ttbar, <PU>=50Modified Fastsim b-tagging performance similar for a wide operating range of b-jet b-tagging efficiencies (despite fake rate difference)
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 24
CombinedSecondaryVertex b-tagging algorithm
Phase 1 geometry Current Geometry
B-Tagging PerformanceB-Tagging Performance
Compare Fastsim, ttbar, <PU>=50Modified Fastsim b-tagging performance looks similar enough at <PU>=50 to do comparative physics studies
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 25
CombinedSecondaryVertex b-tagging algorithm
Fullsim Modified Fastsim
B-Tagging PerformanceB-Tagging Performance
However! Compare Fastsim, ttbar, <PU>=100Modified Fastsim b-tagging performance very different from Fullsim!
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 26
CombinedSecondaryVertex b-tagging algorithm
Current Geometry
MC Samples RequestedMC Samples Requested
10K Fullsim signal & background samples producedSamples look okay to proceed with large samples
10K modified Fastsim samples being validated
Fullsim GEN-SIM samples requested, being processed
Need to request digi+reco with AOD output after thisTake ~1-2 weeks on 1000 job-slot farm (not unreasonable timescale)
Started working with CMS VHbbAnalysisNewCodeLearning stage (more complex than generator analysis)
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 27
Channel Description Number Requested
ZHμμbb HERWIGPP_POWHEG_H120_bbbar_Z_ll_14TeV 250K
ttbar TTbar_Tauola_14TeV 500K
ZZ ZZ_MMorBB_TuneZ2_14TeV_pythia6_tauola 500K (may need 2M?)
Z+jets ZMM_14TeV 500K (may need 36M?)
Minbias for PU MinBias_14TeV 2.5M
SummarySummary
We have updated the fullsim MC results for tracking and b-tagging performance for the TDR. Shows that the Phase 1 upgrade pixel detector can provide significant improvements at 2×1034 cm-2s-1
Can still improve tuning of track reconstruction, and investigating high pileup performance of the b-tagging algorithms (to improve it – it’s a core CMS task)We need (new) results for the Phase 1B scenario
A modified Fastsim can significantly reduce CPU time and memory usage, and can be used for generating samples for a physics study
The tracking efficiency and b-tagging performance of the modified fastsim compares well with the Fullsim, for ttbar, but some differences in muon efficiencies at <PU>=50 and significant differences for b-tagging at <PU>=100
In the process of generating fullsim and fastsim AOD samples relevant to the associated Z(μμ)H(bb-bar) analysis
Working with the “official CMS” VHbb analysis code (learning stage)Will need to produce larger background samples (use Fastsim if validated)Could use more help for this
We have a 4_2_X version of the Phase 2 simulation alsoIn use by Track Trigger Task Force, see talks in Tuesday meeting
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 28
Backup SlidesBackup Slides
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 29
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 30
Standard Tracking StepsStandard Tracking Steps
4_4_0_pre6 tracking steps: includes pair seeds, lower pT seeds, and detached tracks
Iteration Seeds pT cut (GeV)
d0 cut (cm)
dz cut (cm)
Min hits
Max lost hits
0 pixel triplets 0.6 0.3 3.0σbs 3 0
0.5 pixel triplets 0.2 0.3 3.3σbs 3 1
1 pixel pairs with vtx 0.6 0.1 0.09 3 1
2 pixel triplets 0.1 1.0 3.3σbs 3 1
3A pixel +(TEC(1 ring)) triplets
0.3 2.0 12.0 3 0
3B BPIX+TIB triplets 0.4 2.0 12.0 3 0
4 TIB, TID, TEC pairs (fewer)
0.5 2.0 10.0 7 0
5 TOB, TEC pairs 0.8 5.0 10.0 7 0
Tracking Efficiency & Fake rateTracking Efficiency & Fake rate
Using MultiTrackValidator
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 31
Tracking efficiency = #sim trks assoc. to reco trk
#sim trks
(for signal sim tracks only)
Tracking fake rate = #reco trks not assoc. to sim trk
#reco trks
(for “all” reco tracks)
TIB Efficiency StudyTIB Efficiency Study
Tracking efficiency for (TIB1,2 @ 80% vs 100%), high purity tracks
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 32
Using ttbar sample
Look at tracking efficiency when the TIB1,2 layers are 80% efficient.
Data loss implemented as a random inefficiency (simulating specific dead modules associated with possible future failed cooling lines needs to be done.)
TIB Efficiency StudyTIB Efficiency Study
Ratio of tracking efficiency for (TIB1,2 @ 80% / TIB1,2 @ 100%)
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 33
Using ttbar sample
Tracking efficiency degrades much more at <PU>=50 when the TIB1,2 layers are 80% efficient.
The degradation is worse for the current geometry compared to the Phase 1 geometry. We can gain about 10% per tracks in the central region.
TIB Efficiency StudyTIB Efficiency Study
Track fake rates for TIB1,2 @ 80% and TIB1,2 @ 100% efficiency
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 34
Using ttbar sample
Look at tracking fake rate when the TIB1,2 layers are 80% efficient.
Data loss implemented as a random inefficiency (simulating specific dead modules associated with possible future failed cooling lines needs to be done.)
TIB Efficiency StudyTIB Efficiency Study
Ratio of track fake rates for (TIB1,2 @ 80% / TIB1,2 @ 100%)
CMS Upgrade Workshop, 7 Nov 2011 H. W. K. Cheung (FNAL) 35
Using ttbar sample
Track fake rates also increase more at <PU>=50 when the TIB1,2 layers are 80% efficient.
The increase in fake rate is higher for the current geometry compared to the Phase 1 geometry.
Beware! Results will depend on tuning for tracking!