FNAL STT Meeting H.Evans 8/9/99 Communication & Control H.EvansColumbia U. Overview of FRC Functions: Road Info STCs,TFCs –Device Independent Data

FNAL STT Meeting 1H.Evans 8/9/99

Communication & Control

H.EvansColumbia U.

Overview of FRC Functions: Road Info STCs,TFCs

– Device Independent Data Format

SCL STCs,TFCs,ZVC(c.f. MBT)

– L1 Info: to other boards– L2 Info: to Buffer Control– SCL Init

L3 Buffers All(c.f. VRB)

– Define Standard L3 Buffer Unit– Buffer Protocol

Status/Mon. All

– Init / Busy / Error– Monitoring Registers

(c.f. MBT)


Roads + L1-SCL

Init / Busy / Error

G-Link Conv (CFT)

FRC (road)

SCL Mezz

FRC (scl)

FRC (buff-ctrl)

SMT Fiber

G-Link Conv

(SMT)

STC (clus)

STC (assoc)

16 evt

16 evt

TFC (fit)

TFC (format)

TFC (xmit)

L3 STC Clus-Buff

(r-phi)

L3 STC Clus-Buff

(z)

ZVC

L3 STC Assoc-Buff

L3 TFC Fit-Buff

L3 FRC Road-Buff

1 evt

L1CTT

SCL Hub

L2CTT MBT

L1 Info

L1 / L2

Buffer Control

FRC (cntrl)

Status

STC (cntrl)

Status

TFC (cntrl)

Status

16 evt


Road Data Format

Information Bits Comments

L1 SCL 40 Unique Event ID

L1_TURN 16 L1 Accept Turn No.

L1_BX 8 L1 Accept BX No. this Turn

L1_QUAL 16 L1 Trigger Qualifiers

*Track Count 32 gen local trk no. on STC,TFC

L1CTT Header 128 (see following)

L1CTT Data 40/32 must pass all info

*STT Trk No. 6 local trk no. in to STC,TFC

L1CTT Data 32 (see following)

… … …

L1CTT Trailer 32 (see following)

Control Info Required with each word– Valid Data

– End of Event

– CLK

3 Extra Bits for each word transferred


L1CTT Data Format

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

HEADER

Header Length No. of Objects

H-Form Object Format Object Length

Bunch Number Data Type

Rotation Number Rotation Number

(Algorithm min ver) (Algorithm max ver)

Status Bits Proc. Bits (firmware ver)

P N No. Trks Pt2 (<46) P N No. Trks Pt1 (<46)

P N No. Trks Pt4 (<46) P N No. Trks Pt3 (<46)

DATA

S PtBin Ext Pt H L Err Code R PSC RA

Relative (0-43) Is eI Track Sector Address

TRAILER

Data Type Bunch Number

Longitudinal Parity Longitudinal Parity

See M.Martin: http://d0server1.fnal.gov/www/protocols/


L1CTT Glossary (Abridged)

Header– P/N Some Trks w/ Pos/Neg Pt

– No. Ptx No. of Trks in Pt Bin x

Data– S Sign of Trk

– Pt Bin Pt Bin Number (0-3)– Ext. Pt Bin-1 (1.5-3 GeV) A-Offset

Bin-2 (3-5 GeV) A-OffsetBin-3 (5-10 GeV) Pt-InfoBin-4 (10- GeV) Pt-Info

– H/L Trk assoc w/ Hi/Lo PS Clust

– Err Transmission Errors– R PS Clust assoc in adjacent

sect– PSC RA Rel. Addr of PS Clust

– Rel H-Layer Fiber Number

– Is Isolated Track

– eI Isolated Electron– Trk Adr Address of 4.5o wedge of Trk


Serial Command Link

Steal as much as possible from MBT– see MBT TDR (ver. 5 - 5/24/99)

http://macdrew.physics.umd.edu/dzero/trigger/mbt.html

L1 Accept– L1_TURN, L1_BX, L1_QUAL sent to:

STCs, TFCs, ZVC(?) as 1st element of Road Data

FRC Buffer Control to request next Buffer

L2 Accept– L1_TURN, L1_BX, L3_TRAN_NO sent to:

FRC Buffer Control to initiate Buffer Transfer


SCL (cont.)

SCL Init Sequence

Command Implementation

1) FRC Rec Init from Hub mezzanine

2) FRC Send Init to all Card User pin

3) FRC INIT_ACK to Hub mezzanine

4) FRC Clear L1/L2_ERROR mezzanine

5) All Receive Init from FRC User pin

6) All Raise Local Busy VME stat reg

7) All Start Init Sequencewait until all Inputs are clearsend Init Done signal

8) FRC Poll all Local Stat Regs VMEor Wait for local init_ack’s User pin

9) FRC Clear INIT_ACK mezzanine

Have to be ready for SCL Init on any 132 ns SCL word !


Buffers and Control

Steal from VRB / VRBC– see ESE-SVX-950719 (7/1/99)

http://www-ese.fnal.gov/eseproj/index/svxii/svxii.htm

Possible System: FRC(buff) acts as Buffer Manager for

all L3 Buffer Units in system– sends same control signals to all Units

basically: Write to Buffer iL1 AccRead from Buffer jL2 Acc

– All buffer number management at FRC– control signals derived from L1/L2 SCL decouples SCL from rest of system

(aside from road data)

Use same L3 Buffer Unit on all cards– simplifies I/O– use L3 Buffer Unit on FRC ?

Control Protocol = a subset of VRBC


L3 Buffer Unit

Buffer (MPM)

Cmd/Addr

Decode

RW

Status Format/Xmit

Route & Count

Data Source

Buffer Controller

Output FIFO

16 evt

Input FIFO

Route & Count

VME VBD

Enable/Reset/Busy/Error

Enable/Reset/Busy/Error

Addr ErrorFIFO full

Data

Message

Data

Data

Count/Ovfl

C/O

Data

Pointer

Count / Status

Busy/Error


VRB Buffer Protocol

Messages: – 12+2(?) bit Field on Ext Ctrl Port– Bits 11..8 Type

7..0 Value– Control 1..0 Valid,CLK

No. Name Purpose

1 Readout Buffer No. L1: next in buff no.

2 unused

3 Bunch Crossing No. L1: consistency

4 Scan Buffer No. L2: VRB out buffer no.

5 Event No. L2: event label

6-12 unused

13 Clear Errors clear errors - no reset

14 Reset/Restart reset fifos/reinitialize


Buffer Protocol (cont.)

Status– in VRB: open collector TTL on J5/6– OR of all modules

No. Name Purpose

0 Readout Busy L1: in buffer busy

1 Scan Busy L2: out buffer busy

2 Sync Error Data Link Sync Error

3 Frame Error Non-Valid Data Word

4 Identifier Error Invalid Event ID

5 Format Error Data Format Error

6 Controller Error Invalid Message

7 VRB Error Buffer Overflow


STT Control / Status

Fast Status User pins– Event-by-Event Comm. w/ Trigger– Lines to FRC are OR of all boards– SCL Init / Restart

from FRC– Busy / Error / Init Ack

to FRC– Each board must define

Actions for Init / Restart(w/in guidelines of SCL Init Sequence)

conditions for Busy / Error

Monitoring VME Regs– Steal from MBT (?)– Use Standard Monitoring Registers

same memory maps


FRC To Do List (from BU)

Check for Truncation Scheme Biases Define Road Info Data Format Decide Where Reformatting of L1CTT

Info will be Done Decide on Communications Medium Identify SCL Info Needed Define Data to L3 Define Buffer Control Protocol Define Monitoring Data / Monitoring

Control

Long List of Internal FRC Decisions…

Done First Pass Still Pending

Documents

FNAL STT Meeting H.Evans 8/9/99 Communication & Control H.EvansColumbia U. Overview of FRC Functions: Road Info STCs,TFCs –Device Independent Data