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UM11301 FlexGUI for Q100 v1.0.0 Rev. 1 — 13 November 2019 User guide 1 Introduction This document describes the FlexGUI extension for the Q100 family of extreme switches. How to understand this user guide 1. Get familiar with supported devices, revisions and kits. 2. Get familiar with the required hardware setup and configuration of individual kits. See Section 2 "Hardware preparation" . 3. Learn how to control devices from a given product family. See Section 3 "Device family extension" . 4. Learn how to use the provided feature tabs for configuration and device control from a given product family. See Section 4 "Feature Tabs" . Recommendation: See related user guides and data sheets for more detailed information of target devices and evaluation kits. References to these documents are in Section 7 "References" .

FlexGUI for Q100 v1.0 · FlexGUI for Q100 v1.0.0 Rev. 1 — 13 November 2019 User guide 1 Introduction This document describes the FlexGUI extension for the Q100 family of extreme

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Page 1: FlexGUI for Q100 v1.0 · FlexGUI for Q100 v1.0.0 Rev. 1 — 13 November 2019 User guide 1 Introduction This document describes the FlexGUI extension for the Q100 family of extreme

UM11301FlexGUI for Q100 v1.0.0Rev. 1 — 13 November 2019 User guide

1 Introduction

This document describes the FlexGUI extension for the Q100 family of extreme switches.

How to understand this user guide

1. Get familiar with supported devices, revisions and kits.2. Get familiar with the required hardware setup and configuration of individual kits. See

Section 2 "Hardware preparation".3. Learn how to control devices from a given product family. See Section 3 "Device

family extension".4. Learn how to use the provided feature tabs for configuration and device control from a

given product family. See Section 4 "Feature Tabs".

Recommendation:

See related user guides and data sheets for more detailed information of target devicesand evaluation kits. References to these documents are in Section 7 "References".

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NXP Semiconductors UM11301FlexGUI for Q100 v1.0.0

UM11301 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.

User guide Rev. 1 — 13 November 20192 / 13

Table 1. Supported devices and revisionsDevice Model Revision List of Features

Q100-MC33XS2410 A0, B0 • Four fully-protected 100 mΩ / dual 50 mΩ (at 25 °C) high-side switches• 4 × 1.4 A DC (Pd 1.5 W @ TJ 150 °C) or 2 × 2.8 A DC in parallel mode configuration• Floating power output architecture to drive all type of loads• 16-bit SPI port communication 3.3 / 5.0 V compatible with daisy chain capability• Outputs controllable via SPI-bus or direct inputs• Diagnostic status reported via SPI bus• Watchdog for invalid commands or inactive SPI, with programmable timeout• Programmable interrupt generator that reports to FAULT pin or SPI bus• Four independent PWM module programmable from 0.5 to 2.0 kHz• Protection for battery transient overvoltage and reversed polarity battery connection• Configurable safe mode• Standby mode with very low power consumption• 10 mA open load detection in ON state• Latch off with configurable auto retry• Severe short-circuit and overload protection• Programmable active current limit threshold to minimize short-circuit effect• 12 bits ADC:

– Current from 5.0 mA to 5.0 A with ± 3 % above 100 mA, ± 4.0 mA at 10 mA– Voltage from 0.5 to 65 V with ± 5 % above 5.0 V– Temperature warning for each channel plus central die monitoring

• Qualified in accordance with AEC Q100 grade 1• Electrical transient disturbance immunity according of ISO 7637-2, ISO 16750-2• Automotive, truck and off-highway equipment• 12 V and 24 V systems as well as industrial applications up to 60 V• LED modules• Solenoids valve and solenoid valve proportional with PI regulation• DC motor up to 20 W with PWM control• Lamps up to 21 W• ECU module with large input bypass capacitor, 470 μF and above

Table 2 describes the NXP kits supported by FlexGUI. Target MCUs are a subset ofMCUs supported by FlexGUI. See the FlexGUI Firmware user guide.

Table 2. Supported kits and target MCUsBoard Name Device Model Target MCU External MCU

FRDM-XS2410EVB Single rows header Q100–MC33XS2410 B0 KL25Z128VLK4, S32K144 Yes

FRDM-XS2410EVB Dual rows header Q100–MC33XS2410 A0 KL25Z128VLK4, S32K144 Yes

2 Hardware preparation

This section describes settings and configurations needed to get the EVB up and runningalong with the GUI.

Note: This is not an exhaustive description of utilized devices nor evaluation kits. Ifmore detailed information is needed, please refer to related user guides, data sheets,schematics, etc.

2.1 FRDM-XS2410EVB Single row headerThis section describes the Q100 evaluation kit and FRDM-KL25Z MCU.

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NXP Semiconductors UM11301FlexGUI for Q100 v1.0.0

UM11301 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.

User guide Rev. 1 — 13 November 20193 / 13

2.1.1 Kit interface and layout

Default settings of evaluation kit and its connectors are displayed in Figure 1.

Figure 1. FRDM-XS2410EVB Single row header kit

1. Make sure that the J13 VDD header on the FRDM-XS2410EVB is short, to provideVDD for Q100 device from VPWR. It is recommended to set output LEDs, by a shortconnection on the J14 LED header, to indicate output level. The FRDM KL25Z boardis powered by a USB interface. VSPI is connected to the IOREF pin by default.

2. Place the FRDM-XS2410EVB freedom board with Q100 device on top of the FRDMKL25Z MCU board.

3. Connect the Q00 power supply (6 to 60 V) to J5 or J3 connector on FRDM-XS2410EVB (Q100) evaluation board. Figure 1 shows the complete HW setup withoutconnected loads.

2.1.2 Supported MCUs

This section describes the MCUs supported by the kit.

MCU name Host connection interface Programming interface

KL25Z128VLK4 USB HID, USB CDC (over native USB port) USB Multilink, OpenSDA

S32K144EVB USB CDC (over native USB port) USB Multilink, OpenSDA

2.1.3 Supported devices

This section describes the devices supported by the kit.

Device model Part revision

Q100 MC33XS2410 A0, B0

3 Device family extension

This chapter describes product specific FlexGUI extension for the family of Q100 extremeswitches.

3.1 Modes of operationThe GUI supports the following modes, other than user mode:

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UM11301 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.

User guide Rev. 1 — 13 November 20194 / 13

• User mode– Enter: No action needed, default state after launching app.– Behavior: Q100 device is disabled by RESET pin. User can control this pin and

create own configuration.• Watchdog off mode

– Enter: The watchdog off mode is entered when the GUI activates the device by theRESET pin, maximal timeout for watchdog is set and transits to fail safe is disabled.

Behavior: Thanks to disabled watchdog user configuration is kept by device afterrunning out watchdog.

3.2 CommunicationThe Q100 device integrates SPI interface for data transfer. Common data frameconfiguration is used: six-bit address with R/W bit, toggle bit and byte for data.

3.3 Script generationFollowing script is generated and exported by the GUI.

Script name Purpose

functional-config-values Generate script with all actual configuration values fromGUI and is possible to use this script next time to set thisconfiguration back.

4 Feature Tabs

This section describes supported feature tabs for Q100 extreme switch.

4.1 Register mapPurpose: Enables bit-wise register access.

Device Modes: All

Device Models/Revisions: Q100/A0,B0

Device Registers used in tab:

• Control: all• Diagnostic: all

The registers are grouped in register sets to reflect their real integration in the memorylayout. The register map is split into the following register sets:

• Control• Diagnostic

A part of the register map is a hint window that translates numeric values of bits/bitgroups into convenient descriptive form.

Note: Please refer to FlexGUI Application user guide for any details on usage of this tab.

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UM11301 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.

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Figure 2. Register map

4.2 Interrupts and warningsPurpose: Shows status, warnings, IRQ and their configurations.

Device Modes: All

Device Models/Revisions: Q100/A0,B0

Device Registers used in tab:

• Control: EN_IRQ_PIN, EN_IRQ_SPI, EN_WARN_PIN, EN_WARN_SPI, WC_CTRL,OCW_OUT1, UCW_OUT1, WV_CTRL, OVW_OUT1, UVW_OUT1, OCW_OUT2,UCW_OUT2, WV_CTRL, OVW_OUT2, UVW_OUT2, WC_CTRL, OCW_OUT3,UCW_OUT3, OVW_OUT3, UVW_OUT3, OCW_OUT4, UCW_OUT4, OVW_OUT4,UVW_OUT4, OCL_OUT1, OCL_OUT2, OCL_OUT3, OCL_OUT4, OLP_CTRL,TEMP_WT

• Diagnostic: ISR_IRQ, ISR_WARN, OUT1_STA, OUT2_STA, OUT3_STA, OUT4_STA

The Interrupts and warnings tab summarizes general warnings status and IRQ. It ispossible to configure various warnings, such as over/under current, over/under voltage,overload and overtemperature. For IRQ and warnings, it is possible to activate this eventon the FAULT_B pin or reporting by SPI.

Most blocks have Read and Write buttons. The Write button takes user configurationsfrom the control boxes and writes it according to device Control registers. To avoidrewriting the user configuration, the Read button reads values and stores it next to thecontrol box label. Clicking the Poll button automatically refreshes the read values eachsecond.

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NXP Semiconductors UM11301FlexGUI for Q100 v1.0.0

UM11301 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved.

User guide Rev. 1 — 13 November 20196 / 13

Figure 3. Interrupts and warnings tab

4.3 Output drivePurpose: Provide access to output control (Direct, SPI, PWM)

Device Modes: All

Device Models/Revisions: Q100/A0,B0

Device registers used in tab:

• Control: IN_CTRL1, GLB_CTRL, PWM_CTRL2, PWM_FREQ1, PWM_DC1,PWM_CTRL3, PWM_FREQ2, PWM_DC2, PWM_FREQ3, PWM_DC3, PWM_FREQ4,PWM_DC4, PWM_CTRL1, OUT1_4_CTRL, IN_CTRL2

• Diagnostic: IN_OUT_STA

The Output drive tab provides configurations of output.

The section at the top is titled Common control settings. Clicking each button belowCH1:, CH2:, CH3: and CH4: changes the control of the output to SPI or Direct InputPins. Clicking each button below Out 1-2 and Out 3-4 changes the parallel control toIndependent or Parallel.

The next section down and to the left is titled SPI Output PWM control settings. ForPWM, it is possible to select a phase, frequency step and value, duty cycle and enablingPWM for each channel.

The section to the right is titled SPI Output control without PWM. This section hasbuttons to change the slew rate and for each channel. You can also turn each channel onor off.

The next section down and to the left is titled Direct inputs settings. This section hasbuttons to set deglitch time, dependency and logic polarity.

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The section to the right is titled DIRECT INPUT PINs control. This section has buttonsto set the MCU OUTx pin for each channel. You can also select the input signal level.Notice that the right voltage for the Input signal level is necessary to set CMOS for theright operation. This restriction is because this kit uses CMOS logic level.

Figure 4. Output drive tab

4.4 Miscellaneous settingsPurpose: Configuration of Watchdog, Measurements, Open load, Short circuit detection,Output to short VBAT, PI compensation.

Device Modes: All

Device Models/Revisions: Q100/A0,B0

Device registers used in tab:

• Control: WDT_REG, C_CTRL, M_SETUP, OPD_CTRL1, I_OLD1, I_OLD2,OPD_CTRL2, I_OLD3, I_OLD4, SSC_CTRL, ACL_CTRL2, ACL_CTRL1, BV_STVB,BT_STVB, PI_CTRL1, I_SET1, I_SET2, PI_CTRL2, I_SET3, I_SET4,

• Diagnostic: OUT1_STA, OUT2_STA, OUT3_STA, OUT4_STA

The Miscellaneous settings tab contains configurable features not found in the previoustabs. Watchdog settings, Measurement setup, Open load settings, Short circuitmanagement, Output short to VBAT configuration settings and Proportional-integral regulation compensation setup are the various sections found in this tab.

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Figure 5. Miscellaneous tab

4.5 ADC monitorPurpose: Monitoring all measurements by type.

Device Modes: All

Device Models/Revisions: Q100/A0,B0

Device registers used in tab:

• Diagnostic: VOUT1_ON, VOUT2_ON, VOUT3_ON, VOUT4_ON, OD_VOUT1,OD_VOUT2, OD_VOUT3, OD_VOUT4, VOUT1, VOUT2, VOUT3, VOUT4, VPWR_M,IOUT1, IOUT2, IOUT3, IOUT4, OD_IOUT1, OD_IOUT2, OD_IOUT3, OD_IOUT4,INI_IOUT1, INI_IOUT2, INI_IOUT3, INI_IOUT4, FIN_IOUT1, FIN_IOUT2, FIN_IOUT3,FIN_IOUT4, FB_IOUT1, FB_IOUT2, FB_IOUT3, FB_IOUT4, TS0_TEMP, TS1_TEMP,TS2_TEMP, TS3_TEMP, TS4_TEMP, PI_DC1, PI_DC2, PI_DC3, PI_DC4

The ADC monitor tab contains sections to report voltage, current, temperature and PIPWM duty cycle. Each of these measurement types are displayed in a graph and a tableof values.

In each graph, it is possible to add a signal. This new signal is automatically polled.In addition, the associated table of values is automatically refreshed. Without addingsignals, clicking the Poll button refreshes the table of values. To read actual values onlyonce, click the Read button.

A checkmark in each of the Autoscale checkboxes causes the graph display to fill thesection. Click on the checkmark to remove the autoscale feature. A range can then beset in the X and Y directions.

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Figure 6. ADC monitor

5 Provided feature sets

This section describes the feature sets available with each kit.

Table 3. Shared feature setsFeature Set Name Device Mode Routing Plan Auto-Load Loaded-Tabs

Production All SPI-routing NO All

The provided feature sets are usually shared between all supported kits with theexception of on-demand requirements for a specific kit.

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6 Known issues

• GUI transfer is limited, time step is not one second if there are more than four variablespolling

• Some S32K144 EVB revisions have issues with stable connection

7 References

Following are URLs where you can obtain information on related NXP products andapplication solutions:

[1] Product summary page for Q100 — http://www.nxp.com/products/Q100

[2] Product summary page for FRDM-XS2410EVB — http://www.nxp.com/products/FRDM-XS2410EVB

[3] Product summary page for Q100 GUI SW — http://www.nxp.com/products/Q100

[4] FRDM-XS2410EVB evaluation board user manual — https://www.nxp.com/document/guide/UM11313.pdf

8 Revision historyRevision historyRevisionnumber

Date Description

1 20191113 Initial release

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9 Legal information

9.1 DefinitionsDraft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. NXP Semiconductors does not give anyrepresentations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequencesof use of such information.

9.2 DisclaimersLimited warranty and liability — Information in this document is believedto be accurate and reliable. However, NXP Semiconductors does notgive any representations or warranties, expressed or implied, as to theaccuracy or completeness of such information and shall have no liabilityfor the consequences of use of such information. NXP Semiconductorstakes no responsibility for the content in this document if provided by aninformation source outside of NXP Semiconductors. In no event shall NXPSemiconductors be liable for any indirect, incidental, punitive, special orconsequential damages (including - without limitation - lost profits, lostsavings, business interruption, costs related to the removal or replacementof any products or rework charges) whether or not such damages are basedon tort (including negligence), warranty, breach of contract or any otherlegal theory. Notwithstanding any damages that customer might incur forany reason whatsoever, NXP Semiconductors’ aggregate and cumulativeliability towards customer for the products described herein shall be limitedin accordance with the Terms and conditions of commercial sale of NXPSemiconductors.

Right to make changes — NXP Semiconductors reserves the right tomake changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and withoutnotice. This document supersedes and replaces all information supplied priorto the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in life support, life-critical orsafety-critical systems or equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expectedto result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors and its suppliers accept no liability forinclusion and/or use of NXP Semiconductors products in such equipment orapplications and therefore such inclusion and/or use is at the customer’s ownrisk.

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. NXP Semiconductors makesno representation or warranty that such applications will be suitablefor the specified use without further testing or modification. Customersare responsible for the design and operation of their applications andproducts using NXP Semiconductors products, and NXP Semiconductorsaccepts no liability for any assistance with applications or customer productdesign. It is customer’s sole responsibility to determine whether the NXPSemiconductors product is suitable and fit for the customer’s applicationsand products planned, as well as for the planned application and use ofcustomer’s third party customer(s). Customers should provide appropriatedesign and operating safeguards to minimize the risks associated withtheir applications and products. NXP Semiconductors does not accept anyliability related to any default, damage, costs or problem which is basedon any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer isresponsible for doing all necessary testing for the customer’s applicationsand products using NXP Semiconductors products in order to avoid adefault of the applications and the products or of the application or use bycustomer’s third party customer(s). NXP does not accept any liability in thisrespect.

Export control — This document as well as the item(s) described hereinmay be subject to export control regulations. Export might require a priorauthorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expresslystates that this specific NXP Semiconductors product is automotive qualified,the product is not suitable for automotive use. It is neither qualified nortested in accordance with automotive testing or application requirements.NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. Inthe event that customer uses the product for design-in and use in automotiveapplications to automotive specifications and standards, customer (a) shalluse the product without NXP Semiconductors’ warranty of the product forsuch automotive applications, use and specifications, and (b) whenevercustomer uses the product for automotive applications beyond NXPSemiconductors’ specifications such use shall be solely at customer’s ownrisk, and (c) customer fully indemnifies NXP Semiconductors for any liability,damages or failed product claims resulting from customer design and useof the product for automotive applications beyond NXP Semiconductors’standard warranty and NXP Semiconductors’ product specifications.

Evaluation products — This product is provided on an “as is” and “with allfaults” basis for evaluation purposes only. NXP Semiconductors, its affiliatesand their suppliers expressly disclaim all warranties, whether express,implied or statutory, including but not limited to the implied warranties ofnon-infringement, merchantability and fitness for a particular purpose. Theentire risk as to the quality, or arising out of the use or performance, of thisproduct remains with customer. In no event shall NXP Semiconductors, itsaffiliates or their suppliers be liable to customer for any special, indirect,consequential, punitive or incidental damages (including without limitationdamages for loss of business, business interruption, loss of use, loss ofdata or information, and the like) arising out the use of or inability to usethe product, whether or not based on tort (including negligence), strictliability, breach of contract, breach of warranty or any other theory, even ifadvised of the possibility of such damages. Notwithstanding any damagesthat customer might incur for any reason whatsoever (including withoutlimitation, all damages referenced above and all direct or general damages),the entire liability of NXP Semiconductors, its affiliates and their suppliersand customer’s exclusive remedy for all of the foregoing shall be limited toactual damages incurred by customer based on reasonable reliance up tothe greater of the amount actually paid by customer for the product or fivedollars (US$5.00). The foregoing limitations, exclusions and disclaimersshall apply to the maximum extent permitted by applicable law, even if anyremedy fails of its essential purpose.

Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancybetween the translated and English versions.

9.3 TrademarksNotice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.

Kinetis — is a trademark of NXP B.V.

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TablesTab. 1. Supported devices and revisions ...................... 2Tab. 2. Supported kits and target MCUs .......................2

Tab. 3. Shared feature sets ...........................................9

FiguresFig. 1. FRDM-XS2410EVB Single row header kit ........ 3Fig. 2. Register map .....................................................5Fig. 3. Interrupts and warnings tab .............................. 6

Fig. 4. Output drive tab ................................................ 7Fig. 5. Miscellaneous tab ............................................. 8Fig. 6. ADC monitor ......................................................9

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Please be aware that important notices concerning this document and the product(s)described herein, have been included in section 'Legal information'.

© NXP B.V. 2019. All rights reserved.For more information, please visit: http://www.nxp.comFor sales office addresses, please send an email to: [email protected]

Date of release: 13 November 2019Document identifier: UM11301

Contents1 Introduction ......................................................... 12 Hardware preparation ......................................... 22.1 FRDM-XS2410EVB Single row header ............. 22.1.1 Kit interface and layout ......................................32.1.2 Supported MCUs ............................................... 32.1.3 Supported devices .............................................33 Device family extension ..................................... 33.1 Modes of operation ............................................33.2 Communication .................................................. 43.3 Script generation ............................................... 44 Feature Tabs ........................................................44.1 Register map ..................................................... 44.2 Interrupts and warnings .....................................54.3 Output drive ....................................................... 64.4 Miscellaneous settings .......................................74.5 ADC monitor ...................................................... 85 Provided feature sets ......................................... 96 Known issues ....................................................107 References ......................................................... 108 Revision history ................................................ 109 Legal information ..............................................11