Five-Level Single-Phase Grid-Connected Converter for Renewable Distributed Systems

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    Five-Level Single-Phase Grid-Connected

    Converter for Renewable Distributed Systems

    Presented by  B MALLIKARJUNA REDDY 

    Roll No!!"#$""%

    Under the esteemed

    guidance of  Dr.N.VISWANATHAN 

    Professor & '(D in !!! De)t*

    N+,

    1

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    ./S,R.C,

      Recently, converter topologies employing a high frequency transformer in order toreduce size &weight .

     The trade-off between high efficiency &low cost is a hard task for these architectures

     because they require several power stages .

      n low power applications - International standards recommends the use of grid

      connected power converters without any galvanic isolation.

      Transformer less architectures in low power distributed systems are recommended

      The proposed work is a novel five level converter topologies that are used in!" #$%% based single phase grid connected converters.

      imulation of these topologies are carried out by using '(T%()*imulink.

    2

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    3

    (/0!C,+1!S

      #omparison of + and + topologies in terms of T+,

    leakage current and parasitic capacitor voltage.

    To balance the voltages across the # link capacitors by closed

    loop operation.

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    PRESENTATION

    OUTLINE/.

    0TR12#T10

    3. '1$ 14 1!$R(T10 14 '% T1!1%15$

    6. 5R #100$#T$ '% T1!1%15$

    7. !"-5R #100$#T$ '% T1!1%15$

    . #%1$ %11! 1!$R(T10 14 + T1!1%158

    . '2%(T10 R$2%T (0 #210

    9. #10#%210 4

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    5

    +N,R(D2C,+(N

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    PV SYSTEMPOWER

    CONVERTER

     TRANSFORMER POWER GRID

    Single phase converter with Transformer :

    /enefits  : afety , leakage current reduction, no dc current in:ected in to the grid.

    Single phase multi level converter without

    Transformer: 

    P Vsystem

     MLIP!e"#"$%

    rawbacks : %arge size, heavy weight , e;pensive and overall conversion efficiency

    &

     INTRODUCTION  cont<

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    '

    Single Phase (H-Bridge )Cascaded Multilevel Inverter 

    The main advantages of cascade inverter are as follows=

    /. #ompared with the diode clamped and flying capacitor inverters, it requires

    the least number of components to achieve the same number of voltage

    levels.

    3. oft switching techniques can be used to reduce switching losses and devicestresses

    isadvantage of single phase cascaded '% is the usage of large number of

    switches, this can be over come by hybrid topologies + and + .

    )ecause of above statements, this work proposes + and + '% topologies

    1utput voltage waveform

     INTRODUCTION  cont<

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    (

     H 5   T O P O L O G Y  

     H 6   T O P O L O G Y  

     INTRODUCTION  cont<

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    )

    3odes of ()eration of Pro)osed

    ,o)ologies

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    1*

    1(L,.G!L!1!L S

    % S$ S4 S5 S6

    1dc % " " % "

    1dc7$ " " " % %

    " " " % % "

    -1dc7$ " % " " %

    -1dc " % % " "

    3odes of o)eration (f '6 to)ology

    witching states of + topology

    1utput voltage waveform

    3odes of o)eration cont8**

    S%

    S4 S5

    S$

    S6

    +m

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    11

    P3 Pulses of '6 to)ology generated by SP3

    3odes of o)eration cont8**

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    voltage

    level

    S% S$ S4 S5 S6 S9

    1dc 1 " " % % 1

    1dc7$ % " " % " 1

    " " " % % " *

    -1dc7$ " % % " % >

    -1dc " % % " % 1

    3odes of o)eration of '9 to)ology

    1utput voltage waveform

    witching states of + topology

    3odes of o)eration cont8**

    S%

    S$

    S4 S5

    S6

    S9

    +m

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    13

    P3 Pulses of '9 to)ology generated by SP3

    3odes of o)eration cont8**

    3 d f ti t

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    .t f s :%6;'"1= R:%"""?=

     3:"*>@

    O,t-,t+t/#e

    0 5

    t-#y

    O,t-,t+t/#e

    0 &

    t-#y

    14

    3odes of o)eration cont8

    3 d f ti t

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    'A/R+D! C.S!C.D!D 32L,+L!1!L +N1!R,!RS B'6&'9 +,' R -L(.D

    .t f s :%6;'"1=R:%"""?=3:"*>@E

    15

    The voltage stresses are low in + topology

    The switching losses are low in + topology ?T+ is low in + topology

    +owever the total number of switches consisting in the + topology is low compare with + topology.

    3odes of o)eration cont8

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    1&

    GR+D C(NN!C,!D

    3L+ ,(P(L(G+!S

    GR+D C t d 3L+ tGR+D C t d 3L+ t

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    1'

    GR+D Connected 3L+ cont8**

    5eneral hybrid multi level inverter connects to the single phase grid=

    (.# voltage source act as a grid with required nominal voltage of 36>" and > +z frequency.

    The filter must be designed precisely.

    • To reduce the voltage distortions when delivers to the load

    • To stabilize the energy output

    • To achieve sinusoidal shape and precise value.

    GR+D Connected 3L+ cont8**

    GR+D Connected 3L+ cont

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    1(

    UTPUT FILTER DESIGN:

    GR+D Connected 3L+ cont8**

    +@:AB

    +@:AB@R*%A where B3CpiCfDBdamping factor=

    )y substituting 3B@R*%ADD @3AB@/*R#A are in the above equation then,

    +@:AB/-:@/*3A

    E +@:AEB

    Fhen the increase then magnitude E +@:AE decreases .f phase angle increase while damping decrease.

    n time domain f G/ that causes under damping

    f H/that causes over damping and

    f B/ that causes critical damping .

    )ut when B@/*AB>.9>9 ,then the filter circuit act as low pass filter .

     

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    GR+D Connected 3L+ cont

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    2*

    $ffectiveness of the filter in + topology

     converter output

    voltage waveform

    T+ before filter 

    is 66.I?

    converter output

    voltage waveform

    T+ after filter 

    is >.J?

    GR+D Connected 3L+ cont8**

    GR+D Connected 3L+ cont

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    2121

    $ffectiveness of the filter in + topology

     converter output

    voltage waveform

    T+ before filter 

    is 67.9>?

    converter output

    voltage waveformT+ after filter

    $s 1.1*

    GR+D Connected 3L+ cont8**

    GR+D Connected 3L+ cont

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    /efore filter

    B1o

    .fter filter

    B1g

    Fundamental ,'D Fundamental ,'D

    445*$1 4$*>9 4$@*$1 "*#6

    /efore filter

    B1o

    .fter filter

    B1gFundamental ,'D Fundamental ,'D

    44%*>1 45*@" 4$>*>1 %*%"

    !ffectiveness of the filter in '9 to)ology

    !ffectiveness of the filter in '6 to)ology

    n compression of both topologies with grid connection the followingobservations are made

     + and + topologies gives better performance with less variations

    4urther research continues for the both topologies with source of !"-#ell

    instead of a dc source 

    GR+D Connected 3L+ cont8**

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    23

    P1-GR+D C(NN!C,!D

    3L+ ,(P(L(G+!S

    P1-GR+D Connected 3L+ cont8**

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    24

    F$#: PV #"$% & t-#y s$m,$ %$/#"/m

    P1 GR+D Connected 3L+ cont8**

      56T-#y " &6Topology

    P1-GR+D Connected 3L+ cont8**

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    25

      718

      728

      738

    " pvB-R sC pv@7A

    F$# : E9,$+/et C$",$t 0 /PV e

    P1 GR+D Connected 3L+ cont8**

    P1-GR+D Connected 3L+ cont8**

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    2&

    I-+$s /% ,""et

    Is $s -;t ,""et " s;"t $",$t ,""et

    I%$s %$%e ,""et

    Is$s "e+e"se s/t,"/t$ ,""et 0 t;e %$%e

    9 $s t;e ;/"#e 0 eet""1 to the proposed circuit during operation

    !"-panel takes short circuit current as 6.I>9( and open circuit voltage is />>>" and

    series resistance is assumed to be >.//79 K.

    P1-GR+D Connected 3L+ cont8**

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    Topology nverter 1utput "oltageL"oM

    5rid "oltageL"gM

    !arasitic capacitor

    voltage

    L" pM

    %eakage current

    Li%M

    4undamental ?T+ 4undamental ?T+

    + 666./" 63.JJ 63I.7" /.>> >I.9" /.//>>(

    + 63J.J" 66.J 63I." >.JI 667.3" >.77J(

    1utput results of !" grid proposed topologies@+ and +A

    @(t f sB/N+zD"dcB6I>"D'B>.I9A

    2'

    The main aim of this !ro"ect is to address the !ro#$ems%iL and

    v)H ,'D& associated 'ith the transformer $ess s(stems• Nte : At,/y 1A e//#e ,""et /,ses ;/"m0, eHet t;e

    system<  -/"/s$t$ /-/$t" +t/#e m,st ?e e9,/ t t;e m$%-$t +t/#e

    Vm (s per the leakage current and voltage balancing point of view the + had outstanding

    features, but it not enough.

    o that we are go to the closed loop operation for + topology.

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    )LOSED LOOP )ONTROL O P*+GRID ,- TOPOLOG. 

    2(

    Closed loo) cont8**

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    2)2)

    /locI scheme of the balancing control of the mid)oint voltage

    )

    Closed loo) cont8**

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    3*

      and configurations providing the same voltage V '! to the full bridge rails. n

    @aA, the + capacitor is discharging, and in @bA, the % capacitor is discharging.

    Closed loo) cont8**

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    C  HS  = C  LS = C 

    C d(V dc−V  MP  ) = I dc − I  D5  dt 

    C dV  MP  = I dc − I  D5− IMP

      dt 

     dV  MP  = − IMP

     dt 2C 

    31

    # capacitor circuit employed for the analytical

    analysis of the "oltage )alancing

     In asymmetrical conditions ,V '! OV dc / 3 .

    Closed loo) cont8**

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    MVC !"$# $ /se 0 / -s$t$+e FB

    grid ! FB " #$S% provides & MP

    grid ' FB " #(S% provides & MP)

    32

    /locI diagram )resentation of closed loo) o)erationClosed loo) cont8**

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    33

    /locI diagram )resentation of closed loo) o)eration

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    34

    SI/ULATION RESULTS

    (2,P2, R!S2L,S D2! ,( CL(S!D L((P C(NF+G2R.,+(NResults cont8**

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    35

    (2,P2, R!S2L,S D2! ,( CL(S!D L((P C(NF+G2R.,+(N(F '9 ,(P(L(GA

    )on0erter out!ut0o$tage %*o&

    T,D 123425

    Grid 0o$tage %*g&  T,D 164375

    Results cont8**

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    3&

    !arasitic ca!acitor0o$tage  %*!&1-%9"*61

    ha$f of the su!!$(0o$tage  %*dc8&1%9"*61

    Results cont8**

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    3'

    $ea9age current  iL1"*"59>$.

    57-e -8 &7-e -8 &7se% -8*

    *.2

    *.4

    *.&

    *.(

    1

    1.2

    1.11

    *.44

    *.*4

    e//#e ,""et

    Results cont8**

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    3(

    +nverter

    (ut)ut 1oltage

    B1o

    Grid 1oltage

    B1g

    Parasitic

    ca)acitor

    voltage

    B1)

    LeaIage

    current

    BiL

    3id-)oint

    voltage

    B1m)Fundamental ,'D Fundamental ,'D

    4$>*>1 %@*#% 4$>1 "*@6 -%9"*61 "*"59>$. %9"*61

    Closed Loo) Control (f P1-GR+D '9 ,o)ology

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    3)

    C(NCL2S+(NS

    4rom the table it can be concluded that parasitic capacitance is

    greatly reduced which can reduce the voltage stress on the

    switching devices.

     t is also concluded that the leakage current is also greatly

    reduce from /.//( to >.>7I3(.

    )ecause of reduction in the leakage current grid performance is

    improve to the >.9? of T+.

    4rom above conclusion it can be stated that + topology is

    recamended for the transformer-less !" P5R system.

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     TAN> YOJ