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Final Project EGGN 383LA Due: 12/10/12 Group Members: Kodi Hildebrandt Colby Renfro Steven Wooldridge

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Page 1: FinalProject - Inside Minesinside.mines.edu/.../projects/2012fall/383_Final_Project_F12_Renfro... · stored! into! an! array! corresponding! to ... allowed!for!us!to!transfer!datain!8bit!segments.!A!total!of!two

Final Project

EGGN 383-­‐LA

Due: 12/10/12

Group Members:

Kodi Hildebrandt

Colby Renfro

Steven Wooldridge

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Contents EGGN 383-­‐LA ................................................................................................................................................ 1

Due: 12/10/12 .......................................................................................................................................... 1

Group Members: .......................................................................................................................................... 1

Kodi Hildebrandt .................................................................................................................................. 1

Colby Renfro ......................................................................................................................................... 1

Steven Wooldridge ............................................................................................................................... 1

1 Introduction ......................................................................................................................................... 3

2 Procedure ............................................................................................................................................. 3

2.1 Hardware Overview ...................................................................................................................... 3

2.2 Circuit Description ........................................................................................................................ 4

2.3 Algorithm and Code ..................................................................................................................... 5

2.4 SPI communication ....................................................................................................................... 9

2.5 MSGEQ7 Communication Protocol ............................................................................................ 11

3 Testing and Verification ..................................................................................................................... 12

4 Results/Conclusion ............................................................................................................................. 12

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1 Introduction The objective of our final project was to create a graphical audio spectrum analyzer to display on an 8x8 LED matrix display. We connected our audio source to a MSGEQ7 graphic equalizer display filter and used it to capture the average magnitude of the audio signal centered around set frequencies of 63Hz, 160Hz, 400Hz, 1kHz, 2.5kHz, 6.25kHz, and 16kHz. The MSGEQ7 provided a DC representation of the average amplitude centered on each frequency. This data was read by the HCS12 microcontroller on the SSMI board, and processed by the HCS12 and encoded into a signal to transmit to the MAX7219 LED Display driver.

2 Procedure

2.1 Hardware Overview The project consists of four main hardware components. The MSGEQ7 receives the audio signal from a 3.5mm audio jack. The chip is a multiplexed bandpass filter set which communicates with the HCS12 microcontroller. The HCS12 will be the master for the communication between itself and the MSGEQ7. The magnitudes of the audio frequency spectrum are analyzed, converted and sent to the MAX7219 via SPI. The MAX7219 drives the 8x8 LED Display Matrix. The columns on the LED matrix correspond to differing frequencies while the rows correspond to magnitudes of frequencies in the spectrum. See Figure 1 below. The assembled hardware is seen in Figure 2. The low frequency is observed on the left hand side of the LED matrix and high frequency on the right hand side.

Figure 1: Hardware Block Diagram

Figure 2: Assembled Hardware

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2.2 Circuit Description Our circuit can be found below in Figure 3. Everything is powered from the same 5V rail on the HCS12 development board. An audio signal is first fed into the MSGEQ7 through a high pass filter, used to remove any DC from our initial audio signal. The MSGEQ7 is given its specified RC circuit at CKIN as is provided by its datasheet, and it is sampled and polled at OUT by the HCS12 via RESET and STROBE. After the sampled signal is interpreted by our code, the HCS12 writes display data to the MAX7219 LED display driver via SPI across the indicated pins. MISO is shown connected, but is not actually necessary for this circuit. The MAX7219 drives the display itself and both sinks and sources current simultaneously as it scans across the rows of the display. The current used to drive each LED is set by R3, and is the current across this resistor multiplied by 100 as indicated below in Equation 1. Both separate IC’s we’re given supply rail caps, and the MAX7219 supply cap was determined to be larger, as the device sits further from the initial 5V source than everything else.

Equation 1: LED current

!!"# = !!! ∗ 100 =5!22!Ω

∗ 100 = 22!"

Figure 3: Schematic

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2.3 Algorithm and Code The algorithm for the equalizer consists of several subroutines. Refer to Figure 4 below. The main routine initializes the SPI system, A/D input, configures PTT, and sets the RTI interrupt to occur at approximately 30Hz. The entire routine is interrupt driven. In the Interrupt, the flag is cleared and then the MSGEQ7 is polled for data. This is accomplished by pulling the RESET high, waiting 100ns, then starting the STROBE output on a 100us period. The MSGEQ7 is strobed 7 times, each corresponding to a different frequency. During the time when STROBE is low, the A/D input is read and the magnitude is stored into an array corresponding to frequency magnitudes. Lastly, the 6th and 7th frequency magnitudes are averaged to create a full 8 frequency spectrum.

After frequency magnitudes are acquired, the data is mapped from 0-­‐255 to 0-­‐8 to provide proper scaling for the LED matrix. Each data packet is formed for the SPI with address and hex magnitude value corresponding to the amplitude. Eight data packets are transmitted

Initialize SPI Initialize A/D Initialize PTT for Input/Output Initialize Display Initialize RTI for 30Hz Rate, Interrupts RTI Interrupt Clear Interrupt Flag

//Read FFT Reset FFT Chip FOR (i=0; i<7, i++) Strobe Low Pause 50 uS Read A/D Register

Strobe High

Average Last Two frequencies to achieve 8 discrete values

//Write to Display //Scan through frequencies

FOR (i=0; i<8, i++) Map Magnitude from 0-­‐255 to 0-­‐8 Write Magnitude through SPI

Figure 4: Pseudocode and Algorithm

The following C code is used to achieve the project goals. Several functions exist to initialize SPI, create a delay, send characters through SPI, and read the FFT. The main RTI interrupt is used to generate a consistent refresh rate for the display. We choose 30Hz to simulate closely a television refresh rate. The

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main function initializes all necessary hardware flags and systems used in the interrupt including A/D, SPI, PTT, RTI, and display settings. Refer to Figure 5.

//LED Graphic Equalizer. Uses a MSGEQ7 Equalizer Chip and MAX7219 to create a spectrum analyzer for audio input signals #include <hidef.h> /* common defines and macros */ #include "derivative.h" /* derivative-specific definitions */ //Constants for addressing PTT control signals #define LOAD 0x01; #define RESET 0x02; #define STROBE 0x04; //Delcare variables unsigned int counter; unsigned char dot; unsigned char FFTMag[8]; /************* FUNCTION DECLARATIONS **************/ //Delay uSec function void delay(int t) _asm ldx t ; get number of usec to delay ; Main loop is 24 cycles, or 1 usec loop: psha ; 2 E cycles pula ; 3 E cycles psha ; 2 E cycles pula ; 3 E cycles psha ; 2 E cycles pula ; 3 E cycles psha ; 2 E cycles pula ; 3 E cycles nop ; 1 E cycle dbne x,loop ; 3 E cycles //Initialize SPI with 1Mhz clock void initializeSPI(void) // Set baud rate. Baud rate divisor = (SPPR+1) * 2^(SPR+1). // for baud = 1 MHz divisor = 24 SPPR=5, SPR=1 -> 0x51 SPIBR = 0x51; // Bits: 0 SPPR2 SPPR1 SPPR0 0 SPR2 SPR1 SPR0 // SPICR1 bits: SPIE SPTIE SPE MSTR CPOL CPHA SSOE LSBFE // SPIE = 0 no interrupts // SPE = 1 enable SPI system // SPTIE = 0 no interrupts // MSTR = 1 we are master // CPOL = 0 data latched on rising edge of clock // CPHA = 0 data starts with first edge // SSOE = 0 set to 1 to enable SS output // LSBF = 0 transfer most signif bit first SPICR1 = 0x50; // SPICR2 bits: 0 0 0 MODFEN BIDIROE 0 SPSWAI SPC0 // MODFEN = 0 set to 1 to allow SS to go low on transmission // BIDIROE = 0 disable bidirectional mode

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// SPSWAI = 0 SPI clock operates normally in wait mode // SPC0 = 0 only used for bidirectional mode SPICR2 = 0x00; // Send a character out through SPI void putcharSPI(char cx) char temp; while(!(SPISR & 0x20)); // wait until SPTEF=1 (transmit reg empty) SPIDR = cx; // output the byte to the SPI while(!(SPISR & 0x80)); // wait until SPIF=1 (receive reg full) temp = SPIDR; // clear the SPIF flag // Get a character from SPI char getcharSPI(void) while(!(SPISR & 0x20)); // wait until SPTEF=1 (transmit reg empty) SPIDR = 0x00; // trigger 8 SCK pulses to shift in data while(!(SPISR & 0x80)); // wait until SPIF=1 (receive reg full) return SPIDR; // return the character char i; void Dwrite(unsigned char ADDR, unsigned char DATA) if ((ADDR>=0x01) && (ADDR <= 0x08)) i = DATA & 0x01; //Right shift everything i <<= 7; DATA >>= 1; DATA &= ~0X80; //clear the signed shift DATA |= i; PTT &= ~LOAD; //SELECT DISPLAY putcharSPI(ADDR); //address data is to be written to putcharSPI(DATA); //data written PTT |= LOAD; //DESELECT DISPLAY delay(2); //cs low delay //Initialize 8x8 LED Display for MAX7219 void initDisplay(void) Dwrite(0x0C, 0x01); //exit shutdown mode delay(300); //300uS delay Dwrite(0x09, 0x00); //no decoder mode Dwrite(0x0A, 0x0F); //max intensity Dwrite(0x0B, 0x07); //scan through entire display Dwrite(0x0F, 0x00); //clear any pending display tests Dwrite(0x01, 0x00); //blank row0 Dwrite(0x02, 0x00); //blank row1 Dwrite(0x03, 0x00); //blank row2 Dwrite(0x04, 0x00); //blank row3 Dwrite(0x05, 0x00); //blank row4 Dwrite(0x06, 0x00); //blank row5 Dwrite(0x07, 0x00); //blank row6

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Dwrite(0x08, 0x00); //blank row7 //Clears the Display void clearDisplay(void) int i; for(i = 0; i < 8; ++i) Dwrite(i+1, 0x00); //Read FFT chip sequence. Reads only one set of values void readFFT() int i; PTT |= RESET; delay(100); //100nS reset delay min requirement PTT &= ~RESET; PTT |= STROBE; //STROBE HIGH delay(100); //72uS required from reset to start for(i=0;i<7;i++) PTT &= ~STROBE; //strobe low delay(50); //delay strobe pulse minimum ~18uS //36uS output settling time FFTMag[i] = ATDDR0L;//sample delay(50); //lets not hover on the edge (not that it really matters) PTT |=STROBE; //strobe high pulse min is ~18uS delay(100); PTT &= ~STROBE; //exit with strobe low //"Create" a 11KHz channel by averaging 6.25Khz and 16Khz FFTMag[7]=FFTMag[6]; FFTMag[6]=(FFTMag[7]+FFTMag[5])/2; /****************** INTERRUPTS ****************/ //Interrupt service routine for RTI flag, will control the polling from FFT chip and display refresh void interrupt VectorNumber_Vrti rti_isr() unsigned char i; //clear CRG flag CRGFLG = 0x80; //Initialize Blank Display dot = 0x01; readFFT(); for (i=0; i<8; i++)

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//Scan through magnitude and check for levels if(FFTMag[i] < 32) dot = 0x01; else if (FFTMag[i] < 64) dot = 0x03; else if (FFTMag[i] < 96) dot = 0x07; else if (FFTMag[i] < 128) dot = 0x0F; else if (FFTMag[i] < 160) dot = 0x1F; else if (FFTMag[i] < 192) dot = 0x3F; else if (FFTMag[i] < 224) dot = 0x7F; else dot = 0xFF; Dwrite((i+1), dot); /**************** MAIN FUNCTION ****************/ //Main void main(void) initializeSPI(); //Initialize AN02 for input ATDCTL2 = 0xC0; ATDCTL3 = 0x08; ATDCTL4 = 0x85; ATDCTL5 = 0xA2; //Initialize PT0 (/CS), PT1 (RESET), PT2 (STROBE) for output DDRT=0x07; //Set up RTI system to generate timeouts at ~30 Hz rate RTICTL = 0x5f; //30 Hz refresh CRGINT = 0x80; //Assign RTI interrupt EnableInterrupts; //counter=0; initDisplay(); for(;;) _FEED_COP(); /* feeds the dog */

Figure 5: Full C Code with RTI Interrupts and SPI Communication

2.4 SPI communication To setup SPI communication with our MAX7219 display driver, we used previously given code from lab 10 that setup the HCS12 to a 1MHz SPI clock rate, and to transmit data slightly before the rising edge of the clock. Both of these were perfect for our display driver as it required data on the rising edge, and was limited to a max transfer rate of 10MHz. We also used the given function putcharSPI() which allowed for us to transfer data in 8bit segments. A total of two of these segments makes one full complete packet as shown below in Figure 6.

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Figure 6: Single SPI packet

The first byte sent is the address of the register that the following byte of data is to be written to. In Figure 6, display address 0x05, or row 5 of the display is told to display a 0x9F of which illuminates the lowest 6 LEDS (value is shifted once through itself to the left on the display). At startup, the configuration data is simply run through as shown in Figure 5, but when the equalizer is running, all eight, two byte packets are written to the MAX7219 as shown in Figure 7.

Figure 7: Full SPI display data

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2.5 MSGEQ7 Communication Protocol The MSGEQ& has an internal multiplexor and is selected via a STROBE signal from the HCS12. This signal was originally planned to be output compare driven but since only 7 periods were needed, we decided to manually generate the signal through PT2. Refer to Figure 8 for the internal architecture. The timing is critical to ensure values have settled and to remove transient readings for frequency magnitudes. The RESET pulse is used each time to ensure known values are read from the output. Each STROBE pulse has a period of 200uS, where the multiplexed output is read during the low pulse. When high, the multiplexor increments to the next frequency and waits for STROBE to latch low. Refer to Figure 9 for the timing diagram.

Figure 8: MSGEQ7 Internal Architecture1

Figure 9: MSGEQ7 Timing Diagram1

The implementation works well within the 30Hz interrupt scheme. No values are lost due to multiple interrupts. As seen in the signal analysis in Figure 10, the output is latched seven times to read all seven frequency-­‐magnitude values. The MSGEQ7 has a clock oscillator at approximately 22Khz so the poll timing is user chosen as long as the minimum delays are met. 1 "Seven Band Graphic Equalizer Data Sheet." Mixed Signal Integration, 2004. Web. 11 Nov. 2012. <https://www.sparkfun.com/datasheets/Components/General/MSGEQ7.pdf>.

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Figure 10: MSGEQ7 digital band-­‐pass filtering

3 Testing and Verification Once completed, the hardware and software were tested by running different audio samples through the system and verifying the display results. We used both a signal generator and frequency sweep audio sample to detect for nominal function.

The frequency sweep generated a sinusoidal waveform from 20Hz to 20KHz, the range of human hearing. As the frequency increased, we observed the peak magnitude on the LED display move from left to right, corresponding to the expected frequency. From these results, we concluded the system was operating nominally.

4 Results/Conclusion We successfully completed our objective to create a graphical audio spectrum analyzer to display on an 8x8 LED display. We were able to analyze the spectrum of an audio signal from a 3.55mm signal and view it on our display. To verify this we ran an audio track that scanned from low frequencies to high frequencies, and watched each individual column light up to its full capacity (all 8 lights). The exception is the seventh 7th row which is the arithmetic average of the sixth (6th) and eight (8th) column.

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Features of the Nanoboard/SSMI that we used included the following: • SPI • Analog to digital conversion • Interrupt service routine • Port T

Some complications that we faced during the design of this project include the following:

• Wiring issues: since the led display driver chip was meant for 8 X seven segment displays, we accidently wired the wires corresponding to the decimal point incorrectly.

• Code issues: signed vs. unsigned char variables: in order to programmatically correct the wiring issue.

This was by far the most satisfying project that any of the members of this project have ever experienced. This is the paragon of our intellectual development in applying engineering and mathematical concepts to circuit design.

Colby Renfro

Kodi Hildebrandt

Steven Wooldridge

Figure 11: Our team showing our love for microcontrollers