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CUDA Speedup for DVC SystemCUDA Speedup for DVC System CUDA Speedup for DVC SystemCUDA Speedup for DVC System
Presented by 王品翔
Members: 黃琮閔 [email protected] 王品翔 [email protected] 呂侃翰 698470271
GPU Programming Final presentation
2
Topic ReviewTopic Review
• Main computation is shifted to the decoder
• High time-delay in decoder which hinders its practical application in real- time system
Low-complexity encoder
High-complexity decoder
3
Project GoalProject Goal
• Speed up DVC decoder by using a GPU implementation of one of the main component
-> Side Information Generation : Motion estimation procedure
LPDC
SI Generation
->CUDA speedup by 小小白學姐
DISCOVER codec
4
• Side Information Generation Procedure:Test input sequence: QCIF foreman
Step 1) Low-pass Filter :Step 2) Upsampling (FIR Filter) :Step 3) Forward Motion
Estimation : Step 4) Bidirectional Motion Estimation :Step 5) Motion Filter and Compensation :
2 ms
63 ms
442 ms
1 ms
1 ms
12%
87%
Total (avg.)= 510 ms
CUDA Speedup!
10 ms
-> 77ms
5
• Side Information Generation Procedure:Test input sequence: QCIF foreman
Step 1) Low-pass Filter :Step 2) Upsampling (FIR Filter) :Step 3) Forward Motion
Estimation : Step 4) Bidirectional Motion Estimation :Step 5) Motion Filter and Compensation :
2 ms
63 ms
10 ms
1 ms
1 ms
4%
78%
13%
2%
2%
Total (avg.)= 77 ms
CUDA Speedup!
7 ms
-> 21ms (sequential / parallel = 24)