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XILINX FIELD PROGRAMMABLE GATE ARRAYS [FPGA]
Presented by,Ramkumar G S
Mtech VLSI
XILINX• Xilinx is a supplier of programmable logic
devices.• Xilinx was founded in silicon valley in 1984 by
two semiconductor engineers ,ROSS FREEMAN & BERNARD VOUNDERSCHMITT.
• The company is headquartered in san jose , california , USA.
• The company has corporate offices throughout North America , Asia, & Europe.
• It is well known for invented the FPGA
FPGA
• Field Programmable Gate Arrays provide the next step in the programmable logic device hierarchy.
• The word field in the name refers to the ability of the gate array to be programmed for a particular function by the user instead of by the manufacturer of the device.
• Array is used to denote a series of columns & rows of gates that can be configured by the end user.
FPGA
• FPGA contains more equivalent gates than CPLDs.[equivalent gate is a 2 input AND gate]
• The transition to FPGAs involves even moreComplex design automation tools than the CPLDs .
• Two basic FPGA architectures are offered by the product lines of two companies
1. XILINX 2. ACTEL
XILINX FPGA ARCHITECTURE
ARCHITECTURE
• FPGA requires three major types of elements 1.combinational logic blocks 2.inter connections 3.input output pins
• The user can program the functions realized by each combinational logic cell.
• The user can program the connections between the cell.
ARCHITECTURE
• Input output pins are generally programmable to be inputs or outputs and often provide other features such as low-power or high speed connections.
• So configurable logic block, configurable inter connections & configurable input output blocks.
COMBINATIONAL LOGIC BLOCK [CLB]
CLB
• Figure shows a very simplified version of CLB• CLB contains two function generators• Two flipflops• Various multiplexers for routing signals within
the CLB• Each function generator has 4 inputs and can
implement any function of up to four variables• Function generators are implemented as look
up tables
CLB
• A four input LUT is essentially a reprogrammable ROM or SRAM with 16 1-bit words
• This cell stores the truth table for the function being generated
• The H multiplexer selects either F or G depending on the value of H1
• The CLB has two combinational outputs [x&y] & 2 flipflops out puts [xq&yq]
CLB
• The x&y outputs & the flip-flop inputs are selected by programmable multiplexers
• Note how the two outputs of the
combinational logic function F & G can be routed through multiplexers to either of the two output pins or to the D inputs of the two flipflops .
PROGRAMMABLE INTER CONNECTIONS
INTER CONNECTIONS• Logic elements must be inter connected to
implement complex machines.
• An SRAM –based FPGA uses SRAM to hold the information used to program the interconnect
• As a result the interconnect can be reconfigured
just as the logic elements can
• Figure shows a simple version of an inter connection point often known as a connection box
INTERCONNECTIONS
• A programmable connection between two wires is made by a cmos transistor [a pass transistor].
• The pass transistor’s gate is controlled by a static memory program bit [shown here as a D register].
• When the pass transistor ‘s gate is high transistor conducts & connects the two wires ,when the gate is low two wires are not connected [cmos has good offstates].
SWITHING MATRIX
SWITCHING MATRIX
• A switching matrix used to inter connect CLB’s & I/O blocks .In addition four vertical &two horizontal lines permit inter connection between any CLB in the FPGA chip.
• Xilinx uses an external memory chip to store the configuration inter connect information . Data can be transmitted either serially or in parallel from the external memory to the FPGA.
I/O PINS
• I/O pins connect it to the outside world • The pins on an FPGA must be programmable
to accommodate the requirements of the configured logic
• A standard FPGA pin can be configured as either an input ,output, or three –state pin
• Pins may also provide other features
Features of pins
• Registers are typically provided at the pads so that inputs or output values may be held .
• The slew rate of outputs may be programmable to reduce electro magnetic interference.
COMPARISON BETWEEN XILINX FPGA & ACTEL FPGAs
• Both approaches have cells or modules that can be configured by the end user
• Both require a switching matrix to inter connect the cells or modules
• More complex switching matrix in Actel FPGAs• The architecture also doesnot allow for
reprogramming. once the design is configured it cannot be changes in Actel FPGA
COMPARISON
• Actel FPGA is less cost ,potentially greater utilization of gate resources, has a simpler basic cell, called a logic module.
XILINX FPGA FAMILIES
• Prior to 2010 xilinx has offered two main FPGA families , the high perfomance Virtex series & the high –volume Spartan series.
• With the Introduction of its 28nm fpgas in june 2010 ,xilinx replaced the high volume Spartan family with a kintex family & the low cost Artix family.
• In june 2010 xilinx 7 series ,the virtex-7,kintex-7 , & artix -7 families , promising improvements in system power , perfomance , capacity,& price.
Xilinx fpga families
• These new fpga families are manufactured using TSMC’s 28 nm HKMG process.
• HKMG is high-k metal gate process.• The 28 nm series 7 devices features a 50% power
reduction compared to the company’s 40 nm devices and offer capacity of up to 2 million logic cells.
• In march 2011,xilinx introduced the Zynq-7 series families ,which integrated a complete ARM Cortex-A9 MP core processor –based system on a 28 nm fpga for system architects& embedded software developers.
COMPETITION
• During the “tech boom years” competitor Altera was the market leader.
• Today ,xilinx customers represent just over half of the entire programmable logic market at 51% .Altera is xilinx’s strongest competitor with 34% of the market . Other key players in this market are Actel & Lattice semiconductor.
REFERENCES
• Digital logic-applications & design : YARBROUGH
• Fundamentals of logic design : ROTH• Digital design principles & practices :
WAKERLY• FPGA-based system design : WAYNE WOLF• Digital logic design : SNUGGU LEE• WIKIPEDIA