12 Issue 208 November 2007 CIRCUIT CELLAR® www.circuitcellar.com

now build an IP-PBX with features thatonly $10,000 PBXs had a few years ago.

This work is part of the free telephonyproject (www.rowetel.com/ucasterisk).The goal of the project is to build open-source telephony hardware and software(e.g., an embedded Asterisk IP-PBX) at alow cost. Both the hardware and soft-ware are open source. You are free tocopy and reuse the hardware designs.

IP-PBX OVERVIEWWhat is an IP-PBX and how does it

work? Figure 1 is a block diagram of theembedded IP-PBX that shows the majorhardware and software components.

There are two types of analog ports:FXO ports that connect to your localtelephone exchange and FXS ports thatconnect to analog handsets. This jar-gon can be confusing. The way Iremember is the “S” in FXS stands for“station” handset.

The analog ports convert the voiceand signaling information to digitalsignals that the IP-PBX can process.

I have always been fascinated withembedded systems and telephony. Ireally like working “close to themachine” on embedded systems, and Ihave a parallel interest in speech andtelephony that dates back to my hamradio days as a teenager. One project Ihad been dreaming about for years isan embedded telephony platform forVoIP or IP-PBX applications.

One problem with telephony is thatit requires a lot of processing power.Unfortunately, most embedded proces-sors are not too powerful. So, a com-mon design approach for embeddedtelephony consists of a general-pur-pose microcontroller combined with aspecial-purpose DSP chip to handlethe hard-core number crunching. Thistwo-CPU approach increases the sys-tem cost and complexity.

About 18 months ago, I stumbledacross the Blackfin processor fromAnalog Devices. The Blackfin is apowerful host processor and a DSP(i.e., it can run µClinux applicationsand DSP code efficiently and simulta-neously on one processor).

A typical embedded processor willstruggle to run more than one or twochannels of G.729 speech compressionor echo cancellation software. TheBlackfin, running at 500 MHz, is capableof running 60 channels of G.729 speechcompression or echo cancellation. Thismakes it possible to build low-cost,high-performance embedded telephonysystems, like an IP-PBX that can supportmultiple analog and VoIP channels atthe same time. For about $500, you can

Examples of signaling information arethe ring detection and on/off hook sta-tus signals. Analog ports are surpris-ingly difficult to build because theyuse a mixture of rather old technolo-gies. For example, a ring signal may be200 VPP (at low current), on and offhook status is indicated by loop cur-rent flowing, and the transmit andreceive audio is mixed together on justtwo wires, which leads to echo prob-lems. All of this must be reliably andsafely connected to low-voltage digitalsystems. Fortunately, there are excellentchipsets available to help build cost-effective and reliable analog interfaces.

Telephone calls can also flowthrough the Ethernet port using VoIP.Both local (e.g., using SIP phones) andtrunked calls can be performed usingVoIP. The magic of an IP-PBX is thatanalog and VoIP calls can be tiedtogether. You can route a call from ananalog handset over the Internet tosave money on long-distance calls.

What happens when you make a reg-ular analog phone call? First, pick upan analog phone’s handset. This gener-ates an “off-hook” event in the FXSport that tells the Asterisk software togenerate a dial tone in your phone.When you dial 9, DSP software decodesthe DTMF tones and presents Asteriskwith the digit. Asterisk then connectsyour FXS port to an FXO port so youcan reach the local exchange whereyou can dial a phone number as usual.

What about VoIP calls? Well, sayyou use the same analog phone tomake the call, but this time you dial

FEATURE ARTICLE by David Rowe

Embedded IP-PBX

David Rowe describes the design of a µClinux-powered IP-PBX capable of switching bothanalog and VoIP calls. With an Analog Devices Blackfin processor, some custom hardware,and Asterisk PBX software, you can build a similar system.

µClinux

Asterisk

DSP software

Devicedriver

BlackfinCPU

FXSport

FXOport

Ethernet

Analogphones

Localexchange

IPphones

Internet

Figure 1—This is a block diagram of the Embedded IP-PBX showing the major software and hardware compo-nents. The heart of the system is the Blackfin proces-sor. This is connected to hardware such as theFXO/FXS telephone ports and Ethernet. The Blackfinprocessor runs the µClinux operating system andAsterisk application software.

Switch Analog and VoIP Calls

long distance. In this case, Asterisk isprogrammed to route the call over theInternet. To save bandwidth, the DSPsoftware compresses the speech sam-ples from the FXS port from 64 kbpsdown to 8 kbps. The Asterisk softwarethen puts the speech samples in pack-ets and squirts them out the Ethernetinterface onto the Internet.

A lot of the IP-PBX’s power is provid-ed by the Asterisk software, whose pri-mary sponsor is Digium. The ability torun a powerful operating system such asµClinux is also very useful. For exam-ple, you can telnet into the IP-PBX

while it is running to debug and con-figure it.

THE HARDWAREThe hardware is built around four

PCBs. The first board is an AnalogDevices Blackfin STAMP card. It is adevelopment system that is available off-the-shelf from Digi-Key. It contains anAnalog Devices ADSP-BF537 Blackfinchip, 64 MB of RAM, 4 MB of flashmemory, and connectors that break outmany of the ports. It runs µClinux and issupported by www.blackfin.uclinux.org.

One great feature is that an open-hardware/software community existsaround the Blackfin. Reference designsfor Blackfin hardware (such as theSTAMP boards) and various daughterboards are freely available.

On top of the STAMP sits a 4fx daugh-ter board. (Why are boards alwaysgirls?) It holds some glue logic andsockets for the modules and also sup-ports an MMC to provide extra flashmemory storage. The 4fx’s name comesfrom the fact that the daughter boardcan support up to four FXS or FXOmodules.

The modules are the little boardsthat plug into the daughter board.There are two types of modules, FXSand FXO. Photo 1 shows the 4fx

daughter board and modules disassem-bled. There are two modules of eachtype in the photo. Photo 2a features

www.circuitcellar.com CIRCUIT CELLAR® Issue 208 November 2007 13

Photo 1—Here you see the 4fx daughter board andmodules before assembly. Each of the four modules atthe bottom mate with matching connectors in the middleof the 4fx daughter board. Note the large vacant area inthe middle of the PCB. It is necessary to provide physi-cal isolation between the FXO ports and the rest of thesystem.

Photo 2a—The IP-PBX is assembled and configured forfour analog ports. From top to bottom, you can see theFXS/FXO modules, the 4fx daughter board, and the BF537STAMP. There is an optional MMC connector on the left.Green indicates an FXS port, red an FXO. b—The designis expandable to multiples of four ports by stacking addi-tional daughter cards and modules. The wcfxs device driverautomatically detects the number and type of ports avail-able. In this case, there are four FXS and four FXO ports.

a)

b)

Figure 2—Take a look at the FXO module schematic. It provides an interface between a telephone line and the Blackfin processor. Its most important task is to provide high-voltage isolation, which is achieved using the capacitive barrier formed by C1 and C2.

The schematics for the FXS and FXOmodules are shown in Figures 2 and 3.Both modules are based on chipsetsfrom Silicon Laboratories. The circuitdesigns for the modules are derivedfrom the reference circuits provided inthe Silicon Laboratories datasheets.

The most important function of theFXO module is to isolate the “lineside” of the port from the low-voltagedigital side. There are safety reasons forthe isolation. If lightning hits thephone lines, you will want a degree ofphysical isolation between the phoneline and the rest of the hardware. Thisisolation is rigorously tested duringFCC-68 compliance testing by the appli-cation of high voltages that simulatelightning. The Silicon Laboratories chipsachieve it with a capacitive isolationbarrier (C1 and C2). The Silicon Labora-tories Si3050/Si3019 chipset used for theFXO module also performs other func-tions, such as line voltage and currentmonitoring, impedance matching, A/D

the entire system assembled, poweredup, and ready to make calls. There aretwo FXS modules on the left and twoFXO modules on the right. The color ofeach LED indicates the type of moduleinserted via an autodetection algorithm. Itis also possible to stack multiple 4fxboards to expand the number of channelsthat can run on the system (see Photo 2b).

In the next few sections, I’ll describethe schematic-level design for the FXS,FXO modules, and the 4fx card. TheBlackfin STAMP card schematics areavailable at www.blackfin.uclinux.org.

FXO AND FXS MODULE DESIGNThe gEDA suite of GPL electronic

design automation tools was used forschematic entry, PCB layout, and Ver-ilog simulation throughout the project(www.geda.seul.org). The use of open-source tools makes it easy for anyone tomodify the designs. Because the hard-ware designs are “open,” it is nice touse open-source tools where possible.

and D/A conversion of the speech signal,ring detection, and DC termination.

A screenshot of the PCB layout forthe FXO module is posted on the Cir-cuit Cellar FTP site. The PCB measuresabout 50 × 25 mm. Note the “isolationbarrier” between the two chips, whichonly C1 and C2 are allowed to bridge.The PCB layout was carefully designedto keep the line side and low-voltageside physically isolated by a 3- to 4-mmgap. Even the ground plane is absent inthis area, because it would violate thephysical isolation requirements.

The FXS module has similar func-tions to the FXO module (see Figure 3).In this case, the Silicon LaboratoriesSi3210/Si3201 chipset is used. Themain difference with the FXS moduleis that it generates ring and “battery”DC supply voltages. Silicon Laborato-ries employs a clever switched-modepower supply that is modulated togenerate the 200-VPP sinusoidal ringvoltage. Although the datasheets

14 Issue 208 November 2007 CIRCUIT CELLAR® www.circuitcellar.com

Figure 3—Take a look at the FXS module schematic. It provides an interface between a telephone and the Blackfin processor. The DC/DC converter in the lower-right cornergenerates 48-V battery and 200-VPP ring voltages from a standard 12-V supply.

Put your creativityto the test!

Join the Ethernet Revolution!

Circuit Cellar magazine is pleased to bring you the WIZnet iEthernet Design Contest 2007. Now

you can easily add Ethernet capability to your embedded project and win fame and fortune in

the process. WIZnet’s W5100 hardwired TCP/IPEthernet controller will be the key to your

contest success. This 3-in-1 chip solution brings TCP/IP implementation without an OS. Both

MAC and PHY are embedded.

Show us how you use the impressive W5100 to usher your embedded project into the

Ethernet revolution. Your creativity and design skills could win you a share of $15,000 in cash

prizes and recognition in Circuit Cellar magazine.

For details, visit www.circuitcellar.com/wiznet.

16 Issue 208 November 2007 CIRCUIT CELLAR® www.circuitcellar.com

Figure 4—This is the 4fx daughter board schematic.This board breaks out the TDM and SPI bus signalsfrom the STAMP card and feeds them to eachFXS/FXO module. U4 is a Xilinx CPLD thatexpands the number of SPI chip select signalsavailable from the STAMP.

18 Issue 208 November 2007 CIRCUIT CELLAR® www.circuitcellar.com

claim that the DC/DC converter canwork well down to 5 V, I found that a12-V supply was required for theDC/DC converter to avoid excessiveanalog noise.

The Si3210/Si3201 FXS chipset alsotakes care of other functions, such asline voltage monitoring, loop currentdetection, overload protection, imped-ance matching, and A/D and D/A con-version of the speech signal.

The FXS module’s PCB layout isquite challenging because there arethree distinct signal areas in the small50 × 25 mm area. (A screenshot of theFXS module PCB is posted on the CircuitCellar FTP site.) The first area handlesline-level analog signals from the tele-phone handset. The second region is adigital interface containing a 2.048-MHzTDM bus and a SPI bus that connects tothe fast rise time (i.e., noisy) signals fromthe Blackfin. The third area is a switch-mode DC/DC converter that converts alow-voltage 12-VDC rail to the –90 VDCrequired for the telephone “battery” sup-ply and also generates the 200-VPP ringvoltage. To generate the high voltages ateven small currents, large pulsed cur-rents must flow in the 12-VDC supplyline, which is a potential source of noise.

It is important to prevent theDC/DC converter and digital sidefrom injecting noise into the sensitivelow-level analog section. Based on tipsfrom the Silicon Laboratories applica-tion notes, a few tricks were used. TheDC/DC converter ground was keptisolated from the ground plane andconnected only at a single point. Thisprevents large ground current spikesfrom entering the ground plane. Largecurrent pulses in the ground plane getconverted to voltages (because theground plane impedance is small butnonzero), which then get superim-

posed on the low-level analog signals asunwanted noise. You can see the lack ofa ground plane in the upper-left handpart of the FXS module PCB screenshoton the Circuit Cellar FTP site.

A ground plane was used through-out the analog section and in the dig-ital section. The two ground planesare connected only at a single pointto prevent digital currents from flow-ing through the analog section andinducing noise. This point is as faraway from the DC/DC converter aspossible.

Bringing the two module designs tolife was surprisingly straightforward.The first FXO module I built hadsome problems with clicks and popsin the audio; however, a good cleaningwith the flux remover fixed that! Theflux I use is conductive so any residuetends to upset circuits that depend onhigh-resistance values in certain areas.

I then tried the FXS module and itworked on the first try. I was reallyhappy about that. I was placing callsabout 5 minutes after I applied power.Hardware development isn’t meant towork like that!

4fx DAUGHTER BOARD DESIGNNow, take a look at the 4fx daughter

board schematic (see Figure 4). The FXOand FXS modules communicate withthe host processor via two serial buses.The signaling and control data flows viaa SPI bus. The actual transmit andreceive speech samples flow on a time

division multiplexed (TDM) bus.The 4fx breaks out the SPORT con-

nector from the STAMP board and feedsthe SPI and TDM signals to each mod-ule. Because the STAMP has only alimited number of SPI chip-select sig-nals available, a Xilinx CPLD (U4) isused to expand the number of SPIdevices that can be addressed. This isdescribed in the next section. TheCPLD also supports a “stacking”architecture where several boards canbe stacked on top of each other toobtain extra analog ports.

To reduce EMI, the suppressioncomponents (e.g., ferrites and capaci-tors) for each port were placed on thedaughter board as close as possible tothe RJ-11 connectors. Each digital linein the daughter board also has seriestermination resistors. The resistors areinitially loaded as 0 Ω, but this can beincreased to combat EMI or ringingissues if required. A 74LV244 buffer(U2) is also used to reduce the edgerates of high-speed digital signals fromthe Blackfin STAMP card. Reducingthe edge rates reduces EMI becauseslow rise and fall times mean reducedhigh-frequency energy.

XILINX CPLD FIRMWAREOn the 4fx card, a Xilinx CPLD is

used to expand the number of SPIselect lines available and provide a reg-ister to drive the LEDs (see Figure 5).

The STAMP SPORT connectorshave only a limited number of SPIselect lines available. However, on the4fx design, I have many SPI devices(e.g., four telephony ports and a regis-ter to drive the LEDs). I would alsolike to stack the 4fx cards to buildeight port telephony systems. So, theproblem is accessing multiple SPIdevices across multiple cards usingonly a small number of SPI lines avail-able on the SPORT connector.

nCSADemux

nCS1

nCS2

nCS3

nCS4

Compare

Shift register

Shift register

nCS5

2 3

en

nCSB

SPI data

A6, A7

en

Bicolor LEDs 8

Figure 5—The CPLD expands the number of SPI chipselect lines available using a demultiplexer and shift regis-ter. It also implements a SPI peripheral that drives thebicolor LEDs.

A2 A1 A0 SPI Device0 0 0 nCS0: spare

0 0 1 nCS1: Port 1

0 1 0 nCS2: Port 2

0 1 1 nCS3: Port 3

1 0 0 nCS4: Port 4

1 0 1 nCS5: LED register

Table 1—This truth table relates addresses to the SPIdevice that you are currently talking to. Note that onlyfive devices are decoded. Four of the devices areFXS/FXO modules. Device 5 is a bank of bicolor LEDs.

D1 D0 LED10 0 Off

0 1 Red

1 0 Green

1 1 Off

Table 2—This is a truth table for LED status. Two digitallines are used to drive each LED, which enables you toselect the polarity as well as switch the LED off and on.

www.mouser.comOver 860,000 Products Online

The Newest Semiconductors

Experience Mouser’s time-to-market advantage with no minimums and same-day shipping of the newest products from more than 335 leading suppliers.

(800) 346-6873

The Newest Products For Your Newest Designs

The ONLY New Catalog Every 90 Days

20 Issue 208 November 2007 CIRCUIT CELLAR® www.circuitcellar.com

I decode a large number of SPIdevices using two SPI select linescalled nCSB and nCSA. nCSB isasserted and a byte is sent that selectsthe SPI device you want to address.The format is:

D7 D6 D5 D4 D3 D2 D1 D0A7 A6 X X X A2 A1 A0

A [7:6] selects the card from othercards in a stack. Two jumpers deter-mine the address of the card. Eachcard in the stack must have a unique2-bit address to be successfully decod-ed. A [2:0] selects the SPI device onthe card (only five devices are decod-ed) (see Table 1).

nCS [4:1] is routed via I/O pins todevices external to the CPLD. nCS5 isan internal SPI device and is not rout-ed to an I/O pin. Once the SPI devicehas been selected, nCSA is asserted totalk to the actual SPI device. nCSAmay be asserted as many times asrequired (e.g., to perform a blocktransfer on the SPI device).

Note that once the device has beenselected, SPI transfers proceed normal-ly (i.e., assert nCSA and read/write asdesired). When access to another SPIdevice is required, nCSB is assertedand the byte sent can be used to selectanother device (or card).

The LEDs appear as an 8-bit SPIregister at address five on the card.When you write to the register, thevalue determines the status of each

LED (see Table 2). And similarly forthe other LEDs:

D[3:2] LED2D[5:4] LED3D[7:6] LED4

SOFTWAREThe Silicon Laboratories chips are

commonly used with Asterisk on PCI-card-based line interface hardware.Open-source drivers for the chips exist,dramatically simplifying development.

Figure 6 shows the software archi-tecture of the Asterisk implementa-tion used for the embedded IP-PBX.Asterisk is a user-mode applicationthat communicates with a kernel-mode driver called zaptel. Zaptel com-municates with lower-level driversthat talk to the actual hardware.

The Asterisk wcfxs driver was chosenas the starting point for the embedded IP-PBX. The driver was originally written tocommunicate with the Silicon Laborato-ries chips operating on a PCI bus. To portthe driver to the Blackfin, the PCI inter-face component was carefully removedand replaced with code that interfaces to

the Blackfin’s SPORT (TDM serial port)and SPI hardware.

Surprisingly, it is actually easier(and cheaper) to interface the SiliconLaboratories chips to the Blackfincompared to an x86 PC because noPCI bridge is required. The driver isalso simpler.

Most of the software changes wereconfined to the wcfxs driver, althoughsome changes to the Asterisk applica-tion were also required, such as archi-tecture-specific word-alignment issuesand several Linux-µClinux portingissues. One area that needed optimiza-tion was the DTMF detection routines.The code was written to run on a gener-al-purpose x86 CPU where it is assumedfloating-point support is available in theform of a hardware floating-point unit(FPU). The Blackfin does not have anFPU and is in fact optimized for fixed-point operation. Thus, the original floatDTMF code ran very slowly, consuming31 MIPS per channel.

The problem was traced to the“inner loop” of the DTMF detector(see Listing 1). The code implements adigital filter and is called eight times

Listing 1—Take a look at the floating-point DTMF detector inner-loop code. This is the core of a DTMF tonedetector. It executes 64,000 times for every channel running on the IP-PBX. The final line implements a typicalDSP operation: multiply two numbers and then add and subtract from the result.

static inline void goertzel_sample(goertzel_state_t *s, short sample)

float v1;float fsamp = sample;

v1 = s->v2;s->v2 = s->v3;s->v3 = s->fac * s->v2 - v1 + fsamp;

Listing 2—This is fixed-point DTMF detector inner loop code. The DSP operation has been broken down intotwo lines. Note the casting to 16-bit integers and scaling via shifts. These operations give you fine control overhow the C compiler treats these operations. The main challenge with fixed-point DSP is keeping the dynamicrange of signals inside a 16-bit range.

#define AMP_SCALE 8#define FAC_SCALE 14

static inline void goertzel_sample(goertzel_state_t *s, short sample)

int16_t v1_fix;int mpy;

v1_fix = s->v2_fix;s->v2_fix = s->v3_fix;mpy = (int16_t)( ((int)s->fac_fix * (int)s->v2_fix) >> FAC_SCALE );s->v3_fix = mpy - v1_fix + (sample>>AMP_SCALE);

Asterisk

dsp.cDTMF detector

µClinux

User mode

FXO porthardware

Zapteldevice driver

Wcfxsdevice driver

FXS porthardware

Kernel mode

Analogphones

Localexchange

Figure 6—The IP-PBX runs the µClinux operating systemand Asterisk PBX software. To run Asterisk on the Blackfin,the DTMF detector was modified to use fixed-point arith-metic. The wcfxs FXS/FXO port device driver was also mod-ified to support the Blackfin serial port and SPI hardware.

www.circuitcellar.com CIRCUIT CELLAR® Issue 208 November 2007 21

SOURCESBlackfin STAMPAnalog Devices, Inc. www.analog.com

Si3050/Si3019 and Si3210/Si3201 chipsetsSilicon Laboratories, Inc. www.silabs.com

PROJECT FILESTo download code, go to ftp://ftp.circuitcellar.com/pub/Circuit_Cellar/2007/208.

RESOURCESBlackfin Linux Project, www.blackfin.uclinux.org.

gEDA Project, www.geda.seul.org.

D. Rowe, “Free Telephony Project:Open Embedded Telephony,” 2007,www.rowetel.com/ucasterisk.

S. Underwood, “Spandsp Project,”www.soft-switch.org.

for each input sample (eight filters arerequired for each DTMF detector).Because each channel has 8,000 inputsamples per second, the total number offunction calls is 8 × 8,000 × the numberof channels per second. So, it is impor-tant to make sure the “inner loop” coderuns as efficiently as possible.

The trick is to replace the floating-point code with equivalent fixed-pointcode (see Listing 2). The code mapsdirectly to the assembler instructionset of the Blackfin and compiles downvery efficiently. The scale factors werechosen to keep the dynamic range ofthe variables within a range easily rep-resented by a 16-bit integer. The fixed-point port was tested with a unit testfrom the Spandsp library that puts theDTMF detector through its paces(www.soft-switch.org).

The result was that the fixed-pointDTMF detector worked just as well asthe floating-point version, but it con-sumed about 1.75 MIPS compared to the31 MIPS required for the floating-pointversion. Standard vanilla C code wasused (see Listing 2). With a little Black-fin assembler replacing the C code, theperformance could be improved evenfurther. However, with 500 MIPS avail-able on the Blackfin, 1.75 MIPS for theDTMF decoder is probably fast enough.

GO BUILDIn this article, I explored the archi-

tecture of an embedded IP-PBX anddescribed in detail the schematic-levelhardware design and PCB layout.Using embedded techniques and open-source hardware and software, it ispossible to build a low-cost IP-PBXwith features (VoIP, IVR, and flexibili-ty) that rival those of $10,000 PBXs.

Other areas of the project that havenot been mentioned due to space limi-tations include the Asterisk softwareconfiguration, a custom DSP mother-board and configuration of the PBX. Formore information, visit the project website (www.rowetel.com/ucasterisk).

The software and hardware designsfor the project are open-source andcontributions by corporations or indi-viduals are welcome. Currently, ateam of companies and individuals isworking on the project in areas likeDSP, µClinux software, and hardware

Author’s Note: Thanks to the Linux,Blackfin, Asterisk, and gEDA commu-nities. My wife Rosemary did a greatdeal of the schematic entry for the FXSmodule, and Jerry Zeng from AnalogDevices was very helpful in checkingthe design and brainstorming theCPLD requirements for the 4fx.

David Rowe has 20 years of experiencein the development of DSP-based teleph-ony and satellite communications hard-ware/software. He has a wide mix ofskills, including software, hardware, andproject management. He earned a Ph.D.in DSP Theory. David has held executive-level positions in the satellite communi-cations industry (www.dspace.com.au)and has built and successfully exited asmall business (www.voicetronix.com).However, he has decided that he is better

development. Refer to the project website for more information.

If you would like to get started withembedded IP-PBX development, I havea fully assembled and tested IP04 IP-PBX for $450 plus shipping. I

at debugging machines than people, sohe currently hacks telephony hardwareand software full time.