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Fault Simulation for Hardware Emulation John Curtin Faculty Advisor: Dr. Fred Wang Graduate Mentor: Geoff Laughon CURENT Final Presentation 7/14/16 Min Kao Building, University of Tennessee at Knoxville

Fault Simulation for Hardware Emulationeducation.curent.utk.edu/wp-content/uploads/Presentation-John...Fault Simulation for Hardware Emulation John Curtin Faculty Advisor: Dr. Fred

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Page 1: Fault Simulation for Hardware Emulationeducation.curent.utk.edu/wp-content/uploads/Presentation-John...Fault Simulation for Hardware Emulation John Curtin Faculty Advisor: Dr. Fred

Fault Simulation for Hardware Emulation

John Curtin

Faculty Advisor: Dr. Fred Wang

Graduate Mentor: Geoff LaughonCURENT Final Presentation

7/14/16

Min Kao Building, University of Tennessee at Knoxville

Page 2: Fault Simulation for Hardware Emulationeducation.curent.utk.edu/wp-content/uploads/Presentation-John...Fault Simulation for Hardware Emulation John Curtin Faculty Advisor: Dr. Fred

Faults

• Many different kinds

Example: Line-to-Line

• Large amounts of power dissipation

• Caused by fault current

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Faults (Continued)

• Other kinds:

Line-to-Ground, Double-Line-to-Ground, Three-phase, open-circuit

• Cause massive disturbances in power systems

Can damage/destroy equipment

Causes power outages

• Fault current important parameter in protection systems

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Hardware Test Bed (HTB)

• Hardware simulation of power grid

• Made up of several hardware racks

• More realistic than software

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Hardware Test Bed (HTB) (Continued)

• Uses AC-to-DC power converters

Coupled for loads and generators

• Uses short line approximation

• Can simulate open-circuit faults

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Hardware Construction/Design

• Worked extensively building cabinets

• Involved metalwork, soldering, crimping, wiring, and so on

• Important skills for engineers

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Problem Statement

• To help the HTB accurately simulate faults Includes pre-fault, transient, and post-fault current waveforms

• Create Simulink Simulation

• Use to make C code to control power converters

• Known values Sending voltage

Receiving voltage

Line impedance

Fault impedance

Fault location

Start and End time

• Calculate Line and Fault Currents

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Page 8: Fault Simulation for Hardware Emulationeducation.curent.utk.edu/wp-content/uploads/Presentation-John...Fault Simulation for Hardware Emulation John Curtin Faculty Advisor: Dr. Fred

Background Research

• Traditional fault analysis

Uses phasor-domain analysis

Not adequate for research project

Does not incorporate transient

• Researched several topics, including:

Z-bus method

Generator Stability

d-q coordinates

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Background Research (Continued)

• Decided method

s-domain transfer function

s=σ+jω

Continuous, all-inclusive variable

Constraints of s-domain do not conflict with project constraints

• Use circuit analysis with Z=R+sL

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Implementation

• Model circuits

Example: L-to-G

• Before Fault

• After Fault

iF=iA-ia

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Simulation

• Put mathematical models into Simulink

Note: not using circuit simulation tools

Make model as close to C code as possible

• Static Transfer Function

Does not give transient effect

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Simulation (Continued)

• Dynamic Transfer Function

Variable coefficients

Switch with step functions

Attempted several methods

Ran out of time

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Conclusion

• Wrong research topics

Consumed time

• Learned interesting topics

• Create Dynamic transfer function in future

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Acknowledgements

This work was supported primarily by the ERC Program of the

National Science Foundation and DOE under NSF Award Number

EEC-1041877.

Other US government and industrial sponsors of CURENT

research are also gratefully acknowledged.

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Acknowledgements

• I would like to thank the following people

Dr. Fred Wang

Dr. Kevin Tomsavic

Dr. Gerald Selvaggi

Geoff Laughon

Bo Liu

Yiwei Ma

Jessica Boles

Shuoting Zhang

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Questions and Answers

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