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1 June 2004

How FACTS Controllers Function in

an AC Transmission System:

Series Controllers

Brian K. JohnsonUniversity of Idaho

P.O. Box 441023

Moscow, ID 83844-1023 USA

[email protected]

2 June 2004

Topics

• Variable Impedance Series Compensators

» Thyristor Controller Series Capacitor (TCSC)

» Thyristor Switched Series Capacitor (TSSC)

» Concentrate on TCSC

• Switching Converter Series Compensators

» Static Synchronous Series Compensator (SSSC)

• Multiterminal Compensators

» Generalized Unified Power Flow Controller

(GUPFC) or Convertible Series Compensator

3 June 2004

Topics (cont)

• Describe operation of converter

• Show results in ATP and PSCAD

• Discuss control loops

• Case Studies

4 June 2004

References

• Understanding FACTS by Hingorani and Gyugyi:

Chapters 6 and 8

• Flexible AC Transmission Systems (FACTS), edited

by Y.H. Song and A.T. Johns, IEE Power and

Energy Series, 30

• M. Mathur and R.K. Varma, Thyristor-Based FACTS

Controllers for Electrical Transmission Systems.

Wiley-IEEE Press, 2002.

5 June 2004

Static Series Compensation

• Add the ability to rapidly vary series

compensation

» Control power flows

» Improve transient stability

» Power oscillation damping

» Subsynchronous resonance (SSR) damping

» Improve voltage stability

6 June 2004

Basic Functional

Requirements

• Primarily applied for power flow problems

» Shorten line by fixed percentage

» Control loop flows

» Minimize voltage variation at end of radial lines

» Counteract dynamic machine swings

• With appropriate control structure can

achieve full utilization of the line without

danger from SSR



7 June 2004

Two Classes of Static

Series Compensators

• Dual of shunt converter

» Functionally a controlled voltage source in

series with the line to control current

» Basic concepts from shunt compensators apply

• Variable Impedance Type

» Thyristor switched series capacitor (TSSC)

» GTO controlled series capacitor (GCSC)

» Thyristor controlled reactor in parallel with fixed

capacitor (TCSC)

8 June 2004

Two Classes of Static

Series Compensators

• Switching Converter Type

» Use converter to synthesize series injection

from a dc bus

» Normally a Voltage Source Converter

– Multipulse configurations

– Pulse width modulated switching

– Two level or multilevel converter, possibly with slow

PWM

9 June 2004

Thyristor Controlled

Reactor

• Average susceptance

with firing delay angle, α

• Connect in parallel with

a series capacitor

XL

XL

2

XL

2

BL(ë) =ωL1 1à

ù2ëà

ù

sin(2ë)ð ñ

10 June 2004

TCSC

• TCR current injection circulates through

capacitor--increasing effective Vc

iline

iL(α)

ic(α) = iline+iL(α)

+ -vc(α)

11 June 2004

TCSC Basics

• The effective impedance is:

• Where:

• Note that α is the firing delay angle

measured from the Vc peak

• Tune L and C for resonances

X TCSC (ë) =X L(ë)àX C

X C X L(ë)

X L(ë) = X L ùà2ëàsin(2ë)ù

ð ñ

12 June 2004

TCSC CharacteristicImpedance versus firing delay angle

I n d u c t i v e

C a p a c t i v e απ/2

Resonance

XTCSC = XC

αL lim αC lim

XTCSC = XL || XC



13 June 2004

TCSC Basics

• Resonance imposes limits on firing angle

» But it also improves boost in C or L

• Note minimum values for impedance• This characteristic is also plotted in terms of

the conduction angle, σ, where π=2*α+σ

• The TCR can be modeled as a current

source for some classes of studies

14 June 2004

TCSC Basics

• Voltage distorted while TCR conducts

» Variable impedance model inaccuracy

• Ratio of XL/XC impacts performance» Impacts the resonance

» Best if ratio between 0.1 and 0.3

• Several installations worldwide.

» Two projects in United States

» FURNAS North-South Interconnection

15 June 2004

X X

Damping

Circuit

Damping

Circuit

Breaker

TCSC 15 to 60 Ω

MOV

Breaker

MOV MOV

40Ω

55Ω

Kayenta TCSC

16 June 2004

X

Breaker

TCSC module #1

MOV

TCSC

#2

TCSC

#5

TCSC

#3

TCSC

#6

TCSC

#4

Slatt TCSC

17 June 2004

Thyristor Controlled Series

Capacitor (TCSC)

• MOV for capacitor overvoltage protection

• Bypass breaker, damping circuit and controls

required for fault studies

18 June 2004

Key Elements in the TCSC

• Power circuit for the power converter

• Synchronization and gate control

• Control loops

• Depending on studies, also model

overvoltage protection



19 June 2004

TCSC Power Circuit

• The basic power

circuit for the TCSC

is simple

• Separate circuit for each phase

• Control for TCR

needed

iline

iL(α)

ic(α) = iline+iL(α)

+ -vc(α)

20 June 2004

Typical TCSC Waveforms

TCR Current

(f ile tcsc11.pl4; x-var t) t: S1 c:V1 -VP

0.20 0.22 0.24 0.26 0.28 0.30

-15

-10

-5

0

5

10

15TCR Current

• Amplitude of

current changes

with α

• Larger currentwith longer

conduction

period

• High harmonic

content

» Flows throughthe capacitor

21 June 2004


Capacitor Current

(file tcsc11.pl4; x-var t) t: S1 c: -V1

0.20 0.22 0.24 0.26 0.28 0.30

-25.00

-18.75

-12.50

-6.25

0.00

6.25

12.50

18.75

25.00Capacitor Current• TCR current

rides on top of line current in

the capacitor

• In inductive

mode it issubtracted

instead of

added

22 June 2004


Capacitor Voltage

(f ile tcsc11.pl4; x-var t) v:V1 t: S1

0.20 0.22 0.24 0.26 0.28 0.30-220

-165

-110

-55

0

55

110

165

220• Voltage 90 deg.

out of phasewith current

• Linear zone

near voltage

zero crossings

• Stretches the

voltage

waveform

23 June 2004

TCR Internal Control

Scheme (one option)

GatePulse

Generator

ConvertCurrent/Admittance

to Delay Angle α

(loop-up table)

Gate Pulsesα

Input Filter and Phase

Compensation

Synchronization(Phase Lock Loop)

Measured

voltage or current

X ref

or I ref

Bref

24 June 2004

Current/Admittance to

Delay Angle Conversion

• Implements:

• Can use current or impedance instead

• Bref (α) is a requested value

• Rather than calculating directly, a look-up

table is used

BLref (ë) =ωL

1 1àù

2ëà

ù

sin(2ë)ð ñ



25 June 2004

Input Filtering

• Instantaneous voltage or current brought in

through an instrument transformer

• Analog and/or digital filtering to producefundamental component for synchronization

• Series devices are more sensitive:

» Block subsynchronous components (high pass

filter, unity gain around 60Hz)

» Block high frequency components (low pass

filter)

26 June 2004

Input Filtering (cont.)

• Input voltage/current digitally sampled

• Anti-aliasing filter to remove sampling effect

» Low pass, below 1/4 sampling frequency» Possibly add additional digital filters to pass

fundamental or block certain harmonics

• Closed loop control requires RMS voltage

and/or current

» Fundamental component from digital filter

27 June 2004

Phase Correction

• Input filtering a time (phase delay) in the

measured instantaneous quantities

• The amount of phase delay is predictable

» Fine tune with feedback from synchronization

circuit

» Add a phase lead to correct for phase lag

28 June 2004

Input Filtering and Phase

Correction

or Imeas

Vmeas CT or VTRatio

Input Sampling Anti-Aliasing

Clock

High Pass andLow Pass Filter

RMS MagnitudeCalculation

To Error Amplifier

Add forTCSC Phase

Correction

PhaseError

To PLL

Phase Reference

From PLL (ωr t)

29 June 2004

Phase Correction

• Create an orthogonal pair of vectors

» Park’s transformation if three phase measurement

» Phase rotation (delay) if single phase input

• Need instantaneous angle reference (ωr t = θr )

• Phase Error = -Vd sin(θr ) + Vq cos(θr )

30 June 2004

Synchronization

• Detect zero crossing of input fundamental

frequency current waveform

» Delay by 90 degree to get peak

» Proper delay requires knowledge of actual

system frequency (not the ideal value)

» Inputs include phase error (from measuring

circuit and system drift), and base frequency

• Note often use of “analog” signals, could do

this digitally as well



31 June 2004

Synchronization:

Phase Lock Loop (PLL)

Phase

Error

Kp

1

sTi

+

+

BaseFrequency

+

1

s

ωr t = θr

Ramp from

0 to 2π

To Phase Error

Can add phasecorrection

• Integrator resets every 2π radians

32 June 2004

Synchronization

• Zero detector produces pulses at current zero

crossings

• Monitors the line current, not capacitor or TCR

current

• Positive zero crossing kept, used to reset integrator

• Output is a ramp, 0 to 360o, reset every cycle

• Can implement without PI controller on phase error,

but poorer response to phase jumps during faults

33 June 2004

Sample Outputs:

(file tcsc11.pl4; x-var t) t: RAMP t: ANGP t: P1

0.18 0.20 0.22 0.24 0.26 0.28 0.30

0

50

100

150

200

250

300

350

400• Ramp is output

of integrator

• Reset with zerocrossings

» Adjusts for

frequency

• Flat line is α

• Gate pulse at

intersection

34 June 2004

Results with PLL--

Three Phase Fault

(file pll.dat.pl4; x-var t) v:BUS1A t: DERIVA v:BUS1B v:BUS1C t: DERIVB

36 40 44 48 52 56 60

-1.2

-0.8

-0.4

0.0

0.4

0.8

1.2

*10 -3

*10 5


35 40 45 50 55 60

-1.2

-0.8

-0.4

0.0

0.4

0.8

1.2

*10 -3

*105

Kp=100, Ti=8.3E-3

Kp=1000, Ti-8.3E-4

35 June 2004

Results with PLL--SLG Fault


35 40 45 50 55 60

-1.2

-0.8

-0.4

0.0

0.4

0.8

1.2

*10 -3

*10 5


35 40 45 50 55 60

-1.2

-0.8

-0.4

0.0

0.4

0.8

1.2

*10 -3

*10 5 Kp=100, Ti=8.3E-3

Kp=1000, Ti-8.3E-4

36 June 2004

TCSC Control Loops

• Typically close loop based on either Vc

(compared to Vc ref) or Xc

• Calculate a current reference that is

used to calculate α for the TCR as seen

earlier shunt compensators



37 June 2004

TCSC Internal

Control Scheme

GatePulse

Generator


to Delay Angle α(loop-up table)

Gate Pulsesα

Input Filter

and PhaseCompensation


Measuredvoltage or

current

X ref

or I ref

Bref

• Outer levels of

control loops

generate the

Bref , X ref or I ref

38 June 2004

TCSC Control Diagram

GatePulse

Generator


to Delay Angle α

(loop-up table)

Gate Pulsesα

Input Filter and Phase

Compensation


Measuredline

current

X ref

RMSCalc.

PI

Iset

Xmin

Xmax(I)

Loop-upTable

Vcap TSRControl

39 June 2004

TCSC Test System: WAPA’s

Kayenta Substation

• 230 kV transmission line between Navajo

and Shiprock

» Kayenta is an intermediate substation

• Simple R-L line models

-j15 Ω-j55 Ω-j40 Ω 6.3+j61.9 Ω8.5+j63.5 Ω

j46.6 Ωj14.7 Ω

.05+j2.564 Ω

40 June 2004

Control Options in the Model

• Open loop: fixed firing angle control

• Open loop: reactance control

• Closed loop current control

• Closed loop reactance control

• Starting point for additional control models

• Overvoltage protection in TCSC controls

» Inductor fully in the circuit (α = 0)

» TCSC looks inductive

41 June 2004

Simulation Results:

Reactance Control

0 0.2 0.4 0.6 0.8 10

10

20

30

40

50

X r e f

a n d X

c a l c

0 0.2 0.4 0.6 0.8 1-4

-2

0

2

4x 10

4

V c a p a c i t o r

0 0.2 0.4 0.6 0.8 1-1000

0

1000

time (sec)

i l i n e

( t ) a n d I l i n

e r m

s

42 June 2004

Reactance Control

• The reactance control maintains a fixed

reactance through changes in the

system.

• The reactance command can be varied

from a central operating center,

• or from an further control loop, such as a

damping control



43 June 2004

Simulation Results:

Current Control

0 0.2 0.4 0.6 0.8 1 1.20

200

400

600

I s e t

a n d I r

m s

0 0.2 0.4 0.6 0.8 1 1.2-4

-2

0

2

4 x 10

4

V c a p

0 0.2 0.4 0.6 0.8 1 1.20

20

40

time (sec)

X c a l c

44 June 2004

Current Control Options

• Constant Current Control

• Keeps current through the line constant

through load variations within the controllablerange of TCSC.

• Current Tracking Control

» Keeps the line current at a fixed ratio to the

total load current (spread over several

lines) within the controllable range of

TCSC.

45 June 2004

Sample Case

• Consider a system with four parallel

transmission paths

• One line is rarely loaded near its

capacity while the others are overloaded

• Place a TCSC in the line that difficult to

control

• Try to load all four equally

46 June 2004

Current Tracking Control

47 June 2004

Simulation Results: Current Tracking

Control (for constant load current)

(file FINALFINAL.pl4; x-var t ) t: IRMS t: RMSACT

0.0 0.2 0.4 0.6 0.8 1.0[s]

0.0

0.5

1.0

1.5

2.0

2.5

48 June 2004

Sample Case

• If the load current increases or

decreases, the current in this line will

stay the same



49 June 2004

Simulation Results: Current Tracking

Control (for variable load current)

(file FINALFINAL1.pl4; x-var t) t: IRMS1 t: RMSACT

0.0 0.2 0.4 0.6 0.8 1.0[s]

0.0

0.4

0.8

1.2

1.6

2.0

50 June 2004

Simulation Results:


( f i l e F IN A L F I N A L 1 . p l 4 ; x - v a r t ) c : V S 1 - B U S 1

0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0[s ]

- 1 2

- 8

- 4

0

4

8

1 2

[A ]

( f i l e F I N A L F I N A L 1 . p l 4 ; x - v a r t ) c : C S 1 - C S W

0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0[s ]

- 3

- 2

- 1

0

1

2

3

[A ]

51 June 2004

Simulation Results:


(file FINALFINAL1.pl4; x-var t)factors:offsets:

10

c:CS1 -CSW10

c:VS1 -BUS10.25 0

0.06 0.08 0.10 0.12 0.14 0.16 0.18[s]

-3

-2

-1

0

1

2

3

[A]

52 June 2004

Model Limitation and

Pitfalls

• Series connection of thyristors not modeled

• Ideal switch models with crude loss

approximation

• Simple closed loop controls

» Use this model as a starting point for more

detailed controls

» Controls need to be tuned to the application

53 June 2004

External Control

• External control doesn’t really vary with

type of series compensator

» Internal control a bit more specific

• Variable impedance type compensators

not always seen as voltage injections

• Fig 6.43 of Hingorani and Gyugyi

provides several types of external

closed loop control

54 June 2004

Sample Damping Control

Input Signal

1

1+sTm

sTw

1+sTw

KG

1+sT1

1+sT2

1+sT3

1+sT4

+

-Xref

Xmeas

Xorder

Internal

Control

Xmax

Xmin



55 June 2004

Static Synchronous Series

Compensator (SSSC) Basics

• Synthesize a voltage source in series

with the line

• Series transformer coupled voltagesource converter

• Multipulse, multilevel or PWM converter

» A conventional VSC varies phase angle and

not voltage magnitude

• No power source on dc bus, just energy

stored in capacitor 56 June 2004

SSSC Basics

• Voltage source can’t deliver real power

• Vq= Vc = -jXc*I

• However, can look like a series inductor Vq

57 June 2004

Basic VSC Relations

effective

I STATCON

ESSSC

ESSSC

E

E

effective

−π/2 < δ < π/2whereI

a

Ea

a

0

−ϕδ

1M V

58 June 2004

Basic VSC Relationships

• Must have a capacitive ac source to

operate in line-commutated mode

• Majority of VSC applications require self-

commutating switches

• Bi-directional switch currents

• Switch voltage does not reverse

• Modules (connect in series or parallel) if no PWM

59 June 2004

Simple Model

• Based on power balance equations

• Ma is PWM Modulation Ratio

• In SSSC, Edc varied with phase angle

Transformer Interface

DC-AC

C (δ)dcdc IE

+

-

Inverter AC System

EV

L

1

t

a

V 1 =ù

2√

M aE dc I dc =ùωL

3 2√

E aSin(î )

60 June 2004

Devices

• SSSC will utilize GTO's, GCT’s or IGBT

• Bidirectional current, unilateral voltage

blocking



61 June 2004

Basic Six Step Bridge

Configuration

To Transformer

62 June 2004

Basic Six Step Waveforms

0.00 0.20

Time (seconds)

-8000.00

-4000.00

0.00

4000.00

8000.00

V o l t a g e ( V )

0.0 0.1 0.2

Time (seconds)

-20000.0

-10000.0

0.0

10000.0

C u r r e n t ( A m p s )

63 June 2004

Using 6-Step Converters

• Only have indirect control of Vq

» Ma is 1.0

• Can’t easily go from capacitive to

inductive series voltage injection

» Draw real power to increase Vq» Discharge capacitor to decrease Vq

V 1 =ù

2√

M aE dc

64 June 2004

Improving Voltage

Waveform

• Multipulse configuration to clean up

voltage waveform

• Requires multiwinding transformer

• 12 pulse is two 6-pulse bridges with 30

degree phase shift

• 24 pulse requires four 6-pulse bridges

• For series connected converters, 24pulse is often sufficient

65 June 2004

Voltage and Current for 12

Pulse Operation

( f i l e 1 2 p 1 . p l4 ; x - v a r t ) c : E 1 A T - IN V 0 1 A

0 . 0 0 0 . 0 3 0 . 0 6 0 . 0 9 0 . 1 2 0 . 1 5[s ]

- 7 0 0

- 5 2 5

- 3 5 0

- 1 7 5

0

1 7 5

3 5 0

5 2 5

7 0 0

[A ]

( f i le 1 2 p 1 . p l 4 ; x - v a r t ) t : E 1 A P U

0 . 0 0 0 . 0 3 0 . 0 6 0 . 0 9 0 . 1 2 0 . 1 5[s ]

- 1 . 2

- 0 . 8

- 0 . 4

0 . 0

0 . 4

0 . 8

1 . 2

66 June 2004

Voltage and Current for 24

Pulse Operation

( f i le 2 4 p 1 . p l 4 ; x - v a r t ) t : E 2 A P U

0 . 1 5 0 . 1 6 0 . 1 7 0 . 1 8 0 . 1 9 0 . 2 0[s ]

- 0 . 1 0 0

- 0 . 0 5 6

- 0 . 0 1 2

0 . 0 3 2

0 . 0 7 6

0 . 1 2 0

( f i le 2 4 p 1 . p l 4 ; x - v a r t ) c : IN V 0 2 A - E 2 2 A

0 . 1 5 0 . 1 6 0 . 1 7 0 . 1 8 0 . 1 9 0 . 2 0[s ]

- 9 0 0

- 6 0 0

- 3 0 0

0

3 0 0

6 0 0

9 0 0

[A ]



67 June 2004

Voltage Control

• Still have mostly indirect control

• Have the option of changing phase

shifts of the converters independently for fast response

» Phasor sum to have desired magnitude and

angle

» Hurts waveform quality, so need to still

change capacitor voltage

68 June 2004

PWM Switching Scheme

( f i le p w m v s i 2 . d a t .p l 4 ; x - v a r t ) t : C A R I E R t : IN D E X A

1 0 1 5 2 0 2 5 3 0 3 5 4 0

- 1 . 0

- 0 . 6

- 0 . 2

0. 2

0. 6

1. 0

*1 0 -3

( f i l e p w m v s i 2 . d a t . p l 4 ; x - v a r t ) v : I N V A

1 0 1 5 2 0 2 5 3 0 3 5 4 0

- 2 . 0

- 1 . 5

- 1 . 0

- 0 . 5

0.0

0.5

1.0

1.5

2.0

*1 0 -3

*1 0 5

(file pwmvsi2.dat.pl4; x-var t) c:INVA -V1A

10 20 30 40 50 60 70 80

-2.0

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5

*10-3

*105

Increase AC inductance

to smooth current

69 June 2004

Voltage Control

• Now can directly vary the ac voltage

magnitude by changing modulation ratio

• Very fast response is possible

• Drawbacks:

» Increased switching losses» Turn-off time in devices

V 1 =ù

2√

M aE dc

70 June 2004

Multilevel Converter

• Instead of two levels in line-to-line

voltages, add levels with extra switches

• Produces waveform similar to 12 pulse

• But now can vary the width of pulses to

vary magnitude

( f i l e 1 2 p 1 . p l 4 ; x - v a r t ) t : E 1 A P U

0 . 0 0 0 . 0 3 0 . 0 6 0 . 0 9 0 . 1 2 0 . 1 5[ s ]

- 1 . 2

- 0 . 8

- 0 . 4

0 .0

0 .4

0 .8

1 .2

71 June 2004

Implementing SSSC

Indirect Voltage Control

• Measure current through a PLL for synch

• Some use PLL on voltage too

• Measure Vq and calculate magnitude and

phase (plus or minus 90 deg)

• Error amplified on Vq (or Xc) to adjust

phase angle to change Vdc

72 June 2004

Direct Voltage Control

• Two options:

» PWM scheme

» Multilevel converter

• Use these for fast control of voltage

magnitude

• Still vary dc link voltage to “center” the

system for better response



73 June 2004

Outer Control

• The SSSC injects a series voltage into the

transmission line

» The voltage itself, is a means to an end• Voltage injection based on outer control

» Reactance control

» Current Control

» Commands from outer control loops as with

the TCSC

74 June 2004

Protection Circuitry

• Protection needs to be considered

• Overvoltage protection (on capacitor or

SSSC transformer), usually MOV withbypass switch

• Overcurrent protection (control settings

backed up by breakers)

• Control settings for protection--fast

• Interaction with other protection in system

75 June 2004

Example Case

• 12 and 24 pulse SSSC in single line case

• Observe effects of varying reactance

order for reactance control, or current

order for current control

76 June 2004

Example Case

• 12 and 24 pulse SSSC in single line case

• Observe effects of varying reactance

order for reactance control, or current

order for current control

• Space vector control used: command

quadrature axis voltage with a error from

a PI current regulator » Q axis from Park’s transformation

77 June 2004

Real Power Drawn by

SSSC

(file 12p1.pl4; x-var t) v:E1A -E1AT

0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20[s]

-100

-75

-50

-25

0

25

50

75

100

[MV]• Average power

drawn is zero

• Increase in

peak to peakchanges when

voltagecommanded to

increase

• Would see net

energy increase

too

78 June 2004

Current Control:

Current Order Changes

(file 12pssc.pl4; x-var t) t: I1QREF t: I1Q

0.00 0.05 0.10 0.15 0.20 0.25 0.30[s]

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5• Series of

commanded

changes

• Started with no

current

• Current reversal



79 June 2004

Current Control:

Phase A Current

• Note distortion

from 12 pulse

converter

• Note phase jump for the

current reversal

• SSSC initiallykeeping current

at zero(file 12pssc.pl4; x-var t) t: I1APU

0.00 0.05 0.10 0.15 0.20 0.25 0.30[s]

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5

80 June 2004

Current Control:Phase A Injected

Voltage and Reference

• Again, can

observe where

the current

reversal occurs• Notice that

voltage tracks

reference

produced bycurrent

regulator (file 12pssc.pl4; x-var t) t: V1REF t: E1APU

0.00 0.05 0.10 0.15 0.20 0.25 0.30[s]

-1.20

-0.68

-0.16

0.36

0.88

1.40

81 June 2004

Current Control:

DC Capacitor Voltage

• Notice change

in voltage for current reversal

• Transferring

real power to

and from thepower system to

change

capacitor

voltage. (file 12pssc.pl4; x-var t) t: VDCPU

0.00 0.05 0.10 0.15 0.20 0.25 0.30[s]

0.0

0.4

0.8

1.2

1.6

2.0

82 June 2004

Reactance Control:

Commanded Reactance

• Initially no

injection

• Operates ininductive and

capacitive mode

• Step change

inductive to

capacitive

(file 24psssc.pl4; x-var t) t: XQREF

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

83 June 2004

Reactance Control:

Injected Voltage

• Initially no

injection

• Magnitudechanges, with

commanded

reactance

• Vq= = -jXc*I

• Observe

reversal

• Increases whenmore capacitive

(file 24psssc.pl4; x-var t) t: E2APU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-0.700

-0.525

-0.350

-0.175

0.000

0.175

0.350

0.525

0.700

84 June 2004

Reactance Control:

DC Capacitor Voltage

• Notice dip when

reversing sign

of voltage

• Again,

increases with

the voltageinjection

(file 24psssc.pl4; x-var t) t: V DCPU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

0.0

0.2

0.4

0.6

0.8

1.0

1.2



85 June 2004

Reactance Control:

Line Current

• Decreases

when inductive

injections

• Increases withcapacitive

injection

(file 24psssc.pl4; x-var t) t: IAPU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-2.500

-1.875

-1.250

-0.625

0.000

0.625

1.250

1.875

2.500

86 June 2004

Generalized Unified Power

Flow Controller

• Similar to the

UPFC

• Now have series

injections in morethan one line

leaving the bus

• Can operatewithout shunt

compensator

• Control options

similar to UPFC

+

Vdc

Vser2

-

Vser1

87 June 2004

Simulation Case

• 24 pulse converters:

» Shunt converter

» 2 series converters

• 2 lines with equal impedances

• Shunt converter regulates the dc bus

• Change step changes in series injection in each line

88 June 2004

Vdc and Vdc reference

(file 24gupfc.pl4; x-var t) t: V1DREF t: VDCPU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

0.0

0.4

0.8

1.2

1.6

2.0

89 June 2004

Line Currents(as injections are increased)

(file 24gupfc.pl4; x-var t) t: IA2PU t: IAPU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-0.90

-0.56

-0.22

0.12

0.46

0.80

90 June 2004

Injected Voltages

(file 24gupfc.pl4; x-var t) t: V12APU t: V15APU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4



91 June 2004

Real Power at Converters(controllers not optimized)

(file 24gupfc.pl4; x-var t)factors:offsets:

10

t: PIN1PU10

t: PINVPU-10

t: PIN2PU-10

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

92 June 2004

Line Currents(vary injection angles)

(file 24gupfc1.pl4; x-var t) t: IAPU t: IA2PU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-1.8

-1.2

-0.6

0.0

0.6

1.2

93 June 2004

Injected Voltages(vary injection angles)

(file 24gupfc1.pl4; x-var t) t: V15APU t: V12APU

0.0 0.1 0.2 0.3 0.4 0.5 0.6[s]

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

94 June 2004

Real Power at Converters(vary injection angles)

(file 24gupfc1.pl4; x-var t) t: PIN2PU t: PINVPU

0.00 0.05 0.10 0.15 0.20 0.25 0.30[s]

-0.2

-0.1

0.0

0.1

0.2

0.3

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