Exhibition Report

2

1. Exhibition Outline 3

2. EDSFair2012 Overview 4

3. Opening Event 5

4. Exhibition Configuration 6

5. Floor Map 7

6. Exhibitors 8

7. Conferences／Seminars 10

8. Special Program 12

9. Number and Profile of Visitors 13

10. PR Activities 17

11. Official Website 18

Contents

3

■ Name

Electronic Design and Solution Fair 2012（EDSFair2012）

■ Concurrently held event Embedded Technology 2012

■ Date Wednesday, November 14, 2012 to Friday, November 16, 2012

■ Time Wednesday, November 14 : 10:00 a.m. to 5:00 p.m. Thursday, November 15 : 10:00 a.m. to 6:00 p.m. ( 5:00p.m. to 6:00 p.m. Happy Hour) Friday, November 16 : 10:00 a.m. to 5:00 p.m.

■ Place Pacifico Yokohama Exhibition Hall, Annex Hal l and Conference Center

■ Admission Registration required ○Visitor registration at the Gate : ¥1,000 ○Online pre-registration/Invitational registration at the Gate : Free

■ Organizer Japan Electronics and Information Technology Industries Association (JEITA)

■ Cooperation Electronic Design Automation Consortium (EDAC)

■ Support Ministry of Economy, Trade and Industry, United States Embassy of Japan Distributor’s Association of Foreign Semiconductors (DAFS), Yokohama City

■ Assistance Japan Embedded Systems Technology Association (JASA), Institute of Electronics, Information and Communication Engineers (IEICE), Information Processing Society of Japan (IPSJ), Japan Electronics Packaging and Circuits Association (JPCA)

■ Management Japan Electronics Show Association (JESA) 12F Ote Center Bldg., 1-1-3, Otemachi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: +81-3-6212-5231 FAX: +81-3-6212-5225

1. Exhibition Outline

4

The Japan Electronics and Information Technology Industries Association (JEITA) held the vital design solution technology exhibition, the “Electronic Design and Solution Fair 2012” (abbreviated to "EDS Fair" 2012), at the Yokohama Pacifico Convention Plaza (Pacifico Yokohama) for a three-day period between 14th and 16th November, 2012.

Now in its 13th year, this exhibition was jointly held with the "Embedded Technology Exhibition" (abbreviated to "ET") hosted by the Japan Embedded Systems Technology Association (JASA), based on an idea of fusing hardware, systems and software design to drive the future development of the Japanese electronics industry. At this comprehensive exhibition, where a variety of the best technologies and solutions ranging from hardware design to system and software design were gathered, 61 companies and organizations exhibited at 92 booths and 5,606 visitors attended over the three day period of the exhibition. *People who registered with ET and attended the EDS Fair are not included in the 5,606 visitor figure.

On 14th November, the first day of the exhibition, last year's well-received joint program session with ET was expanded to two sessions. The first session had a theme of "More anticipated than the consumption tax increase! Development and inspection of automotive software using a virtual ECU environment!". Automotive software developers from various automobile-related manufacturing companies were invited to take the podium to talk about development issues and solutions utilizing a virtual ECU environment. The theme at the other session was "Front line of the software development environment! Virtual software development provided by development solution providers ~ current status and development site demands and future prospects" where the current status and future prospects from the viewpoint of virtual environment providers was discussed. 219 people from both the EDS Fair and ET attended the sessions.

In addition, over the three days of the exhibition, there were exhibitor seminars where attendees could get a grasp of the latest technological trends. There were 53 sessions of these seminars, which attracted approximately 901 attendees. Further, at the specially prepared stage there was a lecture aimed at management class workers as well as designers entitled "Transgressing Fields is the Key to Individuals and Companies Surviving in Japanese Electronics" ; a lecture about how hardware designers evaluate specifications and perform optimization in order to differentiate between embedded devices using ESL (electronic system level); and the ever-popular annual "Designers' Problems" session was held to hear the voices of designers in the field. Additionally, the System Design Forum 2012 was held by the sponsor, the JEITA EDA Technical Committee. This forum delivered beneficial information to a wide variety of people from engineers, managers, and young technicians, and provided an opportunity to gain an understanding of leading-edge technical trends. Approximately 125 people attended this forum.

There were also special zones established in the venue with exhibitions covering the latest technology and topics of interest to engineers. For example, there was a special exhibition zone with exhibitions relating to LPB (LSI package board) codesign and "IBIS (I/O Buffer Information Specification) model that helps LPB co-validation in line with the tendency these days to design new semiconductor chips, packages and boards as a single unit. In addition, there was the "Emerging Vendor Area" with a collection of solutions by Japanese and foreign venture enterprises with whom users rarely come into contact. Lastly, there was the "University Plaza" special zone which provided an opportunity for university researchers to give presentations and deepen technical exchange between industry and academia.

Now in its 6th year, the "Emerging Vendor Guide Tour" introduced the latest technologies of emerging vendors, with whom users rarely come into contact, and supported a question and answer period.

During the period from 5 to 6 p.m. on 15th November, a "wine evening" was held in conjunction with the "ET festival". This was attended by many associates, providing an opportunity for exhibitors and visitors to establish closer relations.

2. EDSFair2012 Overview

5

■ Opening Ceremony

In advance of the EDS Fair 2012 and ET 2012, an opening ceremony was held on the 1st floor of Exhibition Hall B from 9.45 a.m. on the opening day of the exhibition, 14th November.

To begin the proceedings, Minoru Yanada, the Chairman of the Japan Embedded Systems Technology Association made an opening address on behalf of the ET sponsors. This was followed by an opening address made on behalf of the EDS Fair sponsors by Masao Fukuma, the Acting Chairman of the Semiconductor Section of the Japan Electronics and Information Technology Industries Association. Then EDS Fair 2012 and ET 2012 were opened by a tape-cutting ceremony performed by guests-of-honor, Mr. Kiyotaka Mitsuda, the Director of the Bureau of Economics, Yokohama City; Mr. Koichi Ishii, the Executive Coordinator of LE Tech Co., Ltd.; Masao Fukuma, the Acting Chairman of the Semiconductor Section of the Japan Electronics and Information Technology Industries Association; Mr. Hiroshi Imai, the Chairman of the EDS Fair 2012 Executive Committee; Minoru Yanada, the Chairman of the Japan Embedded Systems Technology Association; and Yuu Fujiki, the Vice Chairman of the Japan Embedded Systems Technology Association and ET Divisional Director.

3. Opening Event

6

■ Exhibits ●Hardware solutions： System LSI, ASIC/ASSP, MPU/MCU/DSP, FPGA/PLD and others

●Hardware development (EDA)： IC design tools：

System level design (higher than RTL), Logic design (RTL to net list), Logic verification, Analog design/verification, Physical implementation, Physical verification/analysis, Signal integrity analysis, Test (DFT/BIST/ATPG/others), DFM (OPC/RET/PSM/LRC/ TCAD/others), ASIC Prototyping and others

PCB/SIP design tools： Schematic capture, Analog design/verification, Layout, Signal Integrity/Power Integrity/EMC analysis, Electromagnetic field analysis, Thermal analysis and others

●Software solutions： Embedded OS, Device drivers, Firmware, Middleware, Virtual platform Development and others

●IC tester/analyzer ： IC testers, PCB testers, Analyzers and others

●IP core, Macro, Cell libraries

●Embedded processor development environments： Reconfigurable processors, ICE, Debuggers, Microcomputer CASE, Compilers/cross compliers, Simulators, Hardware/software co-design environments and others

●Design service-related (LSI/PCB)： Design houses, Design services, Design consulting, Prototyping/manufacturing, IP distribution services and others

●Design infrastructure (WS/PC, Network)

●Design data management tool： Design data management and others

●Mask shop, Foundry：

●University (R&D), Consortium：

●PR-related： Publications and others

■ Number and Profile of Exhibitors Exhibitors 61 companies・organizations／92 booths

4. Exhibition Configuration

7

Exhibits：Exhibition Hall D Conferences/Exhibitor Seminars：Conference Center 5F(503)/Annex Hall (F201) Meeting Rooms 1F, M2F (D11,DM3,DM6,)

5. Floor Map

8

*Joint participant company indented

■ Regular Area Aldec-Japan K.K. ANSYS Japan K.K. Apache Design Solutions K.K. Applistar Corporation ASTRON Inc. Atrenta KK Berkeley Design Automation, Inc. Blue Pearl Software,Inc Carbon Design Systems Japan K.K. CM Engineering Co., Ltd Cybernet Systems Co., Ltd. FORTE DESIGN SYSTEMS IBIS Quality Framework （JEITA EC CENTER

EDA Standard WG) INNOTECH CORPORATION Cosmic Circuits Pvt Ltd Duolog Technologies Ltd. KERNELON SILICON Incorporated MoDeCH Incorporated SKILLCAD INC. Target Compiler Technologies N.V.

IVIS Co., Ltd. KANEMATSU ELECTRONICS LTD. Keirex Technology Inc. Qchips Co.,LTD. Mathematical Systems Inc. MathWorks Japan MENTOR GRAPHICS JAPAN CO., LTD. MunEDA GmbH Nihon EVE K.K. Nihon Real Intent, K.K. Nihon Synopsys G.K. ProPlus Design Solutions KK Pulsic Japan Limited SPRINGSOFT K.K. STAY SHIFT Co.,LTD Synkom Co.,Ltd. Jasper Design Automation Tanner Research Japan K.K. TOOL CORPORATION TowerJazz Japan.Ltd.

■ Emerging Company Area ADVANTEST CORPORATION CircuitSutra Technologies Pvt Ltd DOCEA POWER Japan Circuit Co.,Ltd. S2C Inc.

Magillem Design Services OneSpin Solutions SciencePark Corporation SIMPLIFY DESIGN AUTOMATION, INC. WINdWARD Corporation

■ University Plaza Hiroshima University The University of Aizu, Saito Laboratory

6.Exhibitors

9

■ Special Exhibit / LPB Zone, IBIS ZoneLPB Zone Gem Design Technologies, Inc. Giga Hertz Technology Inc. JEITA : LSI Package Board Interoerable Design Process Working Group Nagata Lab, Graduate School of System Informatics, Kobe University Nimbic, Inc. Oscillated Recall Technology, Inc. ZUKEN Inc.

IBIS Zone ATE Service Corporation MODeCH Inc.

10

■ EDSFair×ET Special Collaborating Session 11.14[wed] 13:00-14:20 Conference Center 5F[503]

Number of Audience

219

Automotive Session Time's up! Speed up your development and verification of automotive SW using virtual ECU! - Current status, challenges and solutions - Speakers Mr.Yoshihiro Miyazaki Hitachi Automotive Systems, Ltd. Executive Chief Engineer, R&D Div. Mr. Satoshi Shimada Honda R&D Co., Ltd. Automobile R&D Center DevelopmentTechnology Promotion Department, Development Administration Division Mr.Tetsuya Ozawa Calsonic Kansei Corp. Electronics Components Design Group, Electronics Business Unit Mr. Hirotoshi Tonou FUJITSU TEN LIMITED AE Engineering Group, Quality Audit Dept. Moderator Shigeru Oho, PhD Nippon Institute of Technology Electrical and Electronic Engineering

11.14[wed] 14:30-16:00 Conference Center 5F[503]

Virtual Software Development Environment Session The cutting edge of software development! Virtual environments for SW development offered by development solution providers - Current status, demands from SW designers and future prospects - Speakers Mr. Junji Nakano Nihon Synopsys G.K., FAE Manager, System-Level Solutions Mr. Takahiro Takahashi Wind River KK Senior engineer,Simics,Engineering Solutions,Field Engineering Group Mr.Yoji Iwai GAIO TECHNOLOGY CO.,LTD. Chief Operating Officer Mr.Kiyoshi Makino MENTOR GRAPHICS JAPAN CO., LTD. Business Development Manager,Design Creation and Synthesis Division Moderator Mr. Shun-ichi Nakayama CQ Publishing Co., Ltd. Executive Director, Crossmedia Dept.

7. Conferences／Seminars

11

■ Special Stage／System Design Forum 2012

Venue: F201 Annex Hall Fee: Free Audience: Special Stage: 129 total in 3 sessions／System Design Forum: 125

At the Session to be held on November 14th (Weds.), lectures provided on the conditions that are needed to survive in the future Japanese electronics market, using big data cloud information processing systems (IT finance) as an example. On November 15th (Thurs.), the value and effect produced by ESL was reviewed and discussions held on achieving true product differentiation. At the November 16th (Fri.) Session, electronic system designers exchanged opinions on and debate the various problems they encounter in design work.

■ Exhibitor Seminars

Venue: Meeting rooms D11・DM3・DM6, Exhibition Hall

Fee: Free

EDSFair2012 hosted exhibitor seminars for concentrated PR activities targeting limited number of 50 customers per 45-minute session. The Conference hosted 53 sessions in 3 rooms with 7 tracks by categories.

Track Session

EE ESL track 11

ED DFT/Functional verification/Design service track 11

EA AMS design・verification /PCB/SIP track 13

EL Low Power/IP/DFM track 6

EP Logic design＆Physical design／verification track 9

EG FPGA track 1

EF Free track 2

Number of total Audiences 53

12

■ Special Zone [Special Exhibition LPB Zone / IBIS Zone] Participating companies held exhibitions and presentations over a 3 day period about the current status of LPB, EDA solutions, and IBIS production and application methods.

[Emerging Company Area] 7 Japanese and overseas venture companies brought together the latest information on solutions for speedy uptake by designers and developers at an exhibition booth.

[University Plaza] EDSFair offers an opportunity for university research institutes to present the results of their research projects and to demonstrate achievements in R&D related to design technologies conducted at university institutions while promoting increased collaboration between business and academia. In EDSFair2012, 2 universities presented demonstrations of achievements in R&D related to design technologies conducted at university institutions.

■ Emrging Company Guided Tour The expert tour guides at design technology and EDA introduced participant companies’ key technologies in Japanese at the main stage then visited their booth to support their presentation and questions and answers.

Tour Schedule

Nov. 15 [Thursday] 1st: 13:00-14:00 Nov. 16 [Friday.] 2nd: 13:00-14:00 CircuitSutra Technologies Pvt Ltd DOCEA POWER SciencePark Corporation Magillem Design Services

WINdWARD Corporation STAY SHIFT Co.,LTD Synkom Co.,Ltd.

Tour Guide

Mr. Takashi Hasegawa General Manager SoC Solutions Division IP & Technology Development Unit Fujitsu Semiconductor Limited

Mr. Fumihiro Minami Senior Manager System LSI Design Technlogy Grop R & D Department-2 Semiconductor Technology Academic Research Center

■ EDSFair Happy Hour

This year again, “EDSFair Happy Hour” was held on Thursday, November 15 from 17:00 to 18:00. A number of visitors and exhibitors attended this event and made use of this time as a place to have even deeper communication each other once a year.

8. Special Program

13

■ EDSFair2012 Number of Visitors

Nov.14 Nov.15 Nov.16 Total

EDSFair Visitors 1,322 2,167 2,117 5,606

ET Visitors 【FYR:Concurrently held event】 6,691 8,118 8,004 22,813

Total 8,013 10,285 10,121 28,419

(excluded visitors registered in ET and visited EDSFair)

■ Visitors’ Data Type of Business

Breakdown of classification Semiconductor and Electronic Component Manufacturer 41.4%

9. Number and Profile of Visitors

14

Equipment Manufacturer 28.1%

Design and Related Service 10.5%

Tool Vender 8.7%

Trading Company/Sales 4.2%

15

Details of Speciality

Purpose of Visit（multiple answers）

16

2012 2011.11 2011.1

10’s 0.2% 0.1% 0.1%

20’s 10.2% 9.4% 10.0%

30 s 26.0% 27.9% 27.9%

40’s 37.3% 36.7% 36.7%

Over 50’s 26.3% 25.9% 25.3%

Frequency of Visit 2012 2011.11 2011.1

First time 23.1% 28.5% 30.9%

Second times 12.5% 11.6% 13.5%

3-5 times 31.6% 30.6% 30.5%

Over 6 times 32.8% 29.3% 25.1%

Authority of Product introduction

Recogination of event

2012 2011.11 2011.1

I have decision-making authority on product purchasing.

9.2% 8.1% 9.9%

My opinions influence purchasing

51.6% 52.2% 50.4%

I am not involved in purchasing.

39.2% 39.7 39.7%

2012 2011.11 2011.1

DM（EDSFair Leaflet） 13.4% 14.0% 14.7%

E-mail from Exhibitor 22.8% 26.8% 26.2%

E-mail from the EDSFair Management Office 22.3% 19.6% 16.5%

Link from exhibitor’s Website 6.3% 6.5% 6.9%

Link from ET Website 3.5% 3.4% -

Newspaper/Magazine 1.8% 1.8% 3.6%

Link from Search site 11.9% 10.6% 12.6%

Other 18.0% 17.3% 19.5%

17

■ PR Activities Press Releases

EDSFair2012 （Nov.14～16）

* Dissemination of release for Jointly holding the EDSFair with ET (3/14) * Dissemination of release inviting press

coverage and Opening announcement (11/12) * Press room set up （11/14～16） * Release of event closing report （11/16）

Number of Press

EDSFair2012 EDSFair2011 Nov. EDSFair2011 Jan.

97 110 35

E-mailings

Official News sent to those in our past visitor database and this year's pre-registrants.

Vol. Date Number of recipient

Vol.1 9/13 8,933

Vol.2 10/ 5 8,952

Vol.3 10/12 8,364

Vol.4 10/16 8,979

Vol.5 10/19 8,986

Vol.6 10/ 23 8,994

Vol.7 10/ 26 9,012

Vol.8 10/ 30 9,020

Vol. Date Number of recipient

Vol.9 11/2 9,051

Vol.10 11/6 9,100

Vol.11 11/9 9,155

Vol.12 11/13 9,198

Vol.13 11/14 9,247

Vol.14 11/20 9,268

Vol.15 11/29 9,263

Creation of PR Tools (printed literature)

・PR leaflet/Invitation/Envelope (Japanese) ・Floor Map (Japanese)

10. PR Activities

18

■ URL Official Website

http://www.efair.com Browse：30,380

Number of unique users: 17,997 Page Views：132,522

Online Members Site https://regist.jesa.or.jp/edsfair-regist/index.php Pre-registration：Sep.12th～Nov.16th

Registered members：18,150 members *included registered members in the past

11. Official Website

19

Organizer Japan Electronics and Information Technology Industries Association (JEITA)

5F Ote Center Bldg. , 1-1-3, Otemachi , Chiyoda-ku, Tokyo 100-0004, Japan http://www.jeita.or.jp

Management/Contact

Japan Electronics Show Association (JESA) 12F Ote Center Bldg. , 1-1-3, Otemachi , Chiyoda-ku, Tokyo 100-0004, Japan

TEL: +81-3-6212-5231 FAX: +81-3-6212 E-mail: info2012@edsfair.com