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The Evolution of Mobile Technology Series

Part 3:The Evolution of Mobile Processing

ArchitecturesJune 24, 2009

Moderated by Jim McGregor Chief Technology StrategistIn-Stat

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IntroductionWelcome to the Evolution of Mobile Technology webinar series featuring:

• Designing of High-Performance and All-Day Battery life (Completed: Download replay now)

• Design Challenges of Supporting Multiple Connectivity Technologies Architectures (Completed: Download replay now)

• The Evolution of Mobile Processing Architectures• Creating Flexible Designs for Future Features and Applications• The Impact of the Cloud on Mobile Devices• The Future of Wireless Technologies

Today’s host:• Jim McGregor, Chief Technology Strategist, In-Stat

Agenda• 5-minute overview • 40-minute discussion by panelists • 15-minute live Q&A

Archive of webinar available at:• www.ti.com/wirelesspresenations• www.instat.com

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PanelistsBrian Carlson• OMAP Platform Marketing Manager, TI’s OMAP Platform Business

• Responsible for definition and management of future mobile application platforms • Serves on Mobile Industry Processor Interface Alliance Board of Directors• 25 years in technology marketing, business development, and engineering

in DSP, communications, and multimedia applications• Experience at DNA Enterprises, E-Systems, Hyperception, and LSI Logic • Recognized by TI as Member of Group Technical Staff

John Goodacre• Director of program management for ARM’s processor division

• Responsible for application processor’s technology roadmap including definition and market development of the ARM MPCore processor technology

• More than 20 years experience of realizing new technologies in the engineering industry

• Previously worked for Microsoft specializing in enterprise software

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Overview

• The Increasing requirements & options for mobile performance (Jim McGregor)

• Mobile processor technology trends (Brian Carlson)

• Leveraging symmetric multiprocessing in mobile devices (John Goodacre)

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Recap

Future of Mobility• Communications

– Voice– Messaging– Social Networking– Navigation

• Entertainment– Audio– Video– Gaming– Internet

• Computing– Content creation &

manipulation– Productivity Apps

Performance is Inherent• Improvements

– Communication speeds– Display resolution– Graphics– Storage capacity– Applications Processing

• Additional Features– Touch screens– Wi-Fi connectivity– Motion control– Enhanced I/O

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Increased performance requirements

Improvements

• Applications– HD media content – 3D graphics– Content creation &

manipulation– Interactive web– Computing

• Communication Link– Advanced signals &

algorithms – Increased data rates– Multiple streams

• I/O– Increased display

resolution– Increased interfaces &

bandwidth

0

20

40

60

80

100

120

% In

crea

seEV-DO HSPA+ LTE 802.11b 802.11g 802.11n

Source: In-Stat, 6/09

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Mobile processor technologies• Processor cores• DSP cores• GPUs• Memory• Dedicated Functional IP

– Audio– Video– I/O– Accelerators– RF

Processing Core(s)

DPSCore(s)

BasebandProcessing

Memory

Graphics

Audio &Video

RF DedicatedAccelerators

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Multiple chip options

Monolithic die

Multi-Chip Module (MCM)

System in Package (SiP)

Multiple chipsMicro-processor

GPU/Chipset

Accelerator

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Decision factors

Market Considerations

• Time-to-Market• Differentiation• Cost

Design Considerations

• Solutions– Space– Power/Battery Life– Thermal Limits– Features– Performance

• Product– Support– Tools– Software– Roadmaps– Scalability/Reusability

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Multiple mobile platforms

-

500

1,000

1,500

2,000

2,500

3,000

Mill

ion

of U

nits

2007 2008 2009 2010 2011 2012 2013

Edutainment ToysHandheld GamesPersonal Navigation DevicePersonal Media PlayerCellphoneSmartphoneMini-notebook PCNotebook PCUMPCMID

Source: In-Stat, 6/09

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Mobile Processor Technology Trends

Brian CarlsonPlatform Marketing Manager, TI’s OMAP Platform Business Unit

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Mobile processor trends• The platforms for future applications growth

– paradigm shift from PC to mobile devices with higher volumes– new experiences enabled by mobility and “greater than the sum of parts”

• Highly-integrated SoCs becoming even more integrated and leveraging multicore technology aggressively for higher performance– with low-power design being paramount

• Dramatic increase in processing performance and ubiquity of 3G data networks enable new applications and use cases– always connected with laptop-like performance, HD multimedia, sensors…

• Expanded market beyond smartphones and into consumer electronics and into mobile computing– leverage platform investment across multiple markets

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Evolution of mobile processorsImprovement2011-122009-102007-8Technology

45 nm / beyond

64-128 GB

1-2GB

140+ hrs

16-20 MP

20+ Mtri/sOpenGL ES 2.0

1080p-30fps

WUXGA + HDMI

Dual Cortex-A95,000+ DMIPS

Process

Mass Storage

DDR Memory

Audio

Imaging

3D Graphics

Video

Ext. Display

ARM® Processor

65/45 nm

16-32 GB

256-512 MB

40 hrs

8-12 MP

10+ Mtri/sOpenGL ES 2.0

720p-30fps

XGA

Cortex-A81,200-2,000 DMIPS

90 nm

8-16 GB

128-256 MB

15 hrs

3-5 MP

2 Mtri/sOpenGL ES 1.1

VGA-30fps

VGA

ARM11470-700 DMIPS

10x

3+ nodes

8x

8x

7x

10x + Pgm. shaders

7x

8x + HDMI

10x +SMP

Notes: 1. Dates shown are approximate mobile handset availability dates.2. Features are capabilities of high-end mobile devices in timeframes; not necessarily specific product specifications.

~10x improvement over a four year period!

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Mobile processor architectures• Architecture and integration of a mobile processor are

driven by primary factors related to market and end-productPerformance

Power

CostSize

Low-power, highly-integrated SoC required to meet battery

life, cost and form factor

• There are also manufacturer preferences– Thin modem -vs- fat modem; RF integration; system components

• Typically lower-tier products offer higher integration, but with less processing performance to reduce cost

• Standalone applications processors dominant in higher-tier for highest performance and choice of separate modem/RF – Don’t lock modem and application processing technologies to same

development schedule – different innovation cycles– Combine best-in-class of each technology

AP

DBB

RF

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Modem integration• TI is focused on offering the best system solution

combining modems from multiple vendors with our industry-leading OMAP™ mobile applications processors– Stacked die in one package (e.g., ST-E U380…)

• Enabled by TI OMAP innovative die-to-die / chip-to-chip interfaces– Competitive side-by-side system solutions– Supported by multiple mobile operating systems – TI differentiator

• This approach broadens our engagements and allows us to meet wide variety of customer needs– Custom joint solutions – major OEMS / modem partners– Customer preferences for certain modem vendors– Integration with wide variety of module vendors– Multi-standard support

• HSPA+, CDMA EV-DO, TD-SCDMA, LTE, WiMAX…

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Future mobile processor challenges• Need for higher CPU performance to provide

enhanced mobile computing user experience– Faster boot, applications and responsiveness– New use cases and features that will transform mobile

devices and innovate into new products• Ability to create and play growing HD multimedia

content– 1080p-30 video and beyond– 3D stereoscopic, multi-megapixel images and MV video – Console-quality graphics for advanced user interfaces

and games– Output on multiple HD displays (internal/external)

• Ability to handle multiple, high-speed data streams simultaneously– 4G modem, USB 3.0, MIPI® Alliance M-PHY interfaces

And doing all this within a mobile power budget of a few hundred milliwatts !

Multiple, high-speed streams

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Multicore approach is needed• Unicore performance has hit wall as process migration no

longer provides huge increase, delivering higher IPC is expensive and using overdrive voltage increases power exponentially– Symmetric Multi-Processing (SMP) enables multiple

processor cores to work together to provide scalable performance on demand

• Application-specific cores are more efficient and required to meet the high-performance and quality-of-service needs moving forward

• Multicore provides ability to turn cores on/off as needed as low power is critical for mobile devices – Inactive cores burn power if they are just in standby

A multicore approach with SMP cores for general-purpose processing combined with application-specific cores meets mobile processor performance/power needs.

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Value of application-specific core • Video is a good example of how an application-specific

core meets mobile performance/power constraints• Video implementation evolution over three generations of

mobile processors– DSP → DSP + hardware acceleration → Dedicated video core

• ~300 MHz DSP supports H.264 BL D1 @ 30fps – Same size/frequency video core can do 1080p @ 30fps

0.0x0.5x1.0xFlexibility0.5x0.8x1.0xPower6.0x2.0x1.0xPerformance0.5x1.2x1.0xArea

Video CoreDSP+HWADSP only

Ref: “Media Processor Architecture for Video and Imaging on Camera Phones” – ICASSP-2008, Meehan, et al.

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TI OMAP™ mobile processor evolution• Breakthrough computing and

multimedia performance

• Extending multicore with SMP

• Headroom and flexibility to address tomorrow’s applications

• Aggressive power management for extended battery life

www.ti.com/omap4_platform

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Multicore mobile processorOMAP™ 4 Platform

App-specificMulticore

Dual-coreSMP

Optimal mix of multiple cores working together for best performance/power

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Summary

Multicore technology is critical for mobile processors to meet demanding performance and low-power requirements

SMP is next step in mobile processor CPU evolution – enabling scalable power and performance on demand

Application-specific cores provide performance, quality-of-service and power-efficient offload of the main CPU

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Leveraging symmetric multiprocessing in mobile devicesJohn GoodacreDirector, Program ManagementARM Processor Division

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SMP benefits for mobile devices

• Multicore solutions provide flexibility to meet processing demands

• SMP addresses mobile performance and power challenges

• Combination of multicore technologies is foundation for future processing needs

• Scalability with multiple cores to deliver right mix of performance/power

• Ability to adjust dynamically to use case• Leverage platform to scale across tiers of

products and into the future • smartphone → MID → mobile consumer

→ smartbook products• Solid foundation for supporting future

applications that is transparent to software

Benefits

Advanced Processing

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Symmetric Multi Processing (SMP)

Operating System

Task TaskTask TaskTask TaskTask TaskTask TaskTask Task

CPU CPU CPU CPU

MPCore processor

Shared MemoryShared Memory

HomogeneousHomogeneous

Tightly coupledTightly coupled

SymmetricSymmetric

Cache coherentCache coherent

ScalableScalable

SMP is a load-distribution software architecture that determines the roles of CPU cores dynamically

SMP is a load-distribution software architecture that determines the roles of CPU cores dynamically

FlexibleFlexible

Easy to programEasy to program

AbstractedAbstracted

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Mass adoption of SMP capabilities

Large ecosystem of SMP aware OSs and RTOSs

Vendor OS SMPWindRiver VxWorks 6.6 SMP YeSol eT-kernel Multicore Edition YExpress Logic ThreadX YQNX Neutrino RTOS YGreen Hills INTEGRITY 10 YMontavista MobiLinux 5.0 Ykernel.org Linux 2.6+ YSymbian Symbian OS 9+ YMicrosoft WinCE (*)Mentor Graphics Nucleus PLUS RTOS (*)Solaris Open Solaris Yetc etc (*)

(*) Contact vendor for further detailsVendors are at different stages of ARM MPCore support

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The SMP Operating System automatically time-slices tasks across available CPUsThe SMP Operating System automatically time-slices tasks across available CPUs

No software changes requiredNo software changes required

Full backwards and forwards compatibility

Full backwards and forwards compatibility

Rich and complete catalogue of applications available

Rich and complete catalogue of applications available

Concurrency within today’s software

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Browsers are good candidates for SMP

• SMP browsing:– Improved UI

responsiveness– Faster rendering of

complex pages– Ability to lower

power consumption– Available today

SMP vs 1CPU (affinity applied to CPU0 for key apps)

100% utilizationwhen running on single CPU

SMP load balancingacross dualcore

Windows Internet Explorer

MAC OS SafariLinux Firefox

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Creating explicit parallelismANALYSEAnalyse the UP application/problem to find parallelisable areas

DECOMPOSEDecompose problems into independent tasks for parallel execution:

• Task Decomposition• Functional Block Partitioning• Data Decomposition

PARALLELISEParallelise using threading industry standard APIs, libraries and models such as POSIX Threads and OpenMP

• Required if single application needs more performance than a single CPU

– The single thread performance– Cortex-A9 has the highest single

thread performance of any embedded processor

• A workload well balanced across multiple CPU can operate at lower voltages therefore consume less energy for the required performance

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SMP programming resources

Vast amount of technical resources available

431 hits for books on pthreads !

Great number of freely available SMP programming tutorials

SMP supported by all main OS/RTOSsWide spread industry

standards support for SMP programming

Great number of resources on MP and parallelism

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Performance scalability• Must understand

memory system to understand if multicore will scale with number of CPU

• If DDR can only satisfy a single CPU, then a memory bound application will not scale with multicore

• Applications which are cache bound scale linear with ARM MPCore technology

• Multicore performance gain is related to cache miss rate and DDR performance

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CoreMarks: Absolute performance

EEMBC CoreMark™ at device speed

Today’s Cortex-A8 provides comparable performance to Intel AtomFirst Generation Cortex-A9 devices will provide comparable performance to dual-core AtomsHigh-speed implementation of Cortex-A9 can provide desktop level performance

Today’s Cortex-A8 provides comparable performance to Intel AtomFirst Generation Cortex-A9 devices will provide comparable performance to dual-core AtomsHigh-speed implementation of Cortex-A9 can provide desktop level performance

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ARM MPCore for low power operation

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Summary: Benefits of MPCore solutionsPERFORMANCE ARM11 MPCore: 650 DMIPS 2600 DMIPS

Cortex-A9 MPCore: 2000 DMIPS 8000 DMIPS

LOWER POWER Less power consumption than UP per equivalent performance throughputMore CPUs at lower frequency with ability of individual power-off

PORTABILITY

FLEXIBILITY

Flexible, ready-available, support existing software, with programming models to suite application requirementsIsolate real-time requirements from high-performance application deployment through advanced configurations

SCALABILITY Add/enable additional CPUs for on demand performance increaseScalable system expansion to leverage next-generation system requirements

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Summary• Mobile processor requirements are scaling exponentially

– Applications (HD media content, creation & manipulation)– Features (HD & multi-display options)– Higher bandwidth & multiple data streams– Usage models (multiple applications, entertainment, device

consolidation) • Technology creates diversity

– There are many ways to increase performance– Market & design considerations must be considered

• Multicore solutions are required– To meet current and future performance levels & power limitations– Heterogeneous for increased performance & efficiency– SMP required for improved core performance & parallelism

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Q & A

• To participate, click on the Ask a Question link on the left side of the interface; enter your question in the box on the screen; hit “Submit.” We’ll answer them during the Q&A session or after the webcast.

www.ti.com/wirelesspresentationscommunity.ti.com/blogs/mobilemomentum

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Contact information

Jim McGregorChief Technology StrategistIn-Statjim.mcgregor@reedbusiness.com

Brian Carlson Platform Marketing Manager, OMAP Platform Business UnitTexas Instrumentsbcarlson@ti.com

John Goodacre Director of Program Management, ARM’s processor divisionARMJohn.Goodacre@arm.com