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(12)(43) Date of publication:05.11.1997 Bulletin 1997/45(21) Application number: 96106810.3(22) Date of filing: 30.04.1996

Europaisches Patentamt | | | | | 11| | | | | | | | || | | | | | | | | | | | | |European Patent OfficeOffice europeen des brevets (11) E P 0 8 0 5 4 5 8 A 1

EUROPEAN PATENT APPL ICA TIO Nation: (51 ) |nt. CI.6: G1 1 C 29 /00

(84) Designated Contracting States: (72) Inventor: Sundermann, JensDEFRGB 71032 Boblingen (DE)(71) Applicant: (74) Representative: Kurz, PeterHewlett-Packard Company Hewlett-Packard GmbH,Palo Alto, California 94304 (US) Europ. Patent- und Lizenzabteilung,Herrenberger Strasse 130

71034 Boblingen (DE)(54) An electronic circuit or board tester with compressed data-sequences(57) This invention relates to electronic circuit test-ing and more particularly to an apparatus utilizing datacompression techniques. An electronic circuit or boardtester according to the invention comprises one testercircuit with the combination of a sequencer and a vec-tor-sequencer-memory per pin. A data-sequence, such

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as a loop to address the memory cells of an electronicmemory one after the other in a predetermined chroni-cal order, is applied to a pin of a device under test andis compressed in order to save memory space.

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FIG.1