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PICREF-1
1997 Microchip Technology Inc. page 1
PICREF-1 SCHEMATICS
The UPS may be split into 4 main circuits: Input PowerFactor Correction, Battery Boost, Free-Running Chop-per, and Inverter. The UPS is an on-line device whichnormally will have the Power Factor Correction circuitfeeding the Chopper, which then feeds the Inverter. Ifthe input power should be lost, the Power Factor Cor-rection circuit falls out of the power flow and the BatteryBoost circuit automatically provides power to the Chop-per.
The Inverter is driven by the Inverter Drive circuitry,which in turn is controlled by the Inverter Control cir-cuitry containing the microcontroller.
UPS circuit board (PCB) power flow is shown inFigure 1.
UPS System Overview
In the Battery Boost circuit, the transistor pairs are con-nected in parallel for the purpose of handling high cur-rents. The current transformer T2 is connected asshown to sense each pair’s current with just one trans-former, i.e., to prevent it from saturating.
The control for the 120V/240V relay (power switch) wasnot implemented. Wherever input power monitoringwould take place, monitoring for 120 or 240V wouldalso occur and switch the relay. These functions wouldbe placed before the PFC circuit.
Power Factor Correction
The Power Factor Correction circuit is provisional, sothe parts listed are generic parts.
FIGURE 1: PCB POWER FLOW
Battery Boost PCB
Power FactorCorrection PCB
Free-Running Chopper PCB
Inverter Drive Card
Inverter Control CardFromBattery
FromInput Filter
PIC17C43, Hardware Protection
H-Bridge (Inverter)
IGBT Drivers
ToOutput Filter
Power Flow
ControlOther Circuitry
PCB
PICREF-1
page 2 1997 Microchip Technology Inc.
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 1 OF 3
AC
_IN
_HI
AC
_IN
_LO
Inpu
t Filt
er /
Prot
ectio
nPo
wer
Fac
tor
Cor
rect
ion
DC
_BU
S_O
UT
(+)
DC
_BU
S_O
UT
(-)
Tra
nsis
tor
Pai
r A
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
Tra
nsis
tor
Pai
r B
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE BB
_I_F
DB
K1
BB
_I_F
DB
K2
B_G
ND
BA
TT
ER
Y(+
)BU
S
I_G
ND
PW
R_A
C_I
N_H
I
PW
R_A
C_I
N_L
O
I_G
ND
Bat
tery
Boo
st C
ircu
it
380V
dc B
us+
DC
_BU
SS
I_G
ND
Q1
Q2
T2
T1
D1
D2
D3
L1
C1
C4
C5
R4
IRF
P26
4IR
FP
264
Q3
Q4
IRF
P26
4IR
FP
264
ZZ
3450
ZZ
3449
500u
HD
ES
I 30-
12A
DE
SI 3
0-12
A
DE
SI 3
0-12
A
1uF
600V
1uF
600V
6100
uF35
0V
100k
2W R5
100k
2W
C6
6100
uF35
0V
PICREF-1
1997 Microchip Technology Inc. page 3
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 2 OF 3
CH
_I_F
DB
K1
CH
_I_F
DB
K2
Q5_
DR
IVE
_RE
T
Q5_
DR
IVE
Q7_
DR
IVE
_RE
T
Q7_
DR
IVE
Q6_
DR
IVE
_RE
T
Q6_
DR
IVE
Q8_
DR
IVE
_RE
T
Q8_
DR
IVE
Free
-Run
ning
Cho
pper
Cir
cuit
CH
_GN
DC
H_G
ND
I_G
ND
+D
C_B
US
S
O_G
ND
X1
X2
I_G
ND
120_
OR
_240
240V
ac o
r 12
0Vac
Pow
er S
wit
ch
Rec
tifi
er C
ircu
it
RE
CT
_WA
V
O_G
ND
T5
T4
Q5
Q6
Q7
Q8
T6
RY
L1
RY
L2
D9
D10
L4
C9
C10
R6
ZZ
9454
ZZ
9454
2N67
702N
6770
2N67
702N
6770
DE
SI 6
0-12
A
DE
SI 6
0-12
A72
5uH
1uF
600V
250u
F35
0V10
0k2W
ZZ
3455
R7
100k
2W
C11
250u
F35
0V
PICREF-1
page 4 1997 Microchip Technology Inc.
FIGURE 2: UPS SYSTEM OVERVIEW - PAGE 3 OF 3
RE
CT
_WA
V
Q11
_C
Q11
_G
Q11
_E
Q10
_C
Q10
_G
Q10
_E
Q12
_C
Q12
_G
Q12
_E
Q9_
C
Q9_
G
Q9_
E
O_G
ND
IGB
T H
-Bri
dge
AC
_OU
T_H
I
AC
_OU
T_L
O
OU
T_I
FD
BK
1
OU
T_I
FD
BK
2
Out
put F
ilte
ring
Q9
Q10
Q11
Q12
C12
C13
C14
C15
C16
C17
R8
L5T
7
0.58
uF0.
58uF
300u
H
L630
0uH
L750
uHZ
Z34
59
10uF
600V
10uF
600V
10uF
600V
10uF
600V
5.6
PICREF-1
1997 Microchip Technology Inc. page 5
FIGURE 3: POWER FACTOR CORRECTION (PFC) – PAGE 1 OF 2
I(S
EN
SE
)
MU
LT
R(T
)
I(S
IN)
RA
MP
C
C(T
)
SIG
_GP
WR
_G
EA
0
INV
OV
P
OU
T
VR
EF
SH
UT
CLK
Vcc
1 2
3 4 5
6 78
910
11
12
13
14
1516
D1
D2
D3
D4
D5
DE
SI6
0-06
A
L150
0µH
R1
375k
R2
375k
C2
1µF
C3
0.47
µF
Vcc
P_G
ND
R3
25.9
8kR
45.
1kR
529
.3k
C1
0.01
µFR
610
kR
71k
P_G
ND
C5
0.47
µFC
61µ
F
INV
OV
P
C4
1µF
R8
12k
R10
10k
R9
4.7k
Q5
2N22
22A
D6
DE
SI6
0-06
A
DC
BU
S O
UT
(+)
(T
o pa
ge 2
)
L1 O
UT
(T
o pa
ge 2
)
P_G
ND
VR
EF
I SE
NS
E (
To
page
2)
U1
UC
3854
Uni
trod
e
(To
page
2)
(To
page
2)
(To
page
2)
P_G
ND
MD
A40
08
MD
A40
08
MD
A40
08
MD
A40
08
PW
R_A
C_I
N_H
I
PW
R_A
C_I
N_L
O
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
PICREF-1
page 6 1997 Microchip Technology Inc.
FIGURE 3: PFC – PAGE 2 OF 2
VD
DV
DD
GN
DG
ND
P_G
ND
INO
UT
OU
T
U2
TS
C42
9CP
A
C7
1µF
C8
0.47
µF
Vcc
P_G
ND
VR
EF
R12
100
R11
20k
I SE
NS
E
D7
1N41
50-1
T1R
1324
Q1
L1 O
UT
R14
24
Q2
R15
24
Q3
R16
24
Q4
R19
180k
R18
180k
P_G
ND
R17
4.87
kR
224.
56k
INV
OV
P
DC
_BU
S_O
UT(-
)
R21
180k
R20
180k
R24
100k
R23
100k
C9
6100
µF
C10
6100
µF
C11
1µF
DC
_BU
S_O
UT(+
)
500:
1
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
P_G
ND
DC
BU
S O
UT
(+)
(Fro
m p
age
1)
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
PICREF-1
1997 Microchip Technology Inc. page 7
FIGURE 4: BATTERY BOOST (BB) CONTROL CARD – PAGE 1 OF 3
INV
E/A
OU
T
Rt
CLK
/LE
B
Ct
RA
MP
SS
OU
T A
OU
T B
Vcc
1 311
6 75
1214
15
4
C6
0.47
µF
Vcc
R20
100
Q1
2N22
22A
U5
UC
3825
AN
I Lim
GN
D
PG
ND
Vc
VR
EF
NL
1µF
1316
2
89
10
C11
470p
FC
1268
0pF
C5
B_G
ND
3 5
2 4
U4a
4049
U4b
4049
R9
2.67
kB
_GN
D
2700
pFC
8
BB
_SY
N1
C10
100p
F
R11
6.8k
BA
TT
ER
Y(+
)BU
S
R10
24
B_G
ND
B_G
ND
C9
0.01
µF
10k
R21
2 31
LM13
9U
6a
- +
4 11
Vcc
C16
10nF
0.1µ
FC
15
B_G
ND
B_G
ND
R22
10k
C17
10nF
69.8
kR
23
VR
EF
LOW
_BA
T
C19
100p
F
B_G
ND
R24
1.5k
510
R12 1kR13
R14
6.2
B_G
ND
D15
D17
D16
D18
1N41
50-1
1N41
50-1
1N41
50-1
1N41
50-1
1/4W
BB
_I_F
DB
K1
BB
_I_F
DB
K2
2.49
kR
252.
49k
R26
B_G
ND
VR
EF
37.5
kR
337
.5k
R2
R1
523
B_G
ND
R8
10k
C7
470p
F
1µF
C18
FE
ED
BA
CK
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Out
A (
To
page
2)
Out
B (
To
page
2)
PICREF-1
page 8 1997 Microchip Technology Inc.
FIGURE 4: BB – PAGE 2 OF 3
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U2
TS
C42
9CP
A
C3
1µF
C4
0.47
µF
Vcc
B_G
ND
2
45
67
8
R5
1k
B_G
ND
R4
2kO
UT
A
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U3
TS
C42
9CP
A
C13
1µF
C14
0.47
µF
Vcc
B_G
ND
2
45
67
8
R16
1k
B_G
ND
R15
2k
R6
5.6
R7
5.6
R17
5.6
R18
5.6
Tra
nsis
tor
Pai
r A
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
Tra
nsis
tor
Pai
r B
Pus
h-P
ull B
atte
ryB
oost
Circ
uit
B_G
ND
(Fro
m p
age
1)
OU
T B
(Fro
m p
age
1)
B_G
ND
B_G
ND
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
Q1_
DR
IVE
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
Por
tion
of B
atte
ry B
oost
Circ
uit
PICREF-1
1997 Microchip Technology Inc. page 9
FIGURE 4: BB – PAGE 3 OF 3
D1
D3
D2
D4
1N56
15
1N56
15
1N56
15
1N56
15
T1
C1
33µF
35V
7815
IO
R
1
2
3U
1
C2
100µ
F25
V
Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 2 3 4
CN
2
CN
1
R19
47
B_G
ND
ZZ
3448
1/2w
1 2 3 4
CN
3
B_G
ND
BB
_I_F
DB
K1
BB
_I_F
DB
K2
FE
ED
BA
CK
B_G
ND
B_G
ND
B_G
ND
B_G
ND
X1
X2
BA
TT
ER
Y(+
)BU
S
LOW
_BA
T
X1
X2
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q2_
DR
IVE
Q1_
DR
IVE
Q4_
DR
IVE
Q3_
DR
IVE
BB
_SY
N1
PICREF-1
page 10 1997 Microchip Technology Inc.
FIGURE 5: FREE-RUNNING CHOPPER (FRC) CONTROL CARD – PAGE 1 OF 3
INV
E/A
OU
T
Rt
CLK
/LE
B
Ct
RA
MP
SS
OU
T A
OU
T B
Vcc
1 311
6 75
1214
15
4
C4
0.47
µF
Vcc
CH
_GN
DR
410
0
Q2
2N22
22A
U2
UC
3825
AN
I Lim
GN
D
PG
ND
Vc
VR
EF
NL
1µF
1316
2
89
10
C10
470p
FC
1168
0pF
C3
CH
_GN
D
3 5
2 4
U5a
4049
U5b
4049
100k
Hz
Out
A
100k
Hz
Out
B
R5
10k
R18
4.7k
Q2
2N22
22A
Vcc
CH
_GN
D
R19
100k
R3
1.5k
CH
_GN
D
D8
1N41
50-1
4700
pFC
7
FR
C_S
YN
1
C10
100p
F
D7
1N98
5B
D6
1N98
5B
D5
1N98
5B
R1
24
CH
_GN
D
R6
1kR
751
0
R7
20.0
D9
1N41
50-1
CH
_GN
D
CH
_I_F
DB
K1
CH
_I_F
DB
K2
CH
_GN
D
CH
_GN
D
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oardC
H_G
ND
CH
_GN
D
+D
C_B
US
S
(To
page
2)
(To
page
2)
PICREF-1
1997 Microchip Technology Inc. page 11
FIGURE 5: FRC – PAGE 2 OF 3
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U3
TS
C42
9CP
A
C5
1µF
C6
0.47
µF
Vcc
CH
_GN
D
2
45
67
8
R9
1k
CH
_GN
D
R8
2.2k
VD
DV
DD
GN
DG
ND
1 INO
UT
OU
T
U4
TS
C42
9CP
A
C12
1µF
C13
0.47
µF
Vcc
CH
_GN
D
2
45
67
8
R11
1k
CH
_GN
D
R10
2.2k
Q5_
DR
IVE
_RE
T
Q5_
DR
IVE
Q8_
DR
IVE
_RE
T
Q8_
DR
IVE
Q7_
DR
IVE
_RE
T
Q7_
DR
IVE
T2
Q6_
DR
IVE
_RE
T
Q6_
DR
IVE
R12 12 R13 12 R14 12 R15 12
Out
A(F
rom
pag
e 1)
Out
B(F
rom
pag
e 1)
CH
_I_F
DB
K1
CH
_I_F
DB
K2
+D
C_B
US
S
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q5_
DR
IVE
_RE
T
Q5_
DR
IVE
Q7_
DR
IVE
_RE
T
Q7_
DR
IVE
Q6_
DR
IVE
_RE
T
Q6_
DR
IVE
Q8_
DR
IVE
_RE
T
Q8_
DR
IVE
Por
tion
of F
ree-
Run
ning
Cho
pper
Circ
uit C
H_G
ND
CH
_GN
D
100k
Hz
100k
Hz
PICREF-1
page 12 1997 Microchip Technology Inc.
FIGURE 5: FRC – PAGE 3 OF 3
D1
D3
D2
D4
1N56
15
1N56
15
1N56
15
1N56
15
T1
C1
33µF
35V
7815
IO
R
1
2
3U
1
C2
100µ
F25
V
Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1 2 3 4
J2
J1
R17 47
CH
_GN
D
ZZ
3448
1/2
W
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
+D
C_B
US
S
CH
_I_F
DB
K1
CH
_I_F
DB
K2
Q5_
DR
IVE
_RE
T
Q5_
DR
IVE
Q6_
DR
IVE
_RE
T
Q6_
DR
IVE
Q7_
DR
IVE
_RE
T
Q7_
DR
IVE
Q8_
DR
IVE
_RE
T
Q8_
DR
IVE
CH
_GN
D
CH
_GN
DC
H_G
ND
X1
X2
X1
X2
FR
C_S
YN
1
PICREF-1
1997 Microchip Technology Inc. page 13
FIGURE 6: INVERTER CONTROL (INV CRTL) CARD – PAGE 1 OF 4
RA
5/T
X/C
K
RA
4/R
X/D
T
RA
3
RA
2
RA
1/T
0CK
I
RA
0/IN
T
RB
7
RB
6R
B5/
TC
LK3
RB
4/T
CLK
12
RB
3/P
WM
2
RB
2/P
WM
1
RB
1/C
AP
2
RB
0/C
AP
1
TE
ST
OS
C1/
CLK
IN
OS
C2/
CLK
OU
T
VD
D
VS
S
VS
S
RD
7/A
D16
RD
6/A
D14
RD
5/A
D13
RD
4/A
D12
RD
3/A
D11
RD
2/A
D10
RD
1/A
D9
RD
0/A
D8
RC
7/A
D7
RC
6/A
D6
RC
5/A
D5
RC
4/A
D4
RC
3/A
D3
RC
2/A
D2
RC
1/A
D1
RC
0/A
D0
RE
2/W
R
RE
1/O
E
RE
0/A
LE
MC
LR/V
PP
U1
PIC
17C
43
33 34 35 36 37 38 39 40 9 8 7 6 5 4 3 2 28 29 30 32
21 22 23 24 25 26 18 17 16 15 14 13 12 11 27 19 20 1 31 10
C26
4.7µ
F
PW
M
10V
47k
R30
+5V
D10
1N41
50-1
C4
0.1µ
F
+5V
D7
D6
D5
D4
D3
D2
D1
D0
RD
’
WR
’
CS
’
INT
’
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Clr
Clk
Out
Gnd
VD
D
8714
C5
0.1µ
F
+5V
U4
25M
Hz
CT
X17
1
U9
74H
C40
40
C7
0.1µ
F
+5V
9 7 6 5 3 2 4 13 12 14 15 1
3.12
5MH
z
195k
Hz
11 10
DB
7
DB
6
DB
5
DB
4
DB
3
DB
2D
B1
DB
0
RD
WR
INT
CS
CLK
DV
+
DG
ND
D7
D6
D5
D4
D3
D2
D1
D0
RD
’
WR
’
INT
’
CS
’
13 14 15 16 17 18 19 20 3 23 21 2 22 24 12C
60.
1µF
+5V
U5
AD
C10
154C
IN
CH
0
CH
1
CH
2
CH
3
AV
+
Vr+
Vr-
V-
Vro
ut
4 5 6 7 1 9 10 11 8
C23
330µ
F
-5V
10v
C13
0.1µ
F
-5V
C14
0.1µ
F
+5V
4.75
kR
25
4.75
kR
26
4.75
kR
31
6 57
4.75
kR
32
LM15
8U
16b
CH
0 (F
rom
pag
e 2)
CH
1 (F
rom
pag
e 2)
4.75
kR
23
4.75
kR
24
2 31
LM15
8U
16a
+12
V
- +
- +
-12V8 4
3.12
5MH
z
195k
Hz
l
l
1kR29
+5V
FLT
+
1kR27
l
1kR28
EN
AB
LE+
+5V
U19
4N35
U21
4N35
U20
4N35
(T
o pa
ge 2
)
(To
page
2)
-5V
C32
0.1µ
FC
310.
1µF
100
R37
100
R36
FLT
-
ZC
+ ZC
-
EN
AB
LE-
ALA
RM
PO
S_N
EG
FA
ULT
EN
AB
LE
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
(T
o/fr
om
(T
o pa
ge 3
)
page
3)
PICREF-1
page 14 1997 Microchip Technology Inc.
FIGURE 6: INV CRTL - PAGE 2 OF 4
100k
R5
931
R2
100k
R4
2 31
931
R3
LT10
13C
N8
U6a
2.2k
R11
- +C
H0
+12
V
-12V
8 4
+5V -5V
C10
47pF
C11
47pF
100k
R7
100k
R6
1kR9
82k
R8
49.9
R10
6 57
LT10
13C
N8
U6b
2.2k
R12
- +C
H1
+5V -5V
D6 D
5D
7
D8
3.12
5MH
z
195k
Hz
C22
22pF
1kR22
10 98
13 1211
1 23
4 56
C24
0.1µ
F
+5V
74A
C00
U15
c
74A
C00
U15
d
74A
C00
U15
a
74A
C00
U15
b
7400
U18
c10 9
8
1kR20
C21
0.1µ
F
220
R21
+5V
Q1
2N22
22A
T2
(To
page
1)
(To
page
1)
(Fro
m p
age
1)
(Fro
m p
age
1)
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
CS
EN
SE
_1O
SE
NS
E_1
OS
EN
SE
_2
BB
_SY
NC
1
BB
_SY
NC
2
FR
C_S
YN
C1
FR
C_S
YN
C2
PF
C_S
YN
C1
PF
C_S
YN
C2
PICREF-1
1997 Microchip Technology Inc. page 15
FIGURE 6: INV CRTL – PAGE 3 OF 4
D3
D1
D4
D2
1N56
15
1N56
15
1N56
15
1N56
15
T1
HF
_BIA
S1
L1
C1
47µF
C8
47µF
25V
25V
7812
IO
R
1
2
3U
2
C3
2.2µ
F25
V
7805
IO
R
1
2
3U
3
C2
2.2µ
F25
V
7905
IO
R 1
23
U7
C9
2.2µ
F25
V
7912
IO
R 1
23
U8
C12
2.2µ
F25
V
+12
V
+5V
-5V
-12V
1 23
4 56
C25
0.1µ
F
+5V
74A
C00
U13
a
74A
C00
U13
b
74A
C00
U13
c10 9
8
4.75
kR
19
74A
C00
U13
d13 12
11
4.75
kR
1
Out
of
D9
1N41
50-1
+5V
74A
C00
U11
a1 2
374
00U
18d
13 1211
74A
C00
U11
b4 5
6
74A
C00
U11
c10 9
8
74A
C00
U11
d13 12
11
C29
0.1µ
F
+5V
1kR33
C27
1nF
1 23
4 56
1kR35
+5V
7486
U17
a
7486
U17
b
7400
U18
a1 2
3
74A
C00
U14
b4 5
6
74A
C00
U14
a1 2
3
1kR34
C28
1nF
10 98
13 1211
7486
U17
c
7486
U17
d
7400
U18
b4 5
6
74A
C00
U14
d13 12
11
74A
C00
U14
c10 9
8
C30
0.1µ
F
+5V
Sat
urat
ion
(Fro
m p
age
4)
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
HF
_BIA
S2
EN
AB
LE
FA
ULT
PO
S_N
EG
PW
M
L_H
I
L_H
I
Q10
_DR
IVE
Q11
_DR
IVE
Q12
_DR
IVE
Q9_
DR
IVE
PICREF-1
page 16 1997 Microchip Technology Inc.
FIGURE 6: INV CRTL – PAGE 4 OF 4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1kR13
C19
0.1µ
F
+12
V
C20
0.1µ
F
+5V
C15
1nF
1kR14
C16
1nF
1kR15
C17
1nF
1kR16
C18
1nF
54 3
2
1U
10a
4082
1211 10
9
13U
10b
4082
1 2 3 4
CN
1
CN
2
1 2 3 4
CN
3
1 2 3 4
CN
4
1 2 3 4
CN
5
1 2 3 4
CN
6
1 2 3 4
CN
7
Out
of
Sat
urat
ion
(To
page
3)
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
HF
_BIA
S1
HF
_BIA
S2
OS
EN
SE
_1
OS
EN
SE
_2
CS
EN
SE
_1
FLT
+ FLT
-
ZC
+ ZC
-
EN
AB
LE+
EN
AB
LE-
BB
_SY
NC
1
BB
_SY
NC
2
CH
P_S
YN
C1
CH
P_S
YN
C2
PF
C_S
YN
C1
PF
C_S
YN
C2
Q10
_DR
IVE
Q11
_DR
IVE
Q12
_DR
IVE
Q9_
DR
IVE
Q9_
OC
_ALA
RM
Q10
_OC
_ALA
RM
Q11
_OC
_ALA
RM
Q12
_OC
_ALA
RM
PICREF-1
1997 Microchip Technology Inc. page 17
FIGURE 7: INVERTER DRIVE (INV DRV) CARD – PAGE 1 OF 2
AM
P
OV
P
U1,
U2,
U3,
U4
EX
B84
0
R2,
R6,
1.5k
R10
, R14
+5V
dc
Q#_
GN
D
O_G
ND
+12
Vdc
R1,
R5,
1.5k
R9,
R13
U5,
U6,
U7,
U8
H11
L1
R3,
R7,
1.5k
R11
, R15
D1,
D2,
ER
A34
-10
D3,
D4
To
Inve
rter
Con
trol
Boa
rd
Fro
m In
vert
erC
ontr
ol B
oard
Q#_
GN
D
C1,
C5,
33µF
C9,
C13
35V
C2,
C6,
33µF
C10
, C14
35V
D5,
D9,
D7,
D11
,
D6,
D10
,D
8, D
12,
C4,
C8,
33µF
C12
, C16
35V
C3,
C7,
100µ
FC
11, C
15
25V
OI
R
1
2
3
U9,
U10
7818
U11
, U12
D13
, D17
D14
, D18
D15
, D19
D16
, D20
1N56
15
1N56
15
1N56
15
1N56
15
R4,
R8,
33R
12, R
16
T1,
T2,
T3,
T4
ZZ
3448
Q#
ofIn
vert
erH
-Brid
ge
No
te:
The
Inve
rter
Driv
e C
ard
has
four
(4)
circ
uits
as
show
nto
driv
e ea
ch o
f the
four
Inv
erte
r H
-Brid
ge t
rans
isto
rs(#
= 9
, 10,
11,
12)
.
12 3
45
6
9
1415
Q#_
GN
D
C17
, C18
,
330p
FC
19, C
20
Q#_
DR
IVE
Q#_
OC
_ALA
RM
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
Q#_
C
Q#_
G
Q#_
E
X1
X2
PICREF-1
page 18 1997 Microchip Technology Inc.
FIGURE 7: INV DRV – PAGE 2 OF 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
+12
Vdc
+5V
dc
1 2 3 4
CN
1
CN
2
1 2 3 4
CN
3
O_G
ND
1 2 3 4
CN
4
1 2 3 4
CN
5
1 2 3 4
CN
6
LEG
EN
D
Ext
erna
l to
Boa
rd
Inte
rnal
to B
oard
X1
X2
Q9_
C
Q9_
G
Q9_
E
Q10
_C
Q10
_G
Q10
_E
Q11
_C
Q11
_G
Q11
_E
Q12
_C
Q12
_G
Q12
_E
Q10
_DR
IVE
Q10
_OC
_ALA
RM
Q11
_DR
IVE
Q11
_OC
_ALA
RM
Q12
_DR
IVE
Q12
_OC
_ALA
RM
Q9_
DR
IVE
Q9_
OC
_ALA
RM
