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ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005 Instructor: Dr. Alex Doboli. Paper discussed in class: H. Singh, M.-H. Lee, G. Lu, F. J. Kurdahi, N. Bagherzadeh, E. M. Chaves Filho, “MorphoSys: An Integrated Reconfigurable System for Data- Parallel and Computation-Intensive Applications”, IEEE Transactions on Computers, Vol. 49, No. 5, May 2000,

ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

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Page 1: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

ESE 566: Hardware/Software Co-Design of Embedded Systems

Fall 2005 

Instructor: Dr. Alex Doboli.

Paper discussed in class: H. Singh, M.-H. Lee, G. Lu, F. J. Kurdahi, N. Bagherzadeh, E. M. Chaves Filho,

“MorphoSys: An Integrated Reconfigurable System for Data-Parallel and Computation-Intensive

Applications”, IEEE Transactions on Computers, Vol. 49, No. 5, May 2000, pp. 465-481.

Page 2: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

Brief description of the paper content

• Briefly, what is the paper discussing?

• What is the motivation for this work?

• Describe the structure of the MorphoSys architecture

Page 3: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

Taxonomy for Reconfigurable Systems• What paradigm is MorphoSys proposing? How is this similar/different

from the ideas in Pleiades?

• What criteria are used to analyze a reconfigurable system? Discuss these criteria (granularity/depth of programmability/reconfigurability/interface/computation models).

Page 4: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

Taxonomy for Reconfigurable Systems

• Discuss Table I and Table II.

• Explain the differences between SIMD array processors and SIMD-based reconfigurable systems.

Page 5: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

MorphoSys Architecture

• Discuss the Reconfigurable Cell Array (Figure 3). Structure. Reconfiguration modes. What is the correlation between application domain and this structure?

• What activities does the programmable processor perform?

Page 6: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

MorphoSys Architecture

• Frame Buffer

• What specific instructions were introduced for the programmable processor?

Page 7: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

MorphoSys Architecture

• Discuss the instructions in Table 3. What is overlap of computation and data transfers? What are its merits? Limitations?

• What is the operation mode? What parallel operation do take place during operation?

Page 8: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

Design of Components

• What is the structure of an Reconfigurable Cell (Figure 5)?

• Context Register. Discuss Figure 6.

• Context Memory Organization. Context Broadcast. Dynamic Reconfiguration. Selective Context Enabling.

Page 9: ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli

Design of Components

• Interconnect network. What hierarchical levels are there in the network?

• Summarize the architectural features of MorphoSys. Compare with Pleiades. Discuss advantages and limitations.