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Contents Overview 1 1Count24V/100 kHz 2 1Count5V/500kHz 3 1SSI 4 2PULSE 5 Index Technological Functions ET 200S Manual This manual is part of the documentation package with the order number: 6ES7151-1AA00-8BA0 Edition 06/2002 A5E00124867-02 SIMATIC

Encoder ET200s 2parte

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Page 1: Encoder ET200s 2parte

Contents

Overview1

1Count24V/100 kHz2

1Count5V/500kHz3

1SSI4

2PULSE5

Index

Technological FunctionsET 200S

Manual

This manual is part of the documentationpackage with the order number:

6ES7151-1AA00-8BA0

Edition 06/2002A5E00124867-02

SIMATIC

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!Danger

indicates that death, severe personal injury or substantial property damage will result if proper precautionsare not taken.

!Warning

indicates that death, severe personal injury or substantial property damage can result if properprecautions are not taken.

!Caution

indicates that minor personal injury can result if proper precautions are not taken.

Caution

indicates that property damage can result if proper precautions are not taken.

Notice

draws your attention to particularly important information on the product, handling the product, or to aparticular part of the documentation.

Qualified PersonnelOnly qualified personnel should be allowed to install and work on this equipment. Qualified persons aredefined as persons who are authorized to commission, to ground and to tag circuits, equipment, andsystems in accordance with established safety practices and standards.

Correct UsageNote the following:

!Warning

This device and its components may only be used for the applications described in the catalog or thetechnical description, and only in connection with devices or components from other manufacturers whichhave been approved or recommended by Siemens.

This product can only function correctly and safely if it is transported, stored, set up, and installedcorrectly, and operated and maintained as recommended.

TrademarksSIMATIC, SIMATIC HMI and SIMATIC NET are registered trademarks of SIEMENS AG.

Third parties using for their own purposes any other names in this document which refer to trademarksmight infringe upon the rights of the trademark owners.

Safety GuidelinesThis manual contains notices intended to ensure personal safety, as well as to protect the products andconnected equipment against damage. These notices are highlighted by the symbols shown below andgraded according to severity by the following texts:

We have checked the contents of this manual for agreementwith the hardware and software described. Since deviationscannot be precluded entirely, we cannot guarantee fullagreement. However, the data in this manual are reviewedregularly and any necessary corrections included insubsequent editions. Suggestions for improvement arewelcomed.

Disclaim of LiabilityCopyright Siemens AG 2001 - 2002 All rights reserved

The reproduction, transmission or use of this document or itscontents is not permitted without express written authority.Offenders will be liable for damages. All rights, including rightscreated by patent grant or registration of a utility model ordesign, are reserved.

Siemens AGBereich Automation and DrivesGeschaeftsgebiet Industrial Automation SystemsPostfach 4848, D-90327 Nuernberg

Siemens AG 2002Technical data subject to change.

Siemens Aktiengesellschaft A5E00124867-02

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iiiTechnological Functions ET 200SA5E00124867-02

Contents

1 Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 1Count24V/100kHz 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1 Product Overview 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Clocked Mode 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Brief Instructions on Commissioning the 1Count24V/100kHz 2-4. . . . . . . . . .

1.4 Terminal Assignment Diagram 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5 Modes and Areas of Application of the 1Count24V/100kHz 2-8. . . . . . . . . . . .

1.6 Count Modes 2-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.1 Endless Counting 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.2 Once-Only Counting 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.3 Periodic Counting 2-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.4 Behavior of the Digital Inputs 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.5 Gate Functions in Count Modes 2-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.6 Latch Function 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.7 Synchronization 2-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.8 Behavior of the Outputs in Count Modes 2-25. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6.9 Assignment of the Feedback and Control Interface for the Count Modes 2-351.6.10 Parameter Assignment for the Count Modes 2-43. . . . . . . . . . . . . . . . . . . . . . . .

1.7 Measurement Modes 2-45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.1 Frequency Measurement 2-47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.2 Rotational Speed Measurement 2-49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.3 Period Measurement 2-51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.4 Gate Functions in Measurement Modes 2-53. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.5 Behavior of the Output in Measurement Modes 2-55. . . . . . . . . . . . . . . . . . . . . . 1.7.6 Assignment of the Feedback and Control Interfaces for

the Measurement Modes 2-57. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.7.7 Parameter Assignment for Measurement Modes 2-66. . . . . . . . . . . . . . . . . . . . .

1.8 Count and Direction Evaluation 2-68. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.9 Behavior at CPU-Master-STOP 2-71. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.10 Technical Specifications 2-73. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 1Count5V/500kHz 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1 Product Overview 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Clocked Mode 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.3 Brief Instructions on Commissioning the 1Count5V/500kHz 3-4. . . . . . . . . . .

2.4 Terminal Assignment Diagram 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5 Modes and Areas of Application of the 1Count5V/500kHz 3-8. . . . . . . . . . . . .

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2.6 Count Modes 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.1 Endless Counting 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.2 Once-Only Counting 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.3 Periodic Counting 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.4 Behavior of the Digital Inputs 3-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.5 Gate Functions in Count Modes 3-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.6 Latch Function 3-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.7 Synchronization 3-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.8 Behavior of the Outputs in Count Modes 3-27. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6.9 Assignment of the Feedback and Control Interface for the Count Modes 3-372.6.10 Parameter Assignment for the Count Modes 3-45. . . . . . . . . . . . . . . . . . . . . . . .

2.7 Measurement Modes 3-47. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.1 Frequency Measurement 3-49. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.2 Rotational Speed Measurement 3-51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.3 Period Measurement 3-54. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.4 Gate Functions in Measurement Modes 3-56. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.5 Behavior of the Outputs in Measurement Modes 3-58. . . . . . . . . . . . . . . . . . . . . 2.7.6 Assignment of the Feedback and Control Interfaces for the

Measurement Modes 3-60. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.7 Parameter Assignment for Measurement Modes 3-68. . . . . . . . . . . . . . . . . . . . .

2.8 Count and Direction Evaluation 3-70. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.9 Behavior at CPU-Master-STOP 3-72. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.10 Technical Specifications 3-74. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4 1SSI 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.1 Product Overview 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.2 Clocked Mode 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3 Brief Instructions on Commissioning the 1SSI 4-4. . . . . . . . . . . . . . . . . . . . . . .

4.4 Terminal Assignment Diagram 4-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.5 Areas of Application in Standard Mode and Fast Mode 4-9. . . . . . . . . . . . . . .

4.6 Functions of the 1SSI 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.1 Encoder Value Detection 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.2 Gray/Binary Converter 4-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.3 Transmitted Encoder Value and Standardization 4-13. . . . . . . . . . . . . . . . . . . . . 4.6.4 Detection of Direction and Reversal of the Direction of Rotation 4-14. . . . . . . . 4.6.5 Comparator (Only in Standard Mode) 4-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.6 Latch Function (Only in Standard Mode) 4-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.7 Error Detection in Standard Mode 4-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.6.8 Error Detection in Fast Mode 4-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.7 Behavior at CPU-Master-STOP 4-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.8 Parameter Assignment 4-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.9 Control and Feedback Interfaces in Standard Mode 4-23. . . . . . . . . . . . . . . . . .

4.10 Feedback Interface in Fast Mode 4-26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.11 Technical Specifications 4-27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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5 2PULSE 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.1 Product Overview 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.2 Brief Instructions on Commissioning the 2PULSE 5-3. . . . . . . . . . . . . . . . . . . .

5.3 Modes and Functions 5-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.1 Pulse Output Mode 5-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.2 Pulse-Width Modulation Mode (PWM) 5-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.3 Pulse Train Mode 5-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.4 On/Off-Delay Mode 5-27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.5 Function: Direct Control of the DO Digital Output 5-34. . . . . . . . . . . . . . . . . . . . 5.3.6 Function: Error Detection/Diagnostics 5-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.3.7 Behavior at CPU-Master-STOP 5-38. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.4 Application Examples 5-40. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.1 Filling Liquids 5-41. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.2 Heating a Liquid 5-45. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.3 Packing Piece Goods 5-50. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4.4 Applying a Protective Layer 5-54. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.5 Technical Specifications for the Hardware and Terminal Assignment 5-58. . . .

5.6 Technical Specifications for Programming, Reference Lists 5-62. . . . . . . . . . . .

Index Index-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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Overview

How the Manual is Structured

This manual complements the ET 200S Distributed I/O System manual.

It contains descriptions of the ET 200S modules that are particularly suited for usein certain processes.

How to Find Your Way Around

At the beginning of each chapter you will find a Product Overview, which lists thefeatures and applications of the module described. You will also find the ordernumber of the module and the name and release of the software required. TheInternet address where the current DDB file is stored is also provided.

In each chapter you will then find a section with the heading Brief Instructions onCommissioning followed by the name of the relevant module. These briefinstructions tell you in a series of short steps how to install and configure themodule, how to integrate it in your use program, and how to test it in your userprogram.

Index

The index contains keywords that come up in the manual.

1

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Overview

1-2Technological Functions ET 200S

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1Count24V/100kHz

Chapter Overview

Section Description Page

2.1 Product Overview 2-2

2.2 Clocked Mode 2-3

2.3 Brief Instructions on Commissioning the 1Count24V/100kHz 2-4

2.4 Terminal Assignment Diagram 2-7

2.5 Modes and Areas of Application of the 1Count24V/100kHz 2-8

2.6 Count Modes 2-9

2.7 Measurement Modes 2-45

2.8 Count and Direction Evaluation 2-68

2.9 Behavior at CPU-Master-STOP 2-71

2.10 Technical Specifications 2-73

2

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2.1 Product Overview

Order Numbers

6ES7 138-4DA03-0AB0

Compatibility

The 1Count24V/100kHz with the order number 6ES7 138-4DA03-0AB0 replacesthe 1Count24V/100kHz with the order number 6ES7 138-4DA02-0AB0 with fullcompatibility. You can use it with STEP 7 as of V5.1 SP2 in non-clocked mode. Youwill need STEP 7 as of V5.1 SP4 for clocked mode.

Features

• Connection of a pulse generator to count 24 V signals up to a frequency of100 kHz.

• Can be operated using terminal modules TM-E15S24-01 and TM-E15S26-A1

• Clocked mode

• Modes of the 1Count24V/100kHz:

Count modes:

– Endless counting

– Once-only counting

– Periodic counting

Measurement modes:

– Frequency measurement

– Rotational speed measurement

– Period measurement

• Gate control, synchronization or latch function via digital input (P or M switch).

• Real digital output for direct control or output of the comparison result

• Virtual digital output

Connectable Count Signals

The 1Count24V/100kHz can count the signals of the following:

• 24 V pulse generator with direction indicator

• 24 V pulse generator without direction indicator

• 24 V incremental encoder with two tracks that are 90o out of phase (rotarytransducer).

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Adjustment During Operation

• Count modes

– You can change the function and behavior of the digital outputs duringoperation.

• Measurement modes

– You can change the function of the DO1 digital output during operation

– You can change the integration time during operation

Configuration

You can use either of the following to configure the 1Count24V/100kHz:

– A DDB file (http://www.ad.siemens.de/csi/gsd)

– STEP 7 as of V5.1 SP4

2.2 Clocked Mode

Note

The principles of clocked mode are described in a separate manual.

Hardware Requirements

You will require the following for the clocked mode of the 1Count24V/100kHz:

• A CPU that supports clocking

• A DP master that supports the equidistant bus cycle

• An IM 151 High Feature

Features

Depending on the system parameter assignment, the 1Count24V/100kHz workseither in non-clocked or clocked mode.

In clocked mode, the transmission of data between the DP master and1Count24V/100kHz is clocked to the PROFIBUS DP cycle.

In clocked mode the 8 bytes of the feedback interface are consistent.

If an error occurs during parameterization the 1Count24V/100kHz does not go intothe clocked mode.

If clocking is lost due to faults or failure or a delay in global control (GC), the1Count24V/100kHz will return to clocked mode at the next cycle without an errorresponse.

If clocking is lost, the feedback interface is not updated.

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2.3 Brief Instructions on Commissioning the 1Count24V/100kHz

Introduction

These instructions use the example of “endless counting” to teach you to set up afunctioning application in which you count the switching operations of a contact. Atthe same time, you learn about the basic functions of your 1Count24V/100kHz(hardware and software) and how to check them.

Requirements

The following requirements must be met:

• You put an ET 200S station into service at an S7 station with a DP master.

• You must have the following:

– A TM-E15S24-01 terminal module

– A 1Count24V/100kHz

– A pushbutton and the necessary wiring material

Installation, Wiring and Fitting

Install and wire the TM-E15S24-01 terminal module (see Figure 2-1). Connect the1Count24V/100kHz to the terminal module (you will find detailed instructions onhow to do this in Chapter 5 of the ET 200S Distributed I/O System manual).

5

6

4DA03-0AB06ES7138

Figure 2-1 Terminal Assignment for the Example

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Configuration Using STEP7 and HWCONFIG

You begin by adapting the hardware configuration of your existing ET 200S station.

Open the relevant project in SIMATIC Manager.

Call the HWCONFIG configuration table in your project.

Select the 1CTR 24V/100kHz count mode from the hardware catalog. The number6ES7 138-4DA03-0AB0 C appears in the information text. Drag the entry to theslot at which you have installed your 1Count24V/100kHz.

Double-click this number to open the DP Slave Properties dialog box.

On the Addresses tab, you will find the addresses of the slot to which you havedragged the 1Count24V/100kHz. Make a note of these addresses for subsequentprogramming.

On the Parameters tab you will find the default settings for the 1Count24V/100kHz.Leave the default settings unchanged.

Save and compile your configuration, and download the configuration in STOPmode of the CPU by choosing PLC → Download to Module.

Integration in the User Program

Create block FC101 and integrate it in your control program (in OB1, for example).This block requires the data block DB1 with a length of 16 bytes. The start addressof the module in the following example is 256.

STL Description

Block: FC101

Network 1: Presettings

L 0T DB1.DBD0T DB1.DBD4SETS DB1.DBX4.0

Network 2: Write to the control interface

L DB1.DBD0

T PQD 256L DB1.DBD4T PQD 260

Network 3: Read from the feedbackinterface

L PID 256T DB1.DBD8L PID 260T DB1.DBD12

//Delete control bits

//Open SW gate

//Write 8 bytes to the 1Count24V/100kHz//Configured start address of the outputs

//Read 8 bytes from the 1Count24V/100kHz//Configured start address of the inputs

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Test

Use “Monitor/Modify Variables” to monitor the count value and the gate.

Select the “Block” folder in your project. Choose the Insert → S7 Block → VariableTable menu command to insert the VAT 1 variable table, and then confirm with OK.

Open the VAT 1 variable table, and enter the following variables in the “Address”column:

DB1.DBD8 (current count value)

DB1.DBx13.0 (internal gate status)

Choose PLC → File Connect To → Configured CPU to switch to online.

Choose Variable Monitor to switch to → monitoring.

Switch the CPU to RUN mode.

The “internal gate status” bit must be set.

Use your count contact to generate pulses.

You Can Now:

• See that the UP LED on the 1Count24V/100kHz is on. The status of the UPLED changes with each new pulse.

• See that the count value in the block changes.

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2.4 Terminal Assignment Diagram

Wiring Rules

The cables (terminals 1 and 5 and terminals 2 and 8) must be shielded. The shieldmust be supported at both ends. To do this use the shield contact (see theET 200S Distributed I/O System manual, Appendix A, ET 200S Accessories).

Terminal Assignment of the 1Count24V/100kHz

In the following tables you will find the terminal assignment for the1Count24V/100kHz.

Table 2-1 Terminal Assignment of the 1Count24V/100kHz

View Terminal Assignment Remarks

TM-E15S24-01 and 1Count24V/100kHz

MM

24 VDC24 VDC

DI

AB

DO1

1

2

3

4

5

6

7

8

6ES71384DA03-0AB0

B: Direction input or track B

A: Pulse input or track A

24 VDC: Sensor supply

M: Chassis ground

DI: Digital input

DO1: Digital output

Pulse Generator Connection

Encoder Type Connection Count Direction

Pulse generator without directionindicator

24 V count pulses at terminal 5 (A) Up

Pulse generator with directionindicator

24 V count pulses at terminal 5 (A)and 24 V direction at terminal 1 (B)

Up, down

Pulse generator with 2 tracks thatare 90o out of phase

Track A terminal 5 (A) and track Bterminal 1 (B)

Up, down

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2.5 Modes and Areas of Application of the 1Count24V/100kHz

To begin with, decide how you want to use the 1Count24V/100kHz. You canchoose between the following modes:

Count Modes Measurement Modes

Endless counting Frequency measurement

Once-only counting Rotational speed measurement

Periodic counting Period measurement

Parameters are assigned to the various modes. You will find the parameter listsin the descriptions of the modes.

You can integrate the 1Count24V/100kHz in your project in two different ways.Decide whether you want to work with a DDB file or with STEP7.

Integrating the 1Count24V/100kHz with STEP7(in Clocked and Non-Clocked Mode)

Select an entry from the hardware catalog that corresponds to the mode youwant.

Select 1CTR24V/100kHz count modefor count modes

Select 1CTR24V/100kHz measurementmode for measurement modes

The number 6ES7 138-4DA03-0AB0 Cappears in the information text. Dragthe entry to the slot at which you haveinstalled your 1Count24V/100kHz.

The number 6ES7 138-4DA03-0AB0 Mappears in the information text. Dragthe entry to the slot at which you haveinstalled your 1Count24V/100kHz.

Select the parameters.

Integrating the 1Count24V/100kHz with STEP7(Only in Non-Clocked Mode)

Select an entry in the DDB file that corresponds to the mode you want.

SelectC 6ES7 138-4DA03-0AB0 1CNT24Vfor count modes

SelectM 6ES7 138-4DA03-0AB0 1CNT24Vfor measurement modes

Select the parameters.

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2.6 Count Modes

The count modes are used in count applications (for counting items, for example).

You can choose between the following modes:

• Endless counting (for position detection with incremental encoders, forexample)

• Once-only counting (for counting items up to a maximum limit, for example)

• Periodic counting (in applications with repeated count operations, for example)

To execute one of these modes, you have to assign parameters to the1Count24V/100kHz (see Section 2.6.10).

Maximum Count Range

The upper count limit is +2147483647 (231 – 1).

The lower count limit is –2147483648 (–231).

Load Value

You can specify a load value for the 1Count24V/100kHz.

You can set this load value directly (LOAD_VAL). It is then accepted by the1Count24V/100kHz directly as the new count value.

You can also load the load value by way of preparation (LOAD_PREPARE). Theload value is then accepted by the 1Count24V/100kHz as the new count valuewhen the following events occur:

In the once-only counting and periodic counting modes

– The lower or upper count limit is reached when no main count direction isparameterized.

– The parameterized upper count limit is reached when the main countdirection is up.

– Zero is reached when the main count direction is down.

In all count modes

– The count operation is started by the SW gate or HW gate (if the countoperation is continued, the load value is not accepted).

– Synchronization

– Latch and retrigger

Gate Control

To control the 1Count24V/100kHz, you have to use the gate functions.

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Main Count Direction

With the main count direction, you assign parameters to indicate which RESETstatuses the load value and count value can take on. It is thus possible to createincrementing or decrementing count applications. The parameterized main countdirection has no effect on the direction evaluation when the count pulses aredetected.

RESET Statuses of the Following Values After Parameter Assignment

Table 2-2 RESET Statuses

Value Main CountDirection

RESET Status

Load value NoneUpDown

00Parameterized upper count limit

Count value NoneUpDown

00Parameterized upper count limit

Comparison value 1and 2

NoneUpDown

00Parameterized upper count limit

Latch value NoneUpDown

00Parameterized upper count limit

Clocked Mode

In clocked mode the 1Count24V/100kHz accepts the control bits and controlvalues from the control interface in each PROFIBUS DP cycle and reports backthe response to them in the same cycle.

In each cycle the 1Count24V/100kHz transfers the counter status and latch valuethat were valid at the time Ti and the status bits valid at the time Ti.

A counter status controlled by hardware input signals can only be transferred in thesame cycle if the input signal occurred before the time Ti.

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2.6.1 Endless Counting

Definition

In this mode, the 1Count24V/100kHz counts endlessly as of the load value:

• If the 1Count24V/100kHz reaches the upper count limit when counting up, andanother count pulse then comes, it will jump to the lower count limit andcontinue counting from there without losing the pulse.

• If the 1Count24V/100kHz reaches the lower count limit when counting down,and another count pulse then comes, it will jump to the upper count limit andcontinue counting from there without losing the pulse.

• The upper count limit is set at +2147483647 (231 – 1).

• The lower count limit is set at –2147483648 (–231).

Upper count limit

Lower count limit

Counter status

Time

Load value

Gate start Gate stop

Figure 2-2 Endless Counting with Gate Function

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.6.5)

• Latch function (see Section 2.6.6)

• Synchronization (see Section 2.6.7)

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Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

See Section 2.6.8.

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

See Section 2.6.8.

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Sections 2.6.8 and 2.6.9)

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2.6.2 Once-Only Counting

Definition

In this mode, the 1Count24V/100kHz counts once only, depending on the maincount direction set.

• When there is no main count direction:

– Counts as of the load value.

– Counts up or down.

– The count limits are fixed at the maximum count range.

– In the event of overflow or underflow at the respective count limit, the gate isclosed automatically.

• When the main count direction is up:

– Counts as of the load value.

– Counts up or down.

– When the upper count limit is reached, the counter jumps to the load valueand the gate is closed.

– The upper limit is parameterizable, and the load value has a RESET statusof 0 and can be changed.

• When the count direction is down:

– Counts as of the load value.

– Counts up or down.

– When the lower count limit is reached, the 1Count24V/100kHz jumps to theload value and the gate is closed.

– The lower limit is fixed at 0, and the load value is parameterizable(parameter: upper count limit) and can be changed.

The internal gate is automatically closed in the event of an overflow/underflow atthe count limits. To restart counting, you have to open the gate again.

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Uppercount limit

Lowercount limit

Counter status

Time

STS_OFLW

Gate start

Load value

STS_UFLW

STS_ND

Gate startAutomatic gate stop

0

Automatic gate stop

Figure 2-3 Once-Only Counting Without Main Count Direction; Terminating Gate Function

With an interrupting gate function, the 1Count24V/100kHz remains at theunderflow when the gate is started.

Uppercount limit

Lowercount limit

Counter status

Time

STS_OFLW

Gate start

Load value

Gate start

0

Automatic gate stop

Automatic gate stop

Figure 2-4 Once-Only Counting with Up as the Main Count Direction

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Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.6.5)

• Latch function (see Section 2.6.6)

• Synchronization (see Section 2.6.7)

Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

See Section 2.6.8.

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

See Section 2.6.8.

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Sections 2.6.8 and 2.6.9)

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2.6.3 Periodic Counting

Definition

In this mode, the 1Count24V/100kHz counts periodically, depending on the maincount direction set.

• When there is no main count direction:

– Counts as of the load value.

– Counts up or down.

– The count limits are fixed at the maximum count range.

– In the event of an overflow or underflow at the respective count limit, the1Count24V/100kHz jumps to the load value and continues counting fromthere.

• When the main count direction is up:

– Counts as of the load value.

– Counts up or down.

– The upper limit is parameterizable, and the load value has a RESET statusof 0 and can be changed.

– When the upper count limit is reached, the 1Count24V/100kHz jumps to theload value and continues counting from there.

• When the count direction is down:

– Counts as of the load value.

– Counts up or down.

– When the lower count limit is reached, the 1Count24V/100kHz jumps to theload value and continues counting from there.

– The lower limit is fixed at 0, and the load value is parameterizable(parameter: upper count limit) and can be changed.

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Upper countlimit

Counter status

Time

STS_OFLW

Gate start Gate stop

Load value

STS_UFLW

STS_ND0

Lowercount limit

Figure 2-5 Periodic Counting without a Main Count Direction

Upper count limit

Lower count limit

Counter status

Time

STS_OFLW

Gate start Gate stop

Load value

0

Figure 2-6 Periodic Counting with Up as the Main Count Direction

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.6.5)

• Latch function (see Section 2.6.6)

• Synchronization (see Section 2.6.7)

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Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

See Section 2.6.8.

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

See Section 2.6.8.

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Sections 2.6.8 and 2.6.9)

2.6.4 Behavior of the Digital Inputs

Digital Input of the 1Count24V/100kHz

The DI digital input can be operated with different sensors (P switch and seriesmode or M switch).

Note

If you have selected the 24V M switch setting for the ”Sensor A, B, DI” parameter,you must use M-switching sensors.

The level of the digital input can be inverted by parameter assignment(exception: inversion is not possible in the latch function).

To filter the input signal, you can switch on a filter depending on the minimum pulseduration or the maximum signal frequency (sensor and input filter parameter).

The STS_DI feedback bit indicates the level of the digital input.

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2.6.5 Gate Functions in Count Modes

Software Gate and Hardware Gate

The 1Count24V/100kHz has two gates

• A software gate (SW gate), which is controlled by the SW_GATE control bit.

The software gate can only be opened by a 0-to-1 edge change of theSW_GATE control bit. It is closed when this bit is reset. Note the transfer timesand run times of your control program in this connection.

• A hardware gate (HW gate), which is controlled by means of the digital input onthe 1Count24V/100kHz. You parameterize the hardware gate as a function ofthe digital input. It is opened when there is a 0-to-1 edge change at the digitalinput and closed when there is a 1-to-0 edge change.

Internal Gate

The internal gate is the logical AND of the HW gate and SW gate. Counting is onlyactive when the HW gate and the SW gate are open. The STS_GATE feedback bit(internal gate status) indicates this. If a HW gate has not been parameterized, thesetting of the SW gate is decisive. Counting is activated, interrupted, continued,and terminated by means of the internal gate. In the once-only counting mode, theinternal gate is closed automatically when there is an overflow/underflow at thecount limits.

Terminating and Interrupting Gate Function

When parameterizing the gate function, you can specify whether the internal gateis to terminate or interrupt counting. When it is terminated, after the gate is closedand reopened (gate start), counting starts again from the beginning. When it isinterrupted, after the gate is closed and reopened (gate start), counting continuesfrom the previous value

The diagrams below indicate how the interrupting and terminating gate functionwork:

Upper count limit

Lower count limit

Counter status

Time

Load value

Gate start Gate stop Gate start

Figure 2-7 Endless Counting, Up, Interrupting Gate Function

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Upper count limit

Lower count limit

Counter status

TimeGate start Gate stop Gate start

Load value

Figure 2-8 Endless Counting, Down, Terminating Gate Function

Gate Control by Means of the SW Gate Only

When the gate is opened, one of the following things occurs, depending on theparameters assigned:

– Counting continues from the current count value

or

– Counting starts at the load value

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, counting starts at To in cycle “n+1”. In the same cycle,“n+1”, the 1Count24V/100kHz delivers the current count value at the time Ti.

Gate Control by Means of the SW Gate and HW Gate

If the SW gate opens when the HW gate is already open, counting continues as ofthe current count value.

When the HW gate is opened, one of the following things occurs, depending on theparameters assigned:

– Counting continues from the current count value

or

– Counting starts at the load value

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, counting starts at the time To in cycle “n+1” if the HWgate is already open at this time. If the HW gates opens between the times To andTi in cycle “n+1”, counting only starts once the HW gate is open. In both cases, the1Count24V/100kHz delivers the current count value in cycle “n+1” as of the time Ti.

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2.6.6 Latch Function

There are two latch functions:

• Latch and retrigger

• Latching

The Latch and Retrigger Function

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Count pulses

SW_GATE

DI digital input

Counter status

Latch value

Figure 2-9 Latch and Retrigger with Load Value=0

This function stores the current internal counter status of the 1Count24V/100kHzand retriggers counting when there is an edge at the digital input. This means thatthe current internal counter status at the time of the edge is stored, and the1Count24V/100kHz is then loaded again with the load value, as of which itresumes counting.

The counter status can thus be evaluated independently of events.

The count mode must be enabled by the SW gate before the function can beexecuted. It is started at the first rising edge at the digital input.

The stored counter status rather than the current counter status is indicated at thefeedback interface. The STS_DI bit indicates the level of the latch and retriggersignal.

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The latch value is preset with its RESET status (Table 2-2 on page 2-10). It is notchanged when the SW gate is opened.

Direct loading of the counter does not cause the indicated stored counter status tobe changed.

If you close the SW gate, it only interrupts counting; this means that when youropen the SW gate again, counting is continued. The DI digital input remains activeeven when the SW gate is closed.

Counting is also latched and triggered in clocked mode at each edge on the digitalinput. The counter status that was valid at the time of the last edge before the timeTi is displayed at the feedback interface.

The Latching Function

In order to be able to use this function, you must select the DI function ”Latch on0/1 Edge” when parameterizing the digital input.

Count pulses

SW_GATE

DI digital input

Counter status

Latch value

Figure 2-10 Latch with a Load Value of 0

The counter status and latch value are preset with their RESET states (seeTable 2-2 on page 2-10).

The count function is started when the SW gate is opened. The1Count24V/100kHz begins at the load value.

The latch value is always the exact count at the time of the positive edge at the DIdigital input.

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The stored counter status rather than the current counter status is indicated at thefeedback interface. The STS_DI bit indicates the level of the latch signal.

Direct loading of the counter does not cause the indicated stored counter status tobe changed.

In clocked mode the counter status that was latched at the time of the last edgebefore the time Ti is displayed at the feedback interface.

When you close the SW gate, the effect is as when parameterized, terminating orinterrupting. The DI digital input remains active even when the SW gate is closed.

Further possible causes of parameter assignment errors with the latch function:

• DI function incorrect

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2.6.7 Synchronization

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Internal count pulses(up or down)

Digital input(zero mark)

EnableCRTL_SYN

Load value

EnableCRTL_SYN

Synchronization,once only

Synchronization,periodic

Load value

Count value

Count value

Figure 2-11 Once-Only and Periodic Synchronization

If you have parameterized synchronization, the rising edge of a reference signal atthe input sets the 1Count24V/100kHz to the load value.

You can select between once-only and periodic synchronization.

The following conditions apply:

• The count mode must have been started by the SW gate.

• The “enable synchronization CTRL_SYN” control bit must be set.

• In once-only synchronization, the first edge loads the 1Count24V/100kHz withthe load value after the enable bit is set.

• In periodic synchronization, the first edge and each subsequent edge load the1Count24V/100kHz with the load value after the enable bit is set.

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• After successful synchronization, the STS_SYN feedback bit is set. It must bereset by the RES_STS control bit.

• The signal of a bounce-free switch or the zero mark of a rotary transducer canserve as the reference signal.

• The STS_DI feedback bit indicates the level of the reference signal.

In clocked mode, the set feedback bit STS_SYN indicates that the rising edge onthe digital input was between the time Ti in the current cycle and Ti in the previouscycle.

2.6.8 Behavior of the Outputs in Count Modes

The 1Count24V/100kHz lets you store two comparison values, which are assignedto the digital outputs. The outputs can be activated, depending on the counterstatus and comparison values. The various ways of setting the behavior of theoutputs are described in this section.

The 1Count24V/100kHz has a real digital output and a virtual digital output thatexists only as a status bit at the feedback interface.

Both outputs are parameterizable.

You can change the function and the behavior of the digital outputs duringoperation. The new function takes effect immediately.

You can choose from the following functions:

• Output

• Counter status ≥ comparison value

• Counter status ≤ comparison value

• Pulse at comparison value

• Switching at comparison values (DO1 only)

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Output

You can switch the outputs on and off with the control bits SET_DO1 andSET_DO2.

The control bits CTRL_DO1 and CTRL_DO2 must be set for this.

You can query the status of the outputs with the status bits STS_DO1 andSTS_DO2 at the feedback interface.

The status bits STS_CMP1 and STS_CMP2 indicate that the relevant output is orwas switched on. These status bits retain their status until they are acknowledged.If the output is still switched, the corresponding bit is set again immediately. Thesestatus bits are also set when the control bit SET_DO1 or SET_DO2 is operatedwithout DO1 or DO2 being enabled.

Clocked mode: In clocked mode, the output DO1 is switched at the time To. Thestatus of the virtual output DO2 is reported at the time Ti.

Counter Status Comparison Value and Counter Status Comparison Value

If the comparison conditions are fulfilled, the relevant comparator switches theoutput on. The status of the output is indicated by STS_DO1 and STS_DO2.

The control bits CTRL_DO1 and CTRL_DO2 must be set for this.

The comparison result is indicated by the status bits STS_CMP1 and STS_CMP2.You cannot acknowledge and thus reset these bits until the comparison conditionsare no longer fulfilled.

Clocked mode: In clocked mode, as well, the DO1 output is switched as soon asthe comparison condition is fulfilled and is therefore independent of thePROFIBUS DP cycle. The status of the virtual output DO2 is reported at the timeTi.

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Comparison Value Reached, Pulse Output

If the counter status reaches the comparison value, the comparator switches onthe relevant digital output for the parameterized pulse duration.

The control bit CTRL_DO1 or CTRL_DO2 must be set for this.

The status bits STS_DO1 and STS_DO2 always have the status of thecorresponding digital output.

The comparison result is indicated by means of the status bit STS_CMP1 orSTS_CMP2 and cannot be reset by acknowledgment until the pulse duration haselapsed.

If a main count direction is parameterized, the comparator switches only when thecomparison value in the main count direction is reached.

If a main count direction is not parameterized, the comparator switches when thecomparison value is reached from either direction.

If the digital output is set by means of the control bit SET_DO1 or SET_DO2, it isreset when the pulse duration has elapsed.

Clocked mode: In clocked mode, as well, the DO1 output is switched as soon asthe comparison condition is fulfilled and is therefore independent of thePROFIBUS DP cycle. The status of the virtual output DO2 is reported at the timeTi.

Pulse Duration When the Comparison Value Is Reached

The pulse duration begins when the digital output is set. The inaccuracy of thepulse duration is less than 2 ms.

The pulse duration can be set to suit the actuators used. The pulse durationspecifies how long the output is to be set for. The pulse duration can bepreselected between 0 ms and 510 ms in steps of 2 ms.

If the pulse duration is 0, the output is set until the comparison condition is nolonger fulfilled. Note that the count pulse times must be greater than the minimumswitching times of the digital output.

Clocked mode: In clocked mode, as well, the DO1 output is switched as soon asthe comparison condition is fulfilled and is therefore independent of thePROFIBUS DP cycle. The status of the virtual output DO2 is reported at the timeTi.

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Switching at comparison values

The comparator switches the output when the following conditions are met:

• The two comparison values must be loaded by means of the load functionsCMP_VAL1 and CMP_VAL2.

and

• After the comparison values are loaded, enable the DO1 output withCRTL_DO1.

The following table shows you when the DO1 is switched on or off:

DO1 Is Switched On When DO1 Is Switched Off When

V2 > V1 (see Figure 2-12)

V2 ≤ counter status ≤ V1 V2 > counter statusorcounter status > V1

V2 = V1 V2 = counter status = V1 V2 ≠ counter status ≠ V1

V2 > V1 (see Figure 2-13)

V1 > counter statusorcounter status > V2

V1 ≤ counter status ≤ V2

The comparison result is indicated by the status bit STS_CMP1. You can onlyacknowledge and thus reset this bit when the comparison condition is no longerfulfilled.

There is no hysteresis in the case of this output behavior.

It is not possible to control the DO1 output with the SET_DO1 control bit in thecase of this output behavior.

Clocked mode: In clocked mode, as well, the DO1 output is switched as soon asthe comparison condition is fulfilled and is therefore independent of thePROFIBUS DP cycle. The status of the virtual output DO2 is reported at the timeTi.

Counter status

t

t

V1

DO1

V2

0

Figure 2-12 V2 < V1 at the Start of the Count

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Counter status

t

t

V2

DO1

V1

0

Figure 2-13 V2 > V1 at the Start of the Count

Setting or Changing the Function and Behavior of the DO1 Digital Output

If you want to set or change the behavior of the DO1, make sure you consider allthe parameterized dependencies, otherwise a parameter assignment error orloading error may occur.

Specific Conditions

If you parameterize switching at comparison values for DO1, you must do thefollowing:

• Set hysteresis=0

and

• Also parameterize “output” for the DO2 output

Hysteresis

A sensor can remain at a particular position and then fluctuate around this position.This status causes the counter status to fluctuate around a particular value. If thereis a comparison value in this fluctuation range, for example, the associated outputis switched on and off in accordance with the rhythm of the fluctuations. To preventswitching occurring in the case of small fluctuations, the 1Count24V/100kHz isequipped with parameterizable hysteresis. You can parameterize a range between0 and 255 (0 means hysteresis switched off).

Hysteresis also works with overflow and underflow.

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How Hysteresis Works with Counter Status Comparison Value and CounterStatus Comparison Value

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with settings of “Up” for “Main count direction” and“Switch on at counter status ≥ comparison value”.

When the comparison condition is met, hysteresis becomes active. While thehysteresis is active, the result of comparison remains unchanged.

If the count value goes outside the hysteresis range, hysteresis is no longer active.The comparator switches again according to its comparison conditions.

Countvalue

Hys0

Hys3

876543210

Figure 2-14 Example of How Hysteresis Works

Note

If the counter status is equal to the comparison value and hysteresis is active, the1Count24V/100kHz deletes the output when there is a change in count direction atthe comparison value.

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How Hysteresis Works When the Comparison Value Is Reached and the PulseDuration = 0

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with the settings “pulse when comparison value isreached”, “no main count direction” and “pulse duration = 0”.

When the comparison conditions are met, hysteresis becomes active. While thehysteresis is active, the result of comparison remains unchanged. If the countvalue goes outside the hysteresis range, hysteresis is no longer active. Thecomparator deletes the result of the comparison.

Countvalue

Hys0

Hys3

876543210

Figure 2-15 Example of How Hysteresis Works

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How Hysteresis Works When the Comparison Value Is Reached, Output PulseDuration

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with the settings “pulse when comparison value isreached”, “no main count direction” and “pulse duration > 0”.

When the comparison conditions have been met, hysteresis becomes active and apulse of the duration indicated in the parameters is output.

If the count value goes outside the hysteresis range, hysteresis is no longer active.

When hysteresis becomes active, the 1Count24V/100kHz stores the countdirection.

If the hysteresis range is exited in a different direction to the one stored, a pulse isoutput.

Countvalue

Hys0

Hys3

876543210

Figure 2-16 Example of How Hysteresis Works

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Control of the Outputs Simultaneously to the Comparators

If you selected a comparison function for the outputs, you can continue to controlthe outputs with SET_DO1 or SET_DO2. In this manner, you can simulate theeffect of the comparison functions by means of your control program:

• The output is set by the positive edge of SET_DO1 or SET_DO2. If youspecified that a pulse is to be output when the comparison value is reached,only one pulse of the specified duration is output. For pulse duration = 0, theoutput can be set with SET_DO1 or SET_DO2, as long as the count value is atthe comparison value or hysteresis is active. The SET_DO1 control bit is notpermitted in the case of switching at comparison values.

• A negative edge of SET_DO1 or SET_DO2 resets the output.

Note that the comparators continue to be active and can set or reset the output ifthere is a change in the comparison result.

Note

An output set by SET_DO1 or SET_DO2 is not reset at the comparison value bythe comparator.

Loading the Comparison Values

Pass the comparison values to the 1Count24V/100kHz. Counting is not affected bythis.

Valid Range for the Two Comparison Values

Main Count Direction:None

Main Count Direction:Up

Main Count Direction:Down

Lower count limitto upper count limit

–2147483648toupper count limit –1

1to2147483647

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Changing the Function and Behavior of the Digital Outputs

You can change the functions and behavior of the outputs during operation bymeans of the control interface. When you do this, the 1Count24V/100kHz deletesthe outputs and accepts the values as follows:

• Function of the digital outputs DO1 and DO2: If you change the function suchthat the comparison condition is fulfilled, the output is not changed until after thenext count pulse. However, if hysteresis is active, the 1Count24V/100kHz doesnot make any change to the output.

• Hysteresis: An active hysteresis (see How Hysteresis Works ...) remains activeafter the change. The new range of hysteresis is applied the next time thecomparison value is reached.

• Pulse duration: The new pulse duration takes effect with the next pulse.

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2.6.9 Assignment of the Feedback and Control Interface for theCount Modes

Note

The following data of the control and feedback interfaces are consistent for the1Count24V/100kHz:

• Bytes 0 to 3

• Bytes 4 to 7

Use the access or addressing mode for data consistency over the entire controland feedback interface on your DP master (only for configuration using the DDBfile).

Table 2-3 Feedback Interface (Inputs)

Address Assignment Designation

Bytes 0 to 3 Count value or stored count value in the case of the latch function atthe digital input

Byte 4 Bit 7: Short circuit of the sensor supply

Bit 6: Short circuit / wire break / overtemperature

Bit 5: Parameter assignment error

Bit 4: Reserve = 0

Bit 3: Reserve = 0

Bit 2: Resetting of status bit active

Bit 1: Load function error

Bit 0: Load function active

ERR_24V

ERR_DO1

ERR_PARA

RES_STS_A

ERR_LOAD

STS_LOAD

Byte 5 Bit 7: Down direction status

Bit 6: Up direction status

Bit 5: Reserve = 0

Bit 4: DO2 status

Bit 3: DO1 status

Bit 2: Reserve = 0

Bit 1: DI status

Bit 0: Internal gate status

STS_C_DN

STS_C_UP

STS_DO2

STS_DO1

STS_DI

STS_GATE

Byte 6 Bit 7: Zero-crossing in the count range in counting without a main counting direction

Bit 6: Lower count limit

Bit 5: Upper count limit

Bit 4: Comparator 2 status

Bit 3: Comparator 1 status

Bit 2: Reserve = 0

Bit 1: Reserve = 0

Bit 0: Synchronization status

STS_ND

STS_UFLW

STS_OFLW

STS_CMP2

STS_CMP1

STS_SYN

Byte 7 Reserve = 0

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Table 2-4 Control Interface (Outputs)

Address Assignment

Bytes 0 to 3 Load Value Direct, Preparatory, Comparison Value 1 or 2

Byte 0 Behavior of DO1, DO2 of the 1Count24V/100kHz

Bit 2 Bit 1 Bit 0 Function of DO1

0 0 0 Output

0 0 1 Activation at a counter status ≥ the comparison value

0 1 0 Activation at a counter status ≤ the comparison value

0 1 1 Pulse on reaching the comparison value

1 0 0 Switching at comparison values

1 0 1 Disabled

1 1 0 Disabled

1 1 1 Disabled

Bit 5 Bit 4 Function of DO2

0 0 Output

0 1 Activation at a counter status ≥ the comparison value

1 0 Activation at a counter status ≤ the comparison value

1 1 Pulse on reaching the comparison value

Bytes 1 to 3 Byte 1: Hysteresis DO1, DO2 (range 0 to 255)

Byte 2: Pulse duration [2 ms] DO1, DO2 (range 0 to 255)

Byte 3: Reserve = 0

Byte 4 EXTF_ACK

CTRL_DO2

SET_DO2

CTRL_DO1

SET_DO1

RES_STS

CTRL_SYN

SW_GATE

Bit 7: Diagnostic error acknowledgment

Bit 6: Enable DO2

Bit 5: DO2 control bit

Bit 4: Enable DO1

Bit 3: DO1 control bit

Bit 2: Start resetting of status bit

Bit 1: Enable synchronization

Bit 0: SW gate control bit

Byte 5

C_DOPARAM

CMP_VAL2

CMP_VAL1

LOAD_PREPARE

LOAD_VAL

Bit 7: Reserve = 0

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Change function and behavior of DO1, DO2

Bit 3: Load comparison value 2

Bit 2: Load comparison value 1

Bit 1: Load counter (preparatory)

Bit 0: Load counter (direct)

Bytes 6 to 7 Reserve = 0

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Notes on the Control Bits

Control Bits Notes

C_DOPARAM Change function and behavior of DO1, DO2 (see Figure 2-18)

The values from bytes 0 to 2 are accepted as new function, hysteresis, and pulse duration of DO1,DO2. This may result in the following error: The conditions for switching at comparison values arenot fulfilled.

CMP_VAL1 Load comparison value 1 (see Figure 2-18)

The value from bytes 0 to 3 is transferred to comparison value 1 by means of the control bit “Loadcomparison value 1 – CMP_VAL1”.

CMP_VAL2 Load comparison value 2 (see Figure 2-18)

The value from bytes 0 to 3 is transferred to comparison value 2 by means of the control bit “Loadcomparison value 2 – CMP_VAL2”.

CTRL_DO1 Enable DO1

You use this bit to enable the DO1 output.

CTRL_DO2 Enable DO2

You use this bit to enable the DO2 output.

CTRL_SYN You use this bit to enable synchronization.

EXTF_ACK Error acknowledgment

The error bits must be acknowledged by means of the control bit EXTF_ACK after the cause isremoved. (see Figure 2-20)

LOAD_PREPARE Load counter – preparatory (see Figure 2-18)

The value from bytes 0 to 3 is adopted as the load value.

LOAD_VAL The value from bytes 0 to 3 is loaded directly as the new counter value (see Figure 2-18).

RES_STS Start resetting of status bit

The status bits are reset by means of the acknowledgment process between the RES_STS bit andthe RES_STS_A bit. (See Figure 2-25)

SET_DO1 DO1 control bit

Switches the DO1 digital output on and off when CTRL_DO1 is set.

SET_DO2 DO2 control bit

Switches the DO2 digital output on and off when CTRL_DO2 is set.

SW_GATE SW gate control bit

The SW gate is opened/closed by means of the control interface with the SW_GATE bit.

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Notes on the Feedback Bits

Feedback Bits Notes

ERR_24V Short circuit of the sensor supply

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 2-28).Diagnostic message, if parameterized.

ERR_DO1 Short circuit/wire break/overtemperature at output DO1

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 2-28).Diagnostic message, if parameterized.

ERR_LOAD Load function error (see Figure 2-18)

The bits LOAD_VAL, LOAD_PREPARE, CMP_VAL1, CMP_VAL2, and C_DOPARAM cannot beset simultaneously during transfer. This results in setting the ERR_LOAD status bit, similar toloading an incorrect value (which is not accepted).

ERR_PARA Parameter assignment error – ERR_PARA

RES_STS_A Resetting of the status bits active (see Figure 2-17)

STS_C_DN Down direction status

STS_C_UP Up direction status

STS_CMP1 Comparator 1 status

The STS_CMP1 status bit indicates that the output is or was switched on. It must be acknowledgedby means of the RES_STS control bit. If the status bit is acknowledged when the output is stillswitched on, the bit is set again immediately. This bit is also set if the SET_DO1 control bit is usedwhen DO1 is not enabled.

STS_CMP2 Comparator 2 status

The STS_CMP2 status bit indicates that the output is or was switched on. It must be acknowledgedby means of the RES_STS control bit. If the status bit is acknowledged when the output is stillswitched on, the bit is set again immediately. This bit is also set if the SET_DO2 control bit is usedwhen DO2 is not enabled.

STS_DI DI status

The status of the DI is indicated in all modes by means of the STS_DI bit at the feedback interface.

STS_DO1 DO1 status

The STS_DO1 status bit indicates the status of the DO1 digital output.

STS_DO2 DO2 status

The STS_DO2 status bit indicates the status of the virtual DO2 digital output.

STS_GATE Internal gate status: Counting

STS_LOAD Load function active (see Figure 2-18)

STS_ND Zero-crossing in the count range in counting without a main counting direction. The bit must bereset by means of the RES_STS control bit.

STS_OFLW

STS_UFLW

Upper count limit violated

Lower count limit violated

Both bits must be reset.

STS_SYN Synchronization status

After successful synchronization, the STS_SYN bit is set. It must be reset by the RES_STS controlbit.

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Access to the Control and Feedback Interface in STEP 7 Programming

Configuration with STEP 7 Using the DDB File 1)

(Hardware Catalog\PROFIBUS DP\Additional FIELD DEVICES\I/O\ET 200S)

Configuration with STEP 7 Using HWCONFIG

(Hardware Catalog\PROFIBUS DP\ET 200S)

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

Control interface Write with SFC 15 “DPWR_DAT” Transfer instruction (e.g. T PQD)

1 Load and transfer commands are also possible with CPU 3xxC, CPU 318-2 (as of V3.0), CPU 4xx (as of V3.0) andWinLC RTX (PC CPU).

Resetting of the Status Bits STS_SYN, STS_CMP1, STS_CMP2, STS_OFLW, STS_UFLW, STS_ND

Feedback signals:One of the statusbits

t

Control bit:RES_STS

Feedback bit:RES_STS_A

Event still pending at reset

Request reset

The 1Count24V/100kHz executes resetting

Removal of the request

Reset executed

Figure 2-17 Resetting of Status Bits

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Acceptance of Values with the Load Function

Error bit:ERR_LOAD

Request value transfer and make value available.

t

Remove request and keep value available.

Value accepted. End of transfer

The 1Count24V/100kHz has understood the request

Control bit:LOAD_VALLOAD_PREPARECMP_VAL1CMP_VAL2C_DOPARAM

Feedback bit:STS_LOAD

Figure 2-18 Acceptance of Values with the Load Function

Note

Only one of the following control bits can be set at a particular time:

CMP_VAL1 or CMP_VAL2 or LOAD_VAL or LOAD_PREPARE or C_DOPARAM.

Otherwise, the ERR_LOAD error is reported until all the specified control bits aredeleted again.

The ERR_LOAD error bit is only deleted when the following operation is carriedout correctly.

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Acknowledgment in Clocked Mode

In clocked mode exactly 4 PROFIBUS DP cycles are required to reset the statusbits and to accept values during the load function.

Status bit of the mo-dule

Control bitin the userprogram

1st DP cycle 4th DP cycle3rd DP cycle2nd DP cycle

Ti Ti

TDP TDPTDPTDPTDP

TiTi Ti

Figure 2-19 Acknowledgment in Clocked Mode

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Error Detection

The program errors must be acknowledged. They have been detected by the1Count24V/100kHz and are indicated at the feedback interface. A channel-specificdiagnosis is carried out if you have enabled group diagnosis at parameterassignment (see Chapter 6 of the ET 200S Distributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

An error has occurred, the 1Count24V/100kHzsets an error bit, a diagnostic message may ap-pear, error detection continues.

Error eliminated; when EXTF_ACK is set by the user pro-gram, the 1Count24V/100kHz deletes the error bit; a dia-gnostic message may appear.

Error acknowledgmentEXTF_ACK

Error bit ERR_ 24V,for example

Figure 2-20 Error Acknowledgment

In the case of continuous error acknowledgment (EXTF_ACK=1) or at CPU/MasterStop, the 1Count24V/100kHz reports the errors as soon as they are detected anddeletes them as soon as they have been eliminated.

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2.6.10 Parameter Assignment for the Count Modes

You can parameterize the 1Count24V/100kHz with one of the following:

– Using a DDB file (http://www.ad.siemens.de/csi/gsd)

– With STEP 7 as of V5.1 SP4

Parameter List for Count Modes

Parameters Value Range Default

Enable

Group diagnosis Disable/enable Disable

Behavior in the Event of the Parent Controller Failing

Reaction toCPU-Master-STOP

Turn off DO1/Continue working mode/DO1 substitute a value/DO1 keep last value

Turn off DO1

Sensor Parameters

Signal evaluation A, B Pulse and direction/Rotary transducer (single/dual/quad)

Pulse and direction

Sensor and input filter

• At count input(track A)

• At direction input (track B)

• At digital input DI

2.5 s/25 s

2.5 s/25 s

2.5 s/25 s

2.5 s

2.5 s

2.5 s

Sensor A, B, DI 24V P switch, series-mode/24V M switch

24V P switch,series-mode

Direction input B Normal/Inverted Normal

Output Parameters

Function DO1 Output/Switch on at counter status ≥comparison value/Switch on at counter status≤ comparison value/Pulse on reaching the comparison value/Switch at comparison values

Output

Function DO2 Output/Switch on at counter status ≥ comparison value/Switch on at counter status ≤ comparison value/Pulse on reaching the comparison value

Output

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Parameters DefaultValue Range

Substitute value DO1 0/1 0

Diagnostics DO11 Off/on Off

Hysteresis DO1, DO2 0 to 255 0

Pulse duration [2 ms] DO1,DO2

0 to 255 0

Mode

Count mode Endless counting/Once-only counting/Periodic counting

Endless Counting

Gate function Terminate counting/Interrupt counting

Terminate counting

Input signal HW gate Normal/Inverted Normal

Function DI Input/HW gate/Latch and retrigger at rising edge/ Synchronization at rising edge

Input

Synchronization2 Once only/Periodic Once

Main Count Direction None/Up/Down None

Upper count limit 2 to 7FFF FFFF 7FFF FFFF

1 DO1 diagnostics (wire break, short circuit) is possible only with pulse lengths of > 90 ms at digital outputDO1.

2 Only relevant if the function DI = Synchronization at positive edge

Parameter Assignment Error

• Incorrect mode

• Incorrect main count direction

• The HW gate input signal parameter is set to inverted and the DI functionparameter is not set to HW gate.

• Upper count limit incorrect

• The value for the behavior of DO2 is not set to output although switching atcomparison values has been parameterized for DO1.

• The value for hysteresis does not equal 0 although switching at comparisonvalues has been parameterized for DO1.

What to Do in the Event of Errors

Check the set value ranges.

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2.7 Measurement Modes

You can choose between the following modes:

• Frequency measurement

• Period measurement

• Rotational speed measurement

To execute one of these modes, you have to parameterize the 1Count24V/100kHz.(See Section 2.7.7)

Measurement Process

The measurement is carried out during the parameterized integration time. Whenthe integration time elapses, the measured value is updated.

The end of a measurement is indicated by the STS_CMP1 status bit. This bit isreset by the RES_STS control bit at the control interface.

If there were not at least two rising edges in the parameterized integration time, 0is returned as the measured value.

A value of –1 is returned by the end of the first integration time.

You can change the integration time for the next measurement during operation.

Reversal of the Direction of Rotation

If the direction of rotation is reversed during an integration time, the measuredvalue for this measurement period is uncertain. If you evaluate the STS_C_UP andSTS_C_DN feedback bits (direction evaluation), you can respond to any processirregularities.

Gate Control

To control the 1Count24V/100kHz, you have to use the gate functions.

Clocked Mode

In clocked mode the 1Count24V/100kHz accepts the control bits and controlvalues from the control interface in each PROFIBUS DP cycle and reports backthe response to them in the same cycle.

In each cycle the 1Count24V/100kHz transfers a measured value and the statusbits that were valid at the time Ti.

The measurement starts and ends at the time Ti.

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Integration Time in Clocked Mode

If the integration time lasts several TDP cycles, you can recognize the newmeasurement value in the user program at the status bit STS_CMP1(measurement completed) of the feedback interface. This makes it possible tomonitor the measurement procedure or for it to be synchronized. It takes 4 TDPcycles, however, for this message to be acknowledged. The minimum integrationtime in this case is (4 × TDP).

If the application can tolerate a jitter in the integration time of a TDP and ameasured value that remains constant for several cycles, you don’t have tocontinually evaluate the status bit STS_CMP1. Integration times of (1 × TDP) to (3 × TDP) are then possible.

Because clocking was lost in the last TDP cycle of the integration time, theintegration time is increased by one TDP cycle. This does not corrupt the measuredvalue.

Note

You must not exceed the range limits for the integration time (see Tables 2-5, 2-6and 2-7 on pages 2-47, 2-49 and 2-51).

A violation of the value range limits will result in a parameter assignment error, andthe 1Count24V/100kHz will not go into clocked mode.

Note

When you change the configuration from non-clocked to clocked mode and viceversa, you must always adjust the integration time parameter if you want to retainthe length of the integration time.

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2.7.1 Frequency Measurement

Definition

In frequency measurement mode, the 1Count24V/100kHz counts the pulses thatarrive within a set integration time.

Integration Time

Preset the integration time with the integration time parameter (see Table 2-5).

Table 2-5 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 1000

TDP < 10 ms n × TDP ( 10 ms/TDP [ms] ) +1 1 1000Clocked mode

TDP ≥ 10 ms n × TDP 1 10000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count24V/100kHz generates aparameterization error and will not go into clocked mode.

Frequency Measurement

The value of the frequency determined is made available in the unit Hz*10 –3. Youcan read the measured frequency value at the feedback interface (bytes 0 to 3).

Count pulses

Internal gate

Beginning of frequencymeasurement

Integration time

End of frequencymeasurement

Integration time

Figure 2-21 Frequency Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Lower Limit fu Upper Limit fo

0 to 99,999,999 Hz*10–3 fu+1 to 100,000,000 Hz*10–3

Possible Measurement Ranges with Error Indication

Integration time fmin absolute error fmax absolute error

10 s 0.1 Hz ± 0.001 Hz 100000 Hz ± 18 Hz

1 s 1 Hz ± 0.001 Hz 100000 Hz ± 11 Hz

0.1 s 10 Hz ± 0.002 Hz 100000 Hz ± 10 Hz

0.01 s 100 Hz ± 0.013 Hz 100000 Hz ± 13 Hz

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.7.4)

Function of the DO1 Digital Output

Select one of the following functions for the DO1 digital output:

• Output (no switching through limit-value monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 2.7.5)

Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 2.7.5 and 2.7.6)

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2.7.2 Rotational Speed Measurement

Definition

In rotational speed measurement mode, the 1Count24V/100kHz counts the pulsesthat arrive from a rotational speed sensor within a set integration time andcalculates the speed of the connected motor.

Integration Time

Preset the integration time with the integration time parameter (see Table 2-6).

Table 2-6 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 1000

TDP < 10 ms n × TDP ( 10 ms/TDP [ms] ) +1 1 1000Clocked mode

TDP ≥ 10 ms n × TDP 1 10000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count24V/100kHz generates aparameterization error and will not go into clocked mode.

Rotational Speed Measurement

For rotational speed measurement mode, you also have to parameterize thepulses per sensor or motor revolution.

The rotational speed is returned in the unit 1x10–3rpm.

Count pulses

Internal gate

Beginning of rotationalspeed measurement

End of rotationalspeed measurement

Integration time Integration time

Figure 2-22 Rotational Speed Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Lower limit nu Upper limit no

0 to 24999999 x10–3/min nu+1 to 25000000 x10–3/min

Possible Measurement Ranges with Error Indication(Number of Pulses per Encoder Revolution = 60)

Integration time nmin absolute error nmax absolute error

10 s 1 /min ± 0.03 /min 25000 /min ± 4.5 /min

1 s 1 /min ± 0.03 /min 25000 /min ± 2.8 /min

0.1 s 10 /min ± 0.03 /min 25000 /min ± 2.6 /min

0.01 s 100 /min ± 0.04 /min 25000 /min ± 3.2 /min

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.7.4)

Function of the DO1 Digital Output

Select one of the following functions for the DO1 digital output:

• Output (not switched by limit-value monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 2.7.5)

Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 2.7.5 and 2.7.6)

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2.7.3 Period Measurement

Definition

In period measurement mode, the 1Count24V/100kHz measures the time betweentwo rising edges of the count signal by counting the pulses of an internalquartz-accurate reference frequency (16 MHz) within a set integration time.

Integration time

Preset the integration time with the integration time parameter (see Table 2-7).

Table 2-7 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 12000

TDP < 10 ms n × TDP 10 ms/TDP [ms] +1 1 12000Clocked mode

TDP ≥ 10 ms n × TDP 1 120000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count24V/100kHz generates aparameterization error and will not go into clocked mode.

Period Measurement

The value of the determined period duration is made available in the unit 1 s and1/16 s. You can read the measured period at the feedback interface (bytes 0 to3).

Count pulses

Internal gate

Start of period measurement End of period measurement

Period

Integration time Integration time

Figure 2-23 Period Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Resolution 1 s

Lower Limit Tu Upper Limit To

0 to 119999999 s Tu+1 to 120000000 s

Resolution 1/16 s

Lower Limit Tu Upper Limit To

0 to 1919999999 s Tu+1 to 1920000000 s

Possible Measurement Ranges with Error Indication

Resolution 1s

Integration time Tmin ± absolute error T ± absolute error

100 s 1 µs* (10 ± 0) 1 µs* (100000000 ± 10000)

10 s 1 µs* (10 ± 0) 1 µs* (10000000 ± 1000)

1 s 1 µs* (10 ± 0) 1 µs* (1000000 ± 100)

0.1 s 1 µs* (10 ± 0) 1 µs* (100000 ± 10)

0.01 s 1 µs* (10 ± 0) 1 µs* (10000 ± 1)

Resolution 1/16 s

Integration time Tmin ± absolute error T ± absolute error

100 s 1/16 µs* (160 ± 0) 1/16 µs* (1600000000 ± 160000)

10 s 1/16 µs* (160 ± 0) 1/16 µs* (160000000 ± 16000)

1 s 1/16 µs* (160 ± 0) 1/16 µs* (16000000 ± 1600)

0.1 s 1/16 µs* (160 ± 0) 1/16 µs* (1600000 ± 160)

0.01 s 1/16 µs* (160 ± 0) 1/16 µs* (160000 ± 16)

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 2.7.4)

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Function of the DO1 Digital Output

Select one of the following functions for the digital output:

• Output (not switched by limit-value monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 2.7.5)

Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 2.7.5 and 2.7.6)

2.7.4 Gate Functions in Measurement Modes

Software Gate and Hardware Gate

The 1Count24V/100kHz has two gates

• A software gate (SW gate), which is controlled by the SW_GATE control bit.

The software gate can only be opened by a 0-to-1 edge change of theSW_GATE control bit. It is closed when this bit is reset. Note the transfer timesand run times of your control program in this connection.

• A hardware gate (HW gate) that is controlled by means of the digital input onthe 1Count24V/100kHz. You parameterize the hardware gate as a function ofthe digital input. It is opened when there is a 0-to-1 edge change at the digitalinput and closed when there is a 1-to-0 edge change.

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Internal Gate

The internal gate is the logical AND of the HW gate and SW gate. Counting is onlyactive when the HW gate and the SW gate are open. The STS_GATE feedback bit(internal gate status) indicates this. If a HW gate has not been parameterized, thesetting of the SW gate is decisive.

Gate Control by Means of the SW Gate Only

The opening/closing of the SW gate starts/stops measurement.

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, the measurement starts at the time Ti in cycle “n+1”.

Gate Control by Means of the SW Gate and HW Gate

The opening and closing of the SW gate with the HW gate open starts/stopsmeasurement.

The opening and closing of the HW gate with the SW gate open starts/stopsmeasurement.

The SW gate is opened/closed by means of the control interface with theSW_GATE bit.

The HW gate is opened/closed by means of a 24-V signal at the digital input.

In clocked mode, when the SW gate is open, the measurement starts at the timeTi, immediately after the HW gate has opened. The measurement ends at the timeTi that occurs immediately after the HW gate has closed.

When the HW gate is open, the measurement starts at the time Ti in the cycle,immediately after the SW has opened, and ends at the time Ti in the cycle thatoccurs immediately after the SW gate has closed.

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2.7.5 Behavior of the Output in Measurement Modes

The various ways of setting the behavior of the output are described in this section.

You can assign parameters to the digital output of the 1Count24V/100kHz.

You can store an upper and a lower limit for frequency measurement, rotationalspeed measurement or period measurement. If the limits are violated, the DO1digital output is activated. These limit values can be parameterized and changedwith the load function.

You can change the function and the behavior of the digital output duringoperation. The new function takes effect immediately. In clocked mode it alwaystakes effect at the time Ti.

You can choose from the following functions:

• Output

• Measured value outside the limits (limit-value monitoring)

• Measured value under the lower limit (limit-value monitoring)

• Measured value over the upper limit (limit-value monitoring)

Output

If you want to switch the output on or off, you must enable it with the CTRL_DO1control bit.

You can switch the output on and off with the SET_DO1 control bit.

You can query the status of the output with the STS_DO1 status bit in thefeedback interface.

In clocked mode, the output switches at the time To.

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Limit-Value Monitoring

Gate start

0

Measured valueLower limit Upper limit

UFLW OFLW

Figure 2-24 Limit-Value Monitoring

After the integration time elapses, the measured value obtained (frequency,rotational speed, or period) is compared with the parameterized limit values.

If the current measured value is under the parameterized lower limit (measuredvalue < lower limit), the STS_UFLW = 1 bit is set in the feedback interface.

If the current measured value is over the parameterized upper limit (measuredvalue > upper limit), the STS_OFLW = 1 bit is set in the feedback interface.

You must acknowledge these bits by means of the RES_STS control bit.

If the measured value is still outside or again outside the limits afteracknowledgment, the corresponding status bit is set again.

If you set the lower limit at 0, you switch off dynamic monitoring of violation of thelower limit value.

Depending on the parameterization, the enabled digital output DO1 can be set bymeans of limit-value monitoring:

“Function DO1” Parameter DO1 is Set ...

Measured value outside the limits Measured value < lower limit ORMeasured value > upper limit

Measured value under the lower limit Measured value < lower limit

Measured value over the upper limit Measured value > upper limit

In clocked mode the output is switched at the end of measurement at the time Ti.

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2.7.6 Assignment of the Feedback and Control Interfaces for theMeasurement Modes

Note

The following data of the control and feedback interfaces are consistent for the1Count24V/100kHz:

• Bytes 0 to 3

• Bytes 4 to 7

Use the access or addressing mode for data consistency over the entire controland feedback interface on your DP master (only for configuration using the DDBfile).

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Table 2-8 Feedback Interface (Inputs)

Address Assignment Designation

Bytes 0 to 3 Measured value

Byte 4 Bit 7: Short circuit of the sensor supply

Bit 6: Short circuit / wire break / overtemperature

Bit 5: Parameter assignment error

Bit 4: Reserve = 0

Bit 3: Reserve = 0

Bit 2: Resetting of status bit active

Bit 1: Load function error

Bit 0: Load function active

ERR_24V

ERR_DO

ERR_PARA

RES_STS_A

ERR_LOAD

STS_LOAD

Byte 5 Bit 7: Down direction status

Bit 6: Up direction status

Bit 5: Reserve = 0

Bit 4: Reserve = 0

Bit 3: DO1 status

Bit 2: Reserve = 0

Bit 1: DI status

Bit 0: Internal gate status

STS_C_DN

STS_C_UP

STS_DO1

STS_DI

STS_GATE

Byte 6 Bit 7: Reserve = 0

Bit 6: Measurement range lower limit

Bit 5: Measurement range upper limit

Bit 4: Reserve = 0

Bit 3: Measurement completed

Bit 2: Reserve = 0

Bit 1: Reserve = 0

Bit 0: Reserve = 0

STS_UFLW

STS_OFLW

STS_CMP1

Byte 7 Reserve = 0

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Table 2-9 Control Interface (Outputs)

Address Assignment

Bytes 0 to 3 Lower limit or upper limit

Function of DO1

Byte 0: Bit 1 Bit 0 Function of DO1

0 0 Output

0 1 Measured value outside the limits

1 0 Measured value under the lower limit

1 1 Measured value over the upper limit

Bytes 1 to 3: Reserve = 0

Integration time

Byte 0, 1: Integration time [n*10ms]

(Range 1...1000/12000)

Byte 2/3: Reserve = 0

Byte 4 Bit 7: Diagnostic error acknowledgment – EXTF_ACK

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Enable DO1 – CTRL_DO1

Bit 3: DO1 control bit – SET_DO1

Bit 2: Start resetting of status bit – RES_STS

Bit 1: Reserve = 0

Bit 0: SW gate control bit – SW_GATE

Byte 5 Bit 7: Reserve = 0

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Change function of DO1, C_DOPARAM

Bit 3: Reserve = 0

Bit 2: Change integration time, C_INTTIME

Bit 1: Load upper limit – LOAD_PREPARE

Bit 0: Load lower limit – LOAD_VAL

Bytes 6 to 7 Reserve = 0

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Notes on the Control Bits

Control Bits Notes

C_DOPARAM Change function of DO1 (see Figure 2-26)

The value from byte 0 is adopted as the new function of DO1.

C_INTTIME Change integration time (see Figure 2-26)

The value from bytes 0 and 1 is adopted as the new integration time for the next measurement.

CTRL_DO1 Enable DO1

You use this bit to enable the DO1 output.

EXTF_ACK Error acknowledgment

The error bits must be acknowledged by means of the control bit EXTF_ACK after the cause isremoved. (see Figure 2-28)

LOAD_PREPARE Load upper limit (see Figure 2-26)

The value from bytes 0 to 3 is adopted as the new upper limit.

LOAD_VAL Load lower limit (see Figure 2-26)

The value from bytes 0 to 3 is adopted as the new lower limit.

RES_STS Start resetting of status bit

The status bits are reset by means of the acknowledgment process between the RES_STS bit andthe RES_STS_A bit. (See Figure 2-25)

SET_DO1 DO1 control bit

Switches the DO1 digital output on and off when CTRL_DO1 is set.

SW_GATE SW gate control bit

The SW gate is opened/closed by means of the control interface with the SW_GATE bit.

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Notes on the Feedback Bits

Feedback Bits Notes

ERR_24V Short circuit of the sensor supply

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 2-28).Diagnostic message, if assigned as parameter.

ERR_DO1 Short circuit/wire break/overtemperature at output DO1

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 2-28).Diagnostic message, if assigned as parameter.

ERR_LOAD Load function error (see Figure 2-26)

The bits LOAD_VAL, LOAD_PREPARE, C_DOPARAM, and C_INTTIME cannot be setsimultaneously during transfer. This results in setting the ERR_LOAD status bit, similar to loadingan incorrect value (which is not accepted).

ERR_PARA Parameter assignment error – ERR_PARA

RES_STS_A Resetting of the status bits active (see Figure 2-25)

STS_C_DN Down direction status

STS_C_UP Up direction status

STS_CMP1 Measurement completed

The measured value is updated after every interval that elapses. The end of a measurement (afterthe interval has elapsed) is indicated by means of the STS_CMP1 status bit. This bit is reset by theRES_STS control bit at the control interface.

STS_DI DI status

The status of the DI is indicated in all modes by means of the STS_DI bit at the feedback interface.

STS_DO1 DO1 status

STS_GATE Internal gate status: Measuring

STS_LOAD Load function running (see Figure 2-26)

STS_OFLW

STS_UFLW

Upper measurement limit violated

Lower measurement limit violated

Both bits must be reset.

Access to the Control and Feedback Interface in STEP 7 Programming

Configuration with STEP 7 Using the DDB File 1)

(Hardware Catalog\PROFIBUS DP\Additional FIELD DEVICES\I/O\ET 200S)

Configuration with STEP 7 Using HWCONFIG

(Hardware Catalog\PROFIBUS DP\ET 200S)

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

Control interface Write with SFC 15 “DPWR_DAT” Transfer instruction (e.g. T PQD)

1 Load and transfer commands are also possible with CPU 3xxC, CPU 318-2 (as of V3.0), CPU 4xx (as of V3.0) andWinLC RTX (PC CPU).

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Resetting of the Status Bits STS_CMP1, STS_OFLW, STS_UFLW

Feedback signals:One of the statusbits

t

Control bit:RES_STS

Feedback bit:RES_STS_A

Event still pending at reset

Request reset

The 1Count24V/100kHz executes resetting

Removal of the request

Reset executed

Figure 2-25 Resetting of Status Bits

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Acceptance of Values with the Load Function

Error bit:ERR_LOAD

Request value transfer and make value available.

t

Remove request and keep value available.

Value accepted. End of transfer

The 1Count24V/100kHz has understood the request

Control bit:LOAD_VALLOAD_PREPAREC_DOPARAMC_INTTIME

Feedback bit:STS_LOAD

Figure 2-26 Acceptance of Values with the Load Function

Note

Only one of the following control bits can be set at a particular time:

LOAD_VAL or LOAD_PREPARE or C_DOPARAM or C_INTTIME.

Otherwise, the ERR_LOAD error is reported until all the specified control bits aredeleted again.

The ERR_LOAD error bit is only deleted when a correct value is transferred asfollows.

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Acknowledgment in Clocked Mode

In clocked mode exactly 4 PROFIBUS DP cycles are required to reset the statusbits and to accept values with the load function.

Status bit of the mo-dule

Control bitin the userprogram

1st DP cycle 4th DP cycle3rd DP cycle2nd DP cycle

Ti Ti

TDP TDPTDPTDPTDP

TiTi Ti

Figure 2-27 Acknowledgment in Clocked Mode

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Error Detection

The diagnostic errors must be acknowledged. They have been detected by the1Count24V/100kHz and are indicated at the feedback interface. A channel-specificdiagnosis is carried out after you have enabled group diagnosis at parameterassignment (see Chapter 6 of the ET 200S Distributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

An error has occurred, the 1Count24V/100kHzsets an error bit, a diagnostic message may ap-pear, error detection continues.

Error eliminated; when EXTF_ACK is set by the user pro-gram, the 1Count24V/100kHz deletes the error bit; a diagno-stic message may appear.

Error acknowledgmentEXTF_ACK

Error bit ERR_24V,for example

Figure 2-28 Error Acknowledgment

In the case of continuous error acknowledgment (EXTF_ACK=1) or at CPU/MasterStop, the 1Count24V/100kHz reports the errors as soon as they are detected anddeletes them as soon as they have been eliminated.

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2.7.7 Parameter Assignment for Measurement Modes

You can parameterize the 1Count24V/100kHz with one of the following:

– Using a DDB file (http://www.ad.siemens.de/csi/gsd)

– With STEP 7 as of V5.1 SP4

Parameter List for Measurement Modes

Parameters Value Range Default

Enable

Group diagnosis Disable/enable Disable

Behavior in the Event of the Parent Controller Failing

Reaction to CPU-Master-STOP Turn off DO1/Continue working mode/DO1 substitute a value/DO1 keep last value

Turn off DO1

Sensor Parameters

Signal evaluation A, B Pulse and direction/Rotary transducer (single)

Pulse and direction

Sensor and input filter

– At count input (track A)

– At direction input (track B)

– At digital input DI

2.5 s/25 s

2.5 s/25 s

2.5 s/25 s

2.5 s

2.5 s

2.5 s

Sensor A, B, DI 24V P switch, series-mode/24V M switch

24V P switch, series-mode

Direction input B Normal/Inverted Normal

Output Parameters

Diagnostics DO11 Off/on Off

Function DO1 Output/Outside the limits/Under the lower limit/Over the upper limit

Output

Substitute value DO1 0/1 0

1 DO1 diagnostics (wire break, short circuit) is possible only with pulse lengths of > 90 ms at digital outputDO1.

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Parameters Value Range Default

Mode

Measurement mode Frequency measurement/Rotational speed measurement/Period measurement

Frequency measurement

Resolution of period 1 s

1/16 s

1 s

Function DI Input/HW gate Input

Input signal HW gate Normal/Inverted Normal

Low limit Frequency measurement:0 to fmax–1

Rotational speed measurement:0 to nmax–1

Period measurement:0 to tmax–1

0

0

0

High limit Frequency measurement:Lower limit + 1 to fmax

Rotational speed measurement:Lower limit + 1 to nmax

Period measurement:Lower limit + 1 to tmax

fmax

nmax

tmax

Integration time [n*10ms] Frequency measurement:1 to 1000

Rotational speed measurement:1 to 1000

Period measurement:1 to 12000

10

10

10

Sensor pulses per revolution2 1 to 65535 1

2 Only relevant in rotational speed measurement mode

Parameter Assignment Error

• Incorrect mode

• Lower limit incorrect

• Upper limit incorrect

• Integration time incorrect

• Sensor pulses incorrect

What to Do in the Event of Errors

Check the set value ranges.

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2.8 Count and Direction Evaluation

Signal Evaluation A, B

Signal evaluation by means of A, B allows you to count directionally. Differentevaluation modes are possible depending on what you parameterize:

– Pulse and direction

– Rotary transducer

In the case of 24-V pulse generators with a direction indicator, there must be atime span of at least 5 µs/50 µs between the direction signal (B*) and the countsignal (A*), depending on the parameterized input filter.

Signal A

Signal B asdirection in-dicator

5 µs/50 µs, depending on the filter time

Time

Figure 2-29 Time Span between the Direction Signal and the Count Signal

If you connect a 24-V rotary transducer with two tracks that are 90 degrees out ofphase at the count and direction inputs, you can parameterize single evaluation inall the measurement and count modes.

You can also parameterize dual or quad evaluation in all count modes.

In all evaluation modes, you can invert direction detection at input B byparameterization.

The count and direction inputs can be operated with different sensors (P switchand series mode or M switch).

Note

If you have selected the 24V M switch setting with the 1Count24V/100kHz for the“Sensor A, B, DI” parameter, you must use the M-switching sensors.

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Pulse and Direction

The level at direction input B is used as the direction setting.

An unwired input corresponds to the “Up” count direction if you have selected“Pulse/direction” for the “Signal evaluation” parameter.

Signal A

Signal B asdirection in-dicator

Up countpulses

Down countpulses

UpDown

Figure 2-30 Signals of a 24-V Pulse Generator with Direction Indicator

Rotary Transducer

The 1Count24V/100kHz can count the edges of the signals. Normally, only theedge at A is evaluated (single evaluation). To obtain a higher resolution, atparameter assignment you can select whether the signals are to be subjected tosingle, double, or quadruple evaluation.

Multiple evaluation is only possible with asymmetric 24 V incremental encoderswith A and B signals that are 90 degrees out of phase.

Single Evaluation

Single evaluation means that only one edge of A is evaluated; up count pulses arerecorded at a rising edge at A and low level at B, and down count pulses arerecorded at a falling edge at A and low level at B.

The diagram below illustrates the single evaluation of the signals.

Signal A

Signal B

Up countpulsesDown countpulses

Up Down

Figure 2-31 Single Evaluation

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Double Evaluation

Double evaluation means that the rising and falling edge of the A signal areevaluated. Whether up or down count pulses are generated depends on the levelof the B signal.

The diagram below illustrates the double evaluation of the signals.

Signal A

Signal B

Up countpulsesDown countpulses

Up Down

Figure 2-32 Double Evaluation

Quadruple Evaluation

Quadruple evaluation means that the rising and falling edges of the A and Bsignals are evaluated. Whether up or down count pulses are generated dependson the levels of the A and B signals.

The diagram below illustrates the quadruple evaluation of the signals.

Signal A

Signal B

Up countpulses

Down countpulses Up Down

Figure 2-33 Quadruple Evaluation

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2.9 Behavior at CPU-Master-STOP

You can program what the 1Count24V/100kHz is to do in the event of the failure ofthe parent controller.

Parameters Status of the 1Count24V/100kHz atCPU/Master STOP

What Happens if New ParametersHave Been Assigned?

Turn off DO1 The current mode is terminated, thegate closed, and the digital outputblocked; comparison values 1 and 2and the load value are reset; theupper and lower limit values, functionand behavior of the digital outputs,and the integration time are handledin accordance with the parameterassignments.

The changed parameters areaccepted and take effect.

Continue working mode1 The current mode continues, and thegate and digital output retain theirstatus.

The gate is closed, the current modeis terminated, the digital output isblocked, and the changedparameters are accepted and takeeffect.

DO 1 substitute a value The current mode is terminated, thegate closed, and the substitute valuethat was assigned as a parameter ofthe digital output is switched through; comparison values 1 and 2 and theload value are reset; the upper andlower limit values, function andbehavior of the digital outputs, andthe integration time are handled inaccordance with the parameterassignments.

When a pulse is output when thecomparison value is reached, thesubstitute value is 1 only for theduration of the pulse.

The changed parameters areaccepted and take effect.

DO 1 keep last value The current mode is terminated, thegate closed, and the status of thedigital output is maintained; comparison values 1 and 2 and theload value are reset; the upper andlower limit values, function andbehavior of the digital outputs, andthe integration time are handled inaccordance with the parameterassignments.

The changed parameters areaccepted and take effect.

1 If the mode is to continue during a change from CPU-/Master-STOP to RUN (startup), the CPU/Mastercannot clear the outputs.Possible solution: In the part of the user program that is processed during startup, set the SW gate controlbit and transfer the values to the 1Count24V/100kHz.

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Under What Conditions Does the 1Count24V/100kHz Leave the ParameterizedStatus?

The CPU or master must be in RUN mode, and you have to make a change at thecontrol interface.

A New Parameter Assignment of the ET 200S Station by Means of Your CPU/DP Master Takes Place:

• Upon power on of the CPU/DP master

• Upon power on of the IM 151/IM 151 FO

• After failure of the DP transmission

• After loading an altered parameter assignment or configuration of the ET 200Sstation into the CPU/DP master.

• When the 1Count24V/100kHz is inserted

• Upon power on or inserting of the appropriate power module

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2.10 Technical Specifications

Dimensions and Weight

Dimensions W×H × D(mm)

15×81×52

Weight Approximately 40 g

Data for Specific Modules

Number of channels

Counter range

1

32 bits

Voltage, Currents, Potentials

Rated load voltage L+

• Range

• Reverse polarityprotection

24 VDC

20.4 to 28.8V

Yes

Galvanic isolation

• Between backplanebus and counterfunction

• Between counterfunction and loadvoltage

Yes

No

Sensor supply

• Output voltage

• Output current

L+ (–0.8V)

Max. 500 mA,short-circuit proof

Current input

• From the backplanebus

• From the loadvoltage L+ (no load)

Max. 10 mA

Max. 42 mA

Power dissipation Typ. 1 W

Data on the Count Signals and the Digital Input

Isolation No, from shield only

Input voltage

• Rated value

• 0 signalC–30

• 1 signal

24 VDC

–30 V to 5 V

11 V to 30 V

Input current

• 0 signal

• 1 signal

≤2 mA (bias current)

9 mA (typically)

Minimum pulse width(maximum countingfrequency)

• Filter on

• Filter off

≥25s

≥2.5 sConnection of atwo-wire BERO type 2

Possible

Input characteristic To IEC 1131, Part 2,Type 2

Shielded cable length

• Filter 200 kHz

• Filter 20 kHz

50 m

100 m

Data on the Digital Output

Output voltage

• Rated value

• 0 signal

• 1 signal

24 VDC

≤ 3V

≥L+ (–1 V)

Output current

• 0 signal (residualcurrent)

• 1 signal

Permitted Range

Rated value

40C

50C

60C

Switching frequency

• Resistive load

• Inductive load

• Lamp load

Lamp load

Output delay (resistiveload)

Short-circuit protectionfor output

Response threshold

Inductive extinction

Digital input control

Cable lengths

• Unshielded

• Shielded

≤ 0.5 mA

5 mA to 2.0 A

2 A

1 A

0.5 A

100 Hz

2 Hz

≤10 Hz

≤10 W

100 s

Yes

2.6 A to 4 A

Yes; L+ –(50 to 60 V)

Yes

600 m

1000 m

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Status, Diagnostics

Digital input DI statusdisplay

LED 8 (green)

Digital output DO statusdisplay

Up count value change

Down count valuechange

Malfunction indication

Diagnostic information

LED 4 (green)

UP LED (green)

DN LED (green)

SF LED (red)

Yes

Measurement Ranges in the MeasurementModes

Maximum measurementrange

• Frequencymeasurement

• Rotational speedmeasurement

• Periodmeasurement

0.1 Hz to 100 kHz

1 /min to 25000 /min

10 s to 120 s

Response Times

Update rate of the countmodes

• Non-clocked mode 1 ms

• Clocked mode TDP

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1Count5V/500kHz

Chapter Overview

Section Description Page

3.1 Product Overview 3-2

3.2 Clocked Mode 3-3

3.3 Brief Instructions on Commissioning the 1Count5V/500kHz 3-4

3.4 Terminal Assignment Diagram 3-7

3.5 Modes and Areas of Application of the 1Count5V/500kHz 3-8

3.6 Count Modes 3-9

3.7 Measurement Modes 3-47

3.8 Count and Direction Evaluation 3-70

3.9 Behavior at CPU-Master-STOP 3-72

3.10 Technical Specifications 3-74

3

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3.1 Product Overview

Order Numbers

6ES7 138-4DE01-0AB0

Compatibility

The 1Count5V/500kHz with the order number 6ES7 138-4DE01-0AB0 replaces the1Count5V/500kHz with the order number 6ES7 138-4DE00-0AB0 and is fullycompatible. You can use it with STEP 7 as of V5.1 SP2 in non-clocked mode. Youwill need STEP 7 as of V5.1 SP4 for clocked mode.

Features

• A 5 V incremental encoder can be connected in order to count 5 V RS422signals up to a frequency of 500 kHz.

• The 1Count5V/500kHz is a double-width module and can only be used with a4-row TM-E30S44-01 terminal module.

• Clocked Mode

• Modes of the 1Count5V/500kHz:

Count modes:

– Endless counting

– Once-only counting

– Periodic counting

Measurement modes:

– Frequency measurement

– Rotational speed measurement

– Period measurement

• Gate control, synchronization or latch function via digital inputs

• 2 digital outputs for direct control or output of the comparison results.

Connectable Count Signals

The 1Count5V/500kHz can count the signals of the encoders:

• A 5 V incremental encoder with two tracks 90o out of phase at the count inputs

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Adjustment During Operation

• Count Modes

– You can change the function and behavior of the digital outputs duringoperation.

• Measurement Modes

– You can change the function of the DO1 digital output during operation

– You can change the integration time during operation

Configuration

You can use either of the following to configure 1Count5V/500kHz:

– A DDB file (http://www.ad.siemens.de/csi/gsd)

– STEP 7 as of V5.1 SP4

3.2 Clocked Mode

Note

The principles of clocked mode are described in a separate manual.

Hardware

You will require the following for the clocked mode of the 1Count5V/500kHz:

• A CPU that supports clocking

• A DP master that supports the equidistant bus cycle

• An IM 151 High Feature

Features

Depending on the system parameter assignment the 1Count5V/500kHz works ineither non-clocked or clocked mode.

In clocked mode, the transmission of data between the DP master and1Count5V/500kHz is clocked to the PROFIBUS DP cycle.

In clocked mode the 8 bytes of the feedback interface are consistent.

If an error occurs during parameterization the 1Count5V/500kHz does not go intothe clocked mode.

If clocking is lost due to faults or failure or a delay in global control (GC), the1Count5V/500kHz will return to clocked mode at the next cycle without an errorresponse.

If clocking is lost, the feedback interface is not updated.

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3.3 Brief Instructions on Commissioning the 1Count5V/500kHz

Introduction

These instructions use the example of “endless counting” to teach you to set up afunctioning application in which you count the pulses of a sensor. At the sametime, you learn about the basic functions of your 1Count5V/500kHz (hardware andsoftware) and how to check them.

RequirementsThe following requirements must be met:

• You put an ET 200S station into service at an S7 station with a DP master.

• You must have the following:

– A TM-E30S44-01 terminal module

– A 1Count5V/500kHz

– A 5 V sensor with a 24 V sensor supply and the material required for wiring

Installation, Wiring and Fitting

Install and wire the TM-E30S44-01 terminal module (see Figure 2-1). Connect the1Count5V/500kHz to the terminal module (you will find detailed instructions on howto do this in Chapter 5 of the ET 200S Distributed I/O System manual).

2

3

4

6

7

8

1 5

SF

6ES7 138-4DE01-0AB0

1 Count

5V/500kHz

1

0

1

1

1

2

1

4

1

5

1

6

9

1

3

9 13

165 V incremental

encoder

1 = A; 5=/A

2 = 24V; 6=M

4 = N; 8=/N

3 = B; 7=/B

UP DN

SYN

Figure 3-1 Terminal Assignment for the Example

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Configuration Using STEP7 and HWCONFIG

You begin by adapting the hardware configuration of your existing ET 200S station.

Open the relevant project in SIMATIC Manager.

Call the HWCONFIG configuration table in your project.

Select the 1CTR 5V/500kHz count mode from the hardware catalog. The number6ES7 138-4DE01-0AB0 C appears in the information text. Drag the entry to theslot at which you have installed your 1Count5V/500kHz.

Double-click this number to open the DP Slave Properties dialog box.

On the Addresses tab, you will find the addresses of the slot to which you havedragged the 1Count5V/500kHz. Make a note of these addresses for subsequentprogramming.

On the Parameters tab you will find the default settings for the 1Count5V/500kHz.Leave the default settings unchanged.

Save and compile your configuration, and download the configuration in STOPmode of the CPU by choosing PLC → Download to Module.

Integration in the User Program

Create block FC101 and integrate it in your control program (in OB1, for example).This block requires the data block DB1 with a length of 16 bytes. The start addressof the module in the following example is 256.

STL Description

Block: FC101

Network 1: Presettings

L 0T DB1.DBD0T DB1.DBD4SETS DB1.DBX4.0

Network 2: Write to the control interface

L DB1.DBD0T PQD 256L DB1.DBD4T PQD 260

Network 3: Read from the feedbackinterface

L PID 256T DB1.DBD8L PID 260T DB1.DBD12

//Delete control bits

//Open SW gate

//Write 8 bytes to the 1Count5V/500kHz//Configured start address of the outputs

//Read 8 bytes from the 1Count5V/500kHz//Configured start address of the inputs

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Test

Use “Monitor/Modify Variables” to monitor the count value and the gate.

Select the “Block” folder in your project. Choose the Insert → S7 Block → VariableTable menu command to insert the VAT 1 variable table, and then confirm with OK.

Open the VAT 1 variable table, and enter the following variables in the “Address”column:

DB1.DBD8 (current count value)

DB1.DBx13.0 (internal gate status)

Choose PLC → File Connect To → Configured CPU to switch to online.

Choose Variable → Monitor to switch to monitoring.

Switch the CPU to RUN mode.

The “internal gate status” bit must be set.

Use your sensor to generate pulses.

You Can Now:

• See that the UP LED on the 1Count5V/500kHz is on. The status of the UP LEDchanges with each new pulse.

• See that the count value in the block changes.

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3.4 Terminal Assignment Diagram

Wiring Rules

The cables (terminals 1 and 8 and terminals 15 and 16) must be shielded. Theshield must be supported at both ends. To do this use the shield contact (see theET 200S Distributed I/O System manual, Appendix A, ET 200S Accessories).

Table 3-1 Terminal Assignment of the 1Count5V/500kHz

View Terminal Assignment Remarks

TM-E30S44-01 and

1Count5V/500kHz

5 V incremental

encoder

1 = A; 5=/A

2 = 24V; 6=M

4 = N; 8=/N

3 = B; 7=/B

9 = DO1; 13=DO2

10 = M; 14=M

16 = DI

11 =24VDC; 15=24VDC

2

3

4

6

7

8

1 5

SF

6ES7 138-4DE01-0AB0

1 Count

5V/500kHz

1

0

1

1

1

2

1

4

1

5

1

6

9

1

3

9 13

16

UP DN

SYN

A, /A: Track A

B, /B: Track B

N, /N: Track N

24 VDC: Sensor supply

M: Chassis ground

DI: Digital input

DO1: Digital output

DO2: Digital output

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3.5 Modes and Areas of Application of the 1Count5V/500kHz

To begin with, decide how you want to use the 1Count5V/500kHz. You can choosebetween the following modes:

Count Modes Measurement Modes

Endless counting Frequency measurement

Once-only counting Rotational speed measurement

Periodic counting Period measurement

Parameters are assigned to the various modes. You will find the parameter listsin the descriptions of the modes.

You can integrate the 1Count5V/500kHz in your project in two different ways.Decide whether you want to work with a DDB file or with STEP7.

Integrating 1Count5V/500kHz with STEP7(in Clocked and Non-Clocked Mode)

Select an entry from the hardware catalog that corresponds to the mode youwant.

Select 1CTR5V/500kHz count mode forcount modes

Select 1CTR5V/500kHz measurementmode for measurement modes

The number 6ES7 138-4DE01-0AB0 Cappears in the information text. Dragthe entry to the slot at which you haveinstalled your 1Count5V/500kHz.

The number 6ES7 138-4DE01-0AB0 Mappears in the information text. Dragthe entry to the slot at which you haveinstalled your 1Count5V/500kHz.

Select the parameters.

Integrating 1Count5V/500kHz with STEP7(Only in Non-Clocked Mode)

Select an entry in the DDB file that corresponds to the mode you want.

SelectC 6ES7 138-4DE01-0AB0 1CNT5V forcount modes

SelectM 6ES7 138-4DE01-0AB0 1CNT5V formeasurement modes

Select the parameters.

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3.6 Count Modes

The count modes are used in count applications (for counting items, for example).

You can choose between the following modes:

• Endless counting (for position detection with incremental encoders, forexample)

• Once-only counting (for counting items up to a maximum limit, for example)

• Periodic counting (in applications with repeated count operations, for example)

To execute one of these modes, you have to assign parameters to the1Count5V/500kHz (see Section 2.6.10).

Maximum Count Range

The upper count limit is +2147483647 (231 – 1).

The lower count limit is –2147483648 (–231).

Load Value

You can specify a load value for the 1Count5V/500kHz.

You can set this load value directly (LOAD_VAL). It is then accepted by the1Count5V/500kHz directly as the new count value.

You can also load the load value by way of preparation (LOAD_PREPARE). Theload value is then accepted by the 1Count5V/500kHz as the new count value whenthe following events occur:

In the once-only counting and periodic counting modes

– The lower or upper count limit is reached when no main count direction isparameterized.

– The parameterized upper count limit is reached when the main countdirection is up.

– Zero is reached when the main count direction is down.

In all count modes

– The count operation is started by a SW gate or HW gate (if the countoperation is continued, the load value is not accepted).

– Synchronization

– Latch and Retrigger

Gate Control

To control the 1Count5V/500kHz, you have to use the gate functions.

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Main Count Direction

With the main count direction, you assign parameters to indicate which RESETstatuses the load value and count value can take on. It is thus possible to createincrementing or decrementing count applications. The parameterized main countdirection has no effect on the direction evaluation when the count pulses aredetected.

RESET Statuses of the Following Values After Parameter Assignment

Table 3-2 RESET Statuses

Value Main CountDirection

RESET Status

Load value NoneUpDown

00Parameterized upper count limit

Count value NoneUpDown

00Parameterized upper count limit

Comparison value 1and 2

NoneUpDown

00Parameterized upper count limit

Latch value NoneUpDown

00Parameterized upper count limit

Clocked Mode

In clocked mode the 1Count5V/500kHz accepts the control bits and control valuesfrom the control interface in each PROFIBUS DP cycle and reports back theresponse to them in the same cycle.

In each cycle the 1Count5V/500kHz transfers the counter status and latch valuethat were valid at the time Ti and the status bits valid at the time Ti.

A counter status controlled by hardware input signals can only be transferred in thesame cycle if the input signal occurred before the time Ti.

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3.6.1 Endless Counting

Definition

In this mode, the 1Count5V/500kHz counts endlessly as of the load value:

• If the 1Count5V/500kHz reaches the upper count limit when counting up, andanother count pulse then comes, it will jump to the lower count limit andcontinue counting from there without losing the pulse.

• If the 1Count5V/500kHz reaches the lower count limit when counting down, andanother count pulse then comes, it will jump to the upper count limit andcontinue counting from there without losing the pulse.

• The upper count limit is set at +2147483647 (231 – 1).

• The lower count limit is set at –2147483648 (–231).

Upper count limit

Lower count limit

Counter status

Time

Load value

Gate start Gate stop

Figure 3-2 Endless Counting with Gate Function

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.6.5)

• Latch function (see Section 3.6.6)

• Synchronization (see Section 3.6.7)

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Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

(See Section 3.6.8)

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

(See Section 3.6.8)

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Section 3.6.8 and 3.6.9)

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3.6.2 Once-Only Counting

Definition

In this mode, the 1Count5V/500kHz counts once only, depending on the maincount direction set.

• When there is no main count direction:

– Counts as of the load value.

– Counts up or down.

– The count limits are fixed at the maximum count range.

– In the event of overflow or underflow at the respective count limit, the gate isclosed automatically.

• When the main count direction is up:

– Counts as of the load value.

– Counts up or down.

– When the upper count limit is reached, the counter jumps to the load valueand the gate is closed.

– The upper limit is parameterizable, and the load value has a RESET statusof 0 and can be changed.

• When the count direction is down:

– Counts as of the load value.

– Counts up or down.

– When the lower count limit is reached, the 1Count5V/500kHz jumps to theload value and the gate is closed.

– The lower limit is fixed at 0, and the load value is parameterizable(parameter: upper count limit) and can be changed.

The internal gate is automatically closed in the event of an overflow/underflow atthe count limits. To restart counting, you have to open the gate again.

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Uppercount limit

Lowercount limit

Counter status

Time

STS_OFLW

Gate start

Load value

STS_UFLW

STS_ND

Gate startAutomatic gate stop

0

Automatic gate stop

Figure 3-3 Once-Only Counting Without Main Count Direction; Terminating Gate Function

With an interrupting gate function, the count remains at the underflow when thegate is started.

Uppercount limit

Lowercount limit

Counter status

Time

STS_OFLW

Gate start

Load value

Gate start

0

Automatic gate stop

Automatic gate stop

Figure 3-4 Once-Only Counting with Up as the Main Count Direction

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Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.6.5)

• Latch function (see Section 3.6.6)

• Synchronization (see Section 3.6.7)

Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

(See Section 3.6.8)

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

(See Section 3.6.8)

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Section 3.6.8 and 3.6.9)

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3.6.3 Periodic Counting

Definition

In this mode, the 1Count5V/500kHz counts periodically, depending on the maincount direction set.

• When there is no main count direction:

– Counts as of the load value.

– Counts up or down.

– The count limits are fixed at the maximum count range.

– In the event of an overflow or underflow at the respective count limit, the1Count5V/500kHz jumps to the load value and continues counting fromthere.

• When the main count direction is up:

– Counts as of the load value.

– Counts up or down.

– The upper limit is parameterizable, and the load value has a RESET statusof 0 and can be changed.

– When the upper count limit is reached, the 1Count5V/500kHz jumps to theload value and continues counting from there.

• When the count direction is down:

– Counts as of the load value.

– Counts up or down.

– When the lower count limit is reached, the 1Count5V/500kHz jumps to theload value and continues counting from there.

– The lower limit is fixed at 0, and the load value is parameterizable(parameter: upper count limit) and can be changed.

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Upper countlimit

Counter status

Time

STS_OFLW

Gate start Gate stop

Load value

STS_UFLW

STS_ND0

Lowercount limit

Figure 3-5 Periodic Counting without a Main Count Direction

Upper count limit

Lower count limit

Counter status

Time

STS_OFLW

Gate start Gate stop

Load value

0

Figure 3-6 Periodic Counting with Up as the Main Count Direction

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.6.5)

• Latch function (see Section 3.6.6)

• Synchronization (see Section 3.6.7)

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Function of the Digital Outputs

Select one of the following functions for each digital output:

• Output, no switching through comparator

• Activation at a counter status greater than or equal to the comparison value

• Activation at a counter status less than or equal to the comparison value

• Pulse on reaching the comparison value

• Switching at comparison values (DO1 only)

(See Section 3.6.8)

Influencing the Behavior of the Digital Outputs through:

• Hysteresis

• Pulse duration

(See Section 3.6.8)

Values That Can Be Changed during Operation:

• Load value (LOAD_PREPARE)

• Counter status (LOAD_VAL)

• Comparison value 1 (CMP_VAL1)

• Comparison value 2 (CMP_VAL2)

• Function and behavior of the digital outputs (C_DOPARAM)

(See Section 3.6.8 and 3.6.9)

3.6.4 Behavior of the Digital Inputs

Digital Input of the 1Count5V/500kHz

The DI digital input can be operated with 24 V sensors (P switch and series mode).

In the case of the input and HW gate functions, the level of the digital input can beinverted by means of parameter assignment.

The STS_DI feedback bit indicates the level of the digital input.

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3.6.5 Gate Functions in Count Modes

Software Gate and Hardware Gate

The 1Count5V/500kHz has two gates

• A software gate (SW gate), which is controlled by the SW_GATE control bit.

The software gate can only be opened by a 0-to-1 edge change of theSW_GATE control bit. It is closed when this bit is reset. Note the transfer timesand run times of your control program in this connection.

• A hardware gate (HW gate), which is controlled by means of the digital input onthe 1Count5V/500kHz. You parameterize the hardware gate as a function of thedigital input. It is opened when there is a 0-to-1 edge change at the digital inputand closed when there is a 1-to-0 edge change.

Internal Gate

The internal gate is the logical AND of the HW gate and SW gate. Counting is onlyactive when the HW gate and the SW gate are open. The STS_GATE feedback bit(internal gate status) indicates this. If a HW gate has not been parameterized, thesetting of the SW gate is decisive. Counting is activated, interrupted, continued,and terminated by means of the internal gate. In the once-only counting mode, theinternal gate is closed automatically when there is an overflow/underflow at thecount limits.

Terminating and Interrupting Gate Function

When parameterizing the gate function, you can specify whether the internal gateis to terminate or interrupt counting. When it is terminated, after the gate is closedand reopened (gate start), counting starts again from the beginning. When it isinterrupted, after the gate is closed and reopened (gate start), counting continuesfrom the previous value

The diagrams below indicate how the interrupting and terminating gate functionwork:

Upper count limit

Lower count limit

Counter status

Time

Load value

Gate start Gate stop Gate start

Figure 3-7 Endless Counting, Up, Interrupting Gate Function

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Upper count limit

Lower count limit

Counter status

TimeGate start Gate stop Gate start

Load value

Figure 3-8 Endless Counting, Down, Terminating Gate Function

Gate Control by Means of the SW Gate Only

When the gate is opened, one of the following things occurs, depending on theparameterization:

– Counting continues from the current count value

or

– Counting starts at the load value

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, counting starts at the time To in cycle “n+1”. In the samecycle, “n+1”, the 1Count24V/100kHz delivers the current count value from the Ti.

Gate Control by Means of the SW Gate and HW Gate

If the SW gate opens when the HW gate is already open, counting continues as ofthe current count value.

When the HW gate is opened, one of the following things occurs, depending on theparameterization:

– Counting continues from the current count value

or

– Counting starts at the load value

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, counting starts at the time To in cycle “n+1” if the HWgate is already open at this time. If the HW gates opens between To and Ti in cycle“n+1”, counting only starts once the HW gate is open. In both cases, the1Count24V/100kHz delivers the current count value in cycle “n+1” as of Ti.

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3.6.6 Latch Function

There are two latch functions:

• Latch and retrigger

• Latching

The Latch and Retrigger Function

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Count pulses

SW_GATE

DI digital input

Counter status

Latch value

Figure 3-9 Latch and Retrigger with Load Value=0

This function stores the current internal counter status of the 1Count5V/500kHzand retriggers counting when there is an edge at the digital input. This means that the current internal counter status at the time of the edge isstored, and the 1Count5V/500kHz is then loaded again with the load value, as ofwhich it resumes counting.

The counter status can thus be evaluated independently of events.

The count mode must be enabled by the SW gate before the function can beexecuted. It is started at the first rising edge at the digital input.

The stored counter status rather than the current counter status is indicated at thefeedback interface. The STS_DI bit indicates the level of the latch and retriggersignal.

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The latch value is preset with its RESET status (Table 3-2 on page 3-10). It is notchanged when the SW gate is opened.

Direct loading of the counter does not cause the indicated stored counter status tobe changed.

If you close the SW gate, it only interrupts counting; this means that when youopen the SW gate again, counting is continued. The DI digital input remains activeeven when the SW gate is closed.

Counting is also latched and triggered in clocked mode with each edge at thedigital input. The counter status that was valid at the time of the last edge before Tiis displayed in the feedback interface.

Latching

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Count pulses

SW_GATE

DI digital input

Counter status

Latch value

Figure 3-10 Latch with a Load Value of 0

The counter status and latch value are preset with their RESET states (Table 3-2on page 3-10).

The count function is started when the SW gate is opened. The 1Count5V/500kHzbegins at the load value.

The latch value is always the exact count at the time of the positive edge at the DIdigital input.

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The stored counter status rather than the current counter status is indicated at thefeedback interface. The STS_DI bit indicates the level of the latch signal.

Direct loading of the counter does not cause the indicated stored counter status tobe changed.

In clocked mode the counter status that was latched at the time of the last edgebefore Ti is displayed in the feedback interface of the counter status.

When you close the SW gate, the effect is as when parameterized, terminating orinterrupting. The DI digital input remains active even when the SW gate is closed.

Further possible causes of parameter assignment errors with the latch function:

• DI function incorrect

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3.6.7 Synchronization

Synchronization with DI

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Internal count pulses(up or down)

Digital input(zero mark)

EnableCRTL_SYN

Load value

EnableCRTL_SYN

Synchronization,once only

Synchronization,periodic

Load value

Count value

Count value

Figure 3-11 Once-Only and Periodic Synchronization

If you have parameterized synchronization, the rising edge of a reference signal atthe input sets the 1Count5V/500kHz to the load value.

You can select between once-only and periodic synchronization.

The following conditions apply:

• The count mode must have been started by the SW gate.

• The “enable synchronization CTRL_SYN” control bit must be set.

• In once-only synchronization, the first edge loads the1Count5V/500kHz with theload value after the enable bit is set.

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• In periodic synchronization, the first edge and each subsequent edge load the1Count5V/500kHz with the load value after the enable bit is set.

• After successful synchronization, the STS_SYN feedback bit is set and theSYN LED comes on. The RES_STS control bit resets the feedback bit andswitches the LED off.

• The signal of a bounce-free switch can serve as the reference signal.

• The STS_DI feedback bit indicates the level of the reference signal.

In clocked mode, the set feedback bit STS_SYN indicates that the rising edge onthe digital input was between the time Ti in the current cycle and Ti in the previouscycle.

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Synchronization with DI and Zero Mark

In order to be able to use this function, you must have selected it from the digitalinput function parameters.

Internal count pul-ses (up or down)

DI digital input

EnableCRTL_SYN

Load value

EnableCRTL_SYN

Synchronization,once only

Synchronization,periodic

Load value

Countvalue

Count value

Zero mark

Figure 3-12 Once-Only and Periodic Synchronization

If you have parameterized synchronization with DI and zero mark, the DI serves asthe HW enable. When HW enable is active, the 1Count5V/500kHz is loaded with

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the load value by the sensor’s zero mark.

You can select between once-only and periodic synchronization.

The following conditions apply:

• The count mode must have been started by the SW gate.

• The “enable synchronization CTRL_SYN” control bit must be set.

• In once-only synchronization, the first zero mark loads the 1Count5V/500kHzwith the load value after the enable bit and the HW enable are set.

• In periodic synchronization, the first and each subsequent zero mark load the1Count5V/500kHz with the load value after the enable bit and the HW enableare set.

• After successful synchronization, the STS_SYN feedback bit is set and theSYN LED comes on. The RES_STS control bit resets the feedback bit andswitches the LED off.

• The signal of a bounce-free switch can serve as the reference signal.

• The STS_DI feedback bit indicates the level of the reference signal.

In clocked mode, the set feedback bit STS_SYN indicates that the rising edge atthe digital input was between the time Ti in the current cycle and Ti in the previouscycle.

3.6.8 Behavior of the Outputs in Count Modes

The 1Count5V/500kHz lets you store two comparison values, which are assignedto the digital outputs. The outputs can be activated, depending on the counterstatus and comparison values. The various ways of setting the behavior of theoutputs are described in this section.

The 1Count5V/500kHz has two digital outputs.

Both outputs are parameterizable.

You can change the function and the behavior of the digital outputs duringoperation.

You can choose from the following functions:

• Output

• Counter status ≥ comparison value

• Counter status ≤ comparison value

• Pulse at comparison value

• Switching at comparison values (DO1 only)

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Output

You can switch the outputs on and off with the control bits SET_DO1 andSET_DO2.

The control bits CTRL_DO1 and CTRL_DO2 must be set for this.

You can query the status of the outputs with the status bits STS_DO1 andSTS_DO2 at the feedback interface.

The status bits STS_CMP1 and STS_CMP2 indicate that the relevant output is orwas switched on. These status bits retain their status until they are acknowledged.If the output is still switched, the corresponding bit is set again immediately. Thesestatus bits are also set when the control bit SET_DO1 or SET_DO2 is operatedwithout DO1 or DO2 being enabled.

Clocked mode: In clocked mode, the DO1 and DO2 outputs are switched at thetime To.

Counter Status Comparison Value and Counter Status Comparison Value

If the comparison conditions are fulfilled, the relevant comparator switches theoutput on. The status of the output is indicated by STS_DO1 and STS_DO2.

The control bits CTRL_DO1 and CTRL_DO2 must be set for this.

The comparison result is indicated by the status bits STS_CMP1 and STS_CMP2.You cannot acknowledge and thus reset these bits until the comparison conditionsare no longer fulfilled.

Clocked mode: In clocked mode as well, the DO1 and DO2 outputs are switchedas soon as the comparison condition is fulfilled and they are therefore independentof the PROFIBUS DP cycle.

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Comparison Value Reached, Pulse Output

If the counter status reaches the comparison value, the comparator switches onthe relevant digital output for the parameterized pulse duration.

The control bit CTRL_DO1 or CTRL_DO2 must be set for this.

The status bits STS_DO1 and STS_DO2 always have the status of thecorresponding digital output.

The comparison result is indicated by means of the status bit STS_CMP1 orSTS_CMP2 and cannot be reset by acknowledgment until the pulse duration haselapsed.

If a main count direction is parameterized, the comparator switches only when thecomparison value in the main count direction is reached.

If a main count direction is not parameterized, the comparator switches when thecomparison value is reached from either direction.

If the digital output is set by means of the control bit SET_DO1 or SET_DO2, it isreset when the pulse duration has elapsed.

Clocked mode: In clocked mode as well, the DO1 and DO2 outputs are switchedas soon as the comparison condition is fulfilled and they are therefore independentof the PROFIBUS DP cycle.

Pulse Duration When the Comparison Value Is Reached

The pulse duration begins when the digital output is set. The inaccuracy of thepulse duration is less than 2 ms.

The pulse duration can be set to suit the actuators used. The pulse durationspecifies how long the output is to be set for. The pulse duration can bepreselected between 0 ms and 510 ms in steps of 2 ms.

If the pulse duration is 0, the output is set until the comparison condition is nolonger fulfilled. Note that the count pulse times must be greater than the minimumswitching times of the digital output.

Clocked mode: In clocked mode as well, the DO1 and DO2 outputs are switchedas soon as the comparison condition is fulfilled and they are therefore independentof the PROFIBUS DP cycle.

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Switching at comparison values

The comparator switches the output when the following conditions are met:

• The two comparison values must be loaded by means of the load functionsCMP_VAL1 and CMP_VAL2.

and

• After the comparison values are loaded, enable the DO1 output withCRTL_DO1.

The following table shows you when the DO1 is switched on or off:

DO1 Is Switched On When DO1 Is Switched Off When

V2 < V1 (see Figure 3-13)

V2 ≤ counter status ≤ V1 V2 > counter statusorcounter status > V1

V2 = V1 V2 = counter status = V1 V2 ≠ counter status ≠ V1

V2 < V1 (see Figure 3-14)

V1 > counter statusorcounter status > V2

V1 ≤ counter status ≤ V2

The comparison result is indicated by the status bit STS_CMP1. You can onlyacknowledge and thus reset this bit when the comparison condition is no longerfulfilled.

There is no hysteresis in the case of this output behavior.

It is not possible to control the DO1 output with the SET_DO1 control bit in thecase of this output behavior.

Clocked mode: In clocked mode as well, the DO1 output is switched as soon asthe comparison condition is fulfilled and is therefore independent of thePROFIBUS DP cycle.

Counter status

t

t

V1

DO1

V2

0

Figure 3-13 V2 < V1 at the Start of the Count

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Counter status

t

t

V2

DO1

V1

0

Figure 3-14 V2 > V1 at the Start of the Count

Setting or Changing the Function and Behavior of the DO1 Digital Output

If you want to set or change the behavior of the DO1, make sure you consider allthe parameterized dependencies, otherwise a parameter assignment error orloading error may occur.

Specific Conditions

If you parameterize switching at comparison values for DO1, you must do thefollowing:

• Set hysteresis=0

and

• Also parameterize “output” for the DO2 output

Hysteresis

A sensor can remain at a particular position and then fluctuate around this position.This status causes the counter status to fluctuate around a particular value. If thereis a comparison value in this fluctuation range, for example, the associated outputis switched on and off in accordance with the rhythm of the fluctuations. To preventswitching occurring in the case of small fluctuations, the 1Count5V/500kHz isequipped with parameterizable hysteresis. You can parameterize a range between0 and 255 (0 means hysteresis switched off).

Hysteresis also works with overflow and underflow.

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How Hysteresis Works with Counter Status Comparison Value and CounterStatus Comparison Value

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with the settings ”Up” for “Main count direction” and“Switch on at counter status ≥ comparison value”.

When the comparison condition is met, hysteresis becomes active. While thehysteresis is active, the result of comparison remains unchanged.

If the count value goes outside the hysteresis range, hysteresis is no longer active.The comparator switches again according to its comparison conditions.

Countvalue

Hys0

Hys3

876543210

Figure 3-15 Example of How Hysteresis Works

Note

If the counter status is equal to the comparison value and hysteresis is active, the1Count5V/500kHz deletes the output when there is a change in count direction atthe comparison value.

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How Hysteresis Works When the Comparison Value Is Reached and the PulseDuration = 0

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with the settings “pulse when comparison value isreached”, “no main count direction” and “pulse duration = 0”.

When the comparison conditions are met, hysteresis becomes active. While thehysteresis is active, the result of comparison remains unchanged. If the countvalue goes outside the hysteresis range, hysteresis is no longer active. Thecomparator deletes the result of the comparison.

Countvalue

Hys0

Hys3

876543210

Figure 3-16 Example of How Hysteresis Works

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How Hysteresis Works When the Comparison Value Is Reached, Output PulseDuration

The diagram below provides an example of how hysteresis works. It shows thedifferences in the behavior of an output when hysteresis of 0 (switched off) isparameterized as opposed to hysteresis of 3. In the example, the comparisonvalue = 5.

The counter is parameterized with the settings “pulse when comparison value isreached”, “no main count direction” and “pulse duration > 0”.

When the comparison conditions have been met, hysteresis becomes active and apulse of the duration indicated in the parameters is output.

If the count value goes outside the hysteresis range, hysteresis is no longer active.

When hysteresis becomes active, the 1Count5V/500kHz stores the count direction.

If the hysteresis range is exited in a different direction to the one stored, a pulse isoutput.

Countvalue

Hys0

Hys3

876543210

Figure 3-17 Example of How Hysteresis Works

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Control of the Outputs Simultaneously to the Comparators

If you selected a comparison function for the outputs, you can continue to controlthe outputs with SET_DO1 or SET_DO2. In this manner, you can simulate theeffect of the comparison functions by means of your control program:

• The output is set by the positive edge of SET_DO1 or SET_DO2. If youspecified that a pulse is to be output when the comparison value is reached,only one pulse of the specified duration is output. For pulse duration = 0, theoutput can be set with SET_DO1 or SET_DO2, as long as the count value is atthe comparison value or hysteresis is active. The SET_DO1 control bit is notpermitted in the case of switching at comparison values.

• A negative edge of SET_DO1 or SET_DO2 resets the output.

Note that the comparators continue to be active and can set or reset the output ifthere is a change in the comparison result.

Note

An output set by SET_DO1 or SET_DO2 is not reset at the comparison value bythe comparator.

Loading the Comparison Values

Pass the comparison values to the 1Count5V/500kHz. Counting is not affected bythis.

Valid Range for the Two Comparison Values

Main Count Direction:None

Main Count Direction:Up

Main Count Direction:Down

Lower count limitto upper count limit

–2147483648toupper count limit –1

1to2147483647

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Changing the Function and Behavior of the Digital Outputs

You can change the functions and behavior of the outputs during operation bymeans of the control interface. When you do this, the 1Count5V/500kHz deletesthe outputs and accepts the values as follows:

• Function of the digital outputs DO1 and DO2: If you change the function suchthat the comparison condition is fulfilled, the output is not changed until after thenext count pulse. However, if hysteresis is active, the 1Count5V/500kHz doesnot make any change to the output.

• Hysteresis: An active hysteresis (see How Hysteresis Works ...) remains activeafter the change. The new range of hysteresis is applied the next time thecomparison value is reached.

• Pulse duration: The new pulse duration takes effect with the next pulse.

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3.6.9 Assignment of the Feedback and Control Interface for theCount Modes

Note

The following data of the control and feedback interfaces are consistent for the1Count5V/500kHz:

• Bytes 0 to 3

• Bytes 4 to 7

Use the access or addressing mode for data consistency over the entire controland feedback interface on your DP master (only for configuration using the DDBfile).

Table 3-3 Feedback Interface (Inputs)

Address Assignment Designation

Bytes 0 to 3 Count value or stored count value in the case of the latch function atthe digital input

Byte 4 Bit 7: Short circuit of the sensor supply

Bit 6: Short circuit / wire break / overtemperature

Bit 5: Parameter assignment error

Bit 4: Short circuit / wire break / overtemperature

Bit 3: Short circuit / wire break / sensor signal

Bit 2: Resetting of status bit active

Bit 1: Load function error

Bit 0: Load function active

ERR_24V

ERR_DO1

ERR_PARA

ERR_DO2

ERR_ENCODER

RES_STS_A

ERR_LOAD

STS_LOAD

Byte 5 Bit 7: Down direction status

Bit 6: Up direction status

Bit 5: Reserve = 0

Bit 4: DO2 status

Bit 3: DO1 status

Bit 2: Reserve = 0

Bit 1: DI status

Bit 0: Internal gate status

STS_C_DN

STS_C_UP

STS_DO2

STS_DO1

STS_DI

STS_GATE

Byte 6 Bit 7: Zero-crossing in the count range in counting without a main counting direction

Bit 6: Lower count limit

Bit 5: Upper count limit

Bit 4: Comparator 2 status

Bit 3: Comparator 1 status

Bit 2: Reserve = 0

Bit 1: Reserve = 0

Bit 0: Synchronization status

STS_ND

STS_UFLW

STS_OFLW

STS_CMP2

STS_CMP1

STS_SYN

Byte 7 Reserve = 0

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Table 3-4 Control Interface (Outputs)

Address Assignment

Bytes 0 to 3 Load Value Direct, Preparatory, Comparison Value 1 or 2

Byte 0 Behavior of DO1, DO2 of the 1Count5V/500kHz

Bit 2 Bit 1 Bit 0 Function of DO1

0 0 0 Output

0 0 1 Activation at a counter status ≥ the comparison value

0 1 0 Activation at a counter status ≤ the comparison value

0 1 1 Pulse on reaching the comparison value

1 0 0 Switching at comparison values

1 0 1 Disabled

1 1 0 Disabled

1 1 1 Disabled

Bit 5 Bit 4 Function of DO2

0 0 Output

0 1 Activation at a counter status ≥ the comparison value

1 0 Activation at a counter status ≤ the comparison value

1 1 Pulse on reaching the comparison value

Bytes 1 to 3 Byte 1: Hysteresis DO1, DO2 (range 0 to 255)

Byte 2: Pulse duration [2 ms] DO1, DO2 (range 0 to 255)

Byte 3: Reserve = 0

Byte 4 EXTF_ACK

CTRL_DO2

SET_DO2

CTRL_DO1

SET_DO1

RES_STS

CTRL_SYN

SW_GATE

Bit 7: Diagnostic error acknowledgment

Bit 6: Enable DO2

Bit 5: DO2 control bit

Bit 4: Enable DO1

Bit 3: DO1 control bit

Bit 2: Start resetting of status bit

Bit 1: Enable synchronization

Bit 0: SW gate control bit

Byte 5

C_DOPARAM

CMP_VAL2

CMP_VAL1

LOAD_PREPARE

LOAD_VAL

Bit 7: Reserve = 0

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Change function and behavior of DO1, DO2

Bit 3: Load comparison value 2

Bit 2: Load comparison value 1

Bit 1: Load counter (preparatory)

Bit 0: Load counter (direct)

Bytes 6 to 7 Reserve = 0

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Notes on the Control Bits

Control Bits Notes

C_DOPARAM Change function and behavior of DO1, DO2 (see Figure 3-19)

The values from bytes 0 to 2 are accepted as new function, hysteresis, and pulse duration of DO1,DO2. This may result in the following error: The conditions for switching at comparison values arenot fulfilled.

CMP_VAL1 Load comparison value 1 (see Figure 3-19)

The value from bytes 0 to 3 is transferred to comparison value 1 by means of the control bit “Loadcomparison value 1 – CMP_VAL1”.

CMP_VAL2 Load comparison value 2 (see Figure 3-19)

The value from bytes 0 to 3 is transferred to comparison value 2 by means of the control bit “Loadcomparison value 2 – CMP_VAL2”.

CTRL_DO1 Enable DO1

You use this bit to enable the DO1 output.

CTRL_DO2 Enable DO2

You use this bit to enable the DO2 output.

CTRL_SYN You use this bit to enable synchronization.

EXTF_ACK Error acknowledgment

The error bits must be acknowledged by means of the control bit EXTF_ACK after the cause isremoved. (see Figure 3-21)

LOAD_PREPARE Load counter – preparatory (see Figure 3-19)

The value from bytes 0 to 3 is adopted as the load value.

LOAD_VAL The value from bytes 0 to 3 is loaded directly as the new counter value (see Figure 3-19).

RES_STS Start resetting of status bit

The status bits are reset by means of the acknowledgment process between the RES_STS bit andthe RES_STS_A bit. (see Figure 3-26)

SET_DO1 DO1 control bit

Switches the DO1 digital output on and off when CTRL_DO1 is set.

SET_DO2 DO2 control bit

Switches the DO2 digital output on and off when CTRL_DO2 is set.

SW_GATE SW gate control bit

The SW gate is opened/closed by means of the control interface with the SW_GATE bit.

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Notes on the Feedback Bits

Feedback Bits Notes

ERR_24V Short circuit of the sensor supply

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if parameterized.

ERR_DO1 Short circuit/wire break/overtemperature at output DO1

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if parameterized.

ERR_DO2 Short circuit/wire break/overtemperature at output DO2

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if parameterized.

ERR_ENCODER Short circuit / wire break of 5 V sensor signal

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if parameterized.

ERR_LOAD Load function error (see Figure 3-19)

The bits LOAD_VAL, LOAD_PREPARE, CMP_VAL1, CMP_VAL2, and C_DOPARAM cannot beset simultaneously during transfer. This results in setting the ERR_LOAD status bit, similar toloading an incorrect value (which is not accepted).

ERR_PARA Parameter assignment error – ERR_PARA

RES_STS_A Resetting of the status bits active (see Figure 3-18)

STS_C_DN Down direction status

STS_C_UP Up direction status

STS_CMP1 Comparator 1 status

The STS_CMP1 status bit indicates that the output is or was switched on. It must be acknowledgedby means of the RES_STS control bit. If the status bit is acknowledged when the output is stillswitched on, the bit is set again immediately. This bit is also set if the SET_DO1 control bit is usedwhen DO1 is not enabled.

STS_CMP2 Comparator 2 status

The STS_CMP2 status bit indicates that the output is or was switched on. It must be acknowledgedby means of the RES_STS control bit. If the status bit is acknowledged when the output is stillswitched on, the bit is set again immediately. This bit is also set if the SET_DO2 control bit is usedwhen DO2 is not enabled.

STS_DI DI status

The status of the DI is indicated in all modes by means of the STS_DI bit at the feedback interface.

STS_DO1 DO1 status

The STS_DO1 status bit indicates the status of the DO1 digital output.

STS_DO2 DO2 status

The STS_DO2 status bit indicates the status of the DO2 digital output.

STS_GATE Internal gate status: Counting

STS_LOAD Load function running (see Figure 3-19)

STS_ND Zero-crossing in the count range in counting without a main counting direction. The bit must bereset by means of the RES_STS control bit.

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Feedback Bits Notes

STS_OFLW

STS_UFLW

Upper count limit violated

Lower count limit violated

Both bits must be reset.

STS_SYN Synchronization status

After successful synchronization, the STS_SYN bit is set. It must be reset by the RES_STS controlbit.

Access to the Control and Feedback Interface in STEP 7 Programming

Configuration with STEP 7 Using the DDB File 1)

(Hardware Catalog\PROFIBUS DP\Additional FIELD DEVICES\I/O\ET 200S)

Configuration with STEP 7 Using HWCONFIG

(Hardware Catalog\PROFIBUS DP\ET 200S)

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

Control interface Write with SFC 15 “DPWR_DAT” Transfer instruction (e.g. T PQD)

1)Load and transfer commands are also possible with CPU 3xxC, CPU 318-2 (as of V3.0), CPU 4xx (as of V3.0).

Resetting of the Status Bits STS_SYN, STS_CMP1, STS_CMP2, STS_OFLW, STS_UFLW, STS_ND

Feedback signals:One of the status bits t

Control bit:RES_STS

Feedback bit:RES_STS_A t

t

Event still pending at reset

Request reset

The 1Count5V/500kHz executes resetting

Removal of the request

Reset executed

Figure 3-18 Resetting of Status Bits

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Acceptance of Values with the Load Function

Error bit:ERR_LOAD

Request value transfer and make value available.

t

Remove request and keep value available.

Value accepted. End of transfer

The 1Count5V/500kHz has understood the request

Control bit:LOAD_VALLOAD_PREPARECMP_VAL1CMP_VAL2C_DOPARAM

Feedback bit:STS_LOAD t

t

Figure 3-19 Acceptance of Values with the Load Function

Note

Only one of the following control bits can be set at a particular time:

CMP_VAL1 or CMP_VAL2 or LOAD_VAL or LOAD_PREPARE or C_DOPARAM.

Otherwise, the ERR_LOAD error is reported until all the specified control bits aredeleted again.

The ERR_LOAD error bit is only deleted when the following is carried out correctly.

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Acknowledgment in Clocked Mode

In clocked mode exactly 4 PROFIBUS DP cycles are required to reset the statusbits and to accept values with the load function.

Status bit of the mo-dule

Control bitin the userprogram

1st DP cycle 4th DP cycle3rd DP cycle2nd DP cycle

Ti Ti

TDP TDPTDPTDPTDP

TiTi Ti

Figure 3-20 Acknowledgment in Clocked Mode

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Error Detection

The program errors must be acknowledged. They have been detected by the1Count5V/500kHz and are indicated at the feedback interface. A channel-specificdiagnosis is carried out after you have enabled group diagnosis at parameterassignment (see Chapter 6 of the ET 200S Distributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

An error has occurred, the 1Count5V/500kHz setsan error bit, a diagnostic message may appear,error detection continues.

Error eliminated; when EXTF_ACK is set by the user pro-gram, the 1Count5V/500kHz deletes the error bit; a dia-gnostic message may appear.

Error acknowledgmentEXTF_ACK

Error bit ERR_24V,for example

Figure 3-21 Error Acknowledgment

In the case of continuous error acknowledgment (EXTF_ACK=1) or at CPU/MasterStop, the 1Count5V/500kHz reports the errors as soon as they are detected anddeletes them as soon as they have been eliminated.

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3.6.10 Parameter Assignment for the Count Modes

You can parameterize the 1Count5V/500kHz with one of the following:

– Using a DDB file (http://www.ad.siemens.de/csi/gsd)

– With STEP 7 as of V5.1 SP4

Parameter List for Count Modes

Parameters Value Range Default

Enable

Group diagnosis Disable/enable Disable

Behavior in the Event of the Parent Controller Failing

Reaction toCPU-Master-STOP

Turn off DO/Continue working mode/DO substitute a value/DO keep last value

Turn off DO

Sensor Parameters

Signal evaluation A, B Rotary transducer (single/dual/quad) Rotary transducer(single)

Diagnosis A and B Off/on Off

Diagnosis N Off/on Off

Direction input B Normal/Inverted Normal

Output Parameters

Function of DO1 Output/Switch on at counter status ≥comparison value/Switch on at counter status≤ comparison value/Pulse on reaching the comparison value/Switch at comparison values

Output

Function of DO2 Output/Switch on at counter status ≥ comparison value/Switch on at counter status ≤ comparison value/Pulse on reaching the comparison value

Output

Substitute value DO1 0/1 0

Substitute value DO2 0/1 0

Diagnostics DO11 Off/on Off

Diagnostics DO21 Off/on Off

Hysteresis DO1, DO2 0 to 255 0

Pulse duration [2 ms] DO1,DO2

0 to 255 0

1 DO1/DO2 diagnostics (wire break) is possible only with pulse lengths of > 90 ms at digital outputDO1/DO2.

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Parameters Value Range Default

Mode

Count mode Endless counting/Once-only counting/Periodic counting

Endless counting

Gate function Terminate counting/Interrupt counting

Terminate counting

Input signal HW gate Normal/Inverted Normal

Function DI Input/HW gate/latch and retrigger at positive edge/ synchronization at positive edge/latch at positive edge/HW enable for synchronization

Input

Synchronization2 Once only/Periodic Once

Main count direction None/Up/Down None

Upper count limit 2 to 7FFF FFFF 7FFF FFFF

2 Only relevant if DI function = synchronization at positive edge or HW enable for synchronization

Parameter assignment error

• Incorrect mode

• Incorrect main count direction

• The HW gate input signal parameter is set to inverted and the DI functionparameter is not set on HW gate.

• Upper count limit incorrect

• The value for the behavior of DO2 is not set to output although switching atcomparison values has been parameterized for DO1.

• The value for hysteresis does not equal 0 although switching at comparisonvalues has been parameterized for DO1.

• DI function incorrect

• “On” is set for diagnosis N although “Off” was set for diagnosis A and B.

What to Do in the Event of Errors

Check the set value ranges.

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3.7 Measurement Modes

You can choose between the following modes:

• Frequency measurement

• Period measurement

• Rotational speed measurement

To execute one of these modes, you have to parameterize the 1Count5V/500kHz.(See Section 3.7.7)

Measurement Process

The measurement is carried out during the parameterized integration time. Whenthe integration time elapses, the measured value is updated.

The end of a measurement is indicated by the STS_CMP1 status bit. This bit isreset by the RES_STS control bit at the control interface.

If there were not at least two rising edges in the parameterized integration time, 0is returned as the measured value.

A value of –1 is returned by the end of the first integration time.

You can change the integration time for the next measurement during operation.

Reversal of the direction of rotation

If the direction of rotation is reversed during an integration time, the measuredvalue for this measurement period is uncertain. If you evaluate the STS_C_UP andSTS_C_DN feedback bits (direction evaluation), you can respond to any processirregularities.

Gate Control

To control the 1Count5V/500kHz, you have to use the gate functions.

Clocked Mode

In clocked mode the 1Count5V/500kHz accepts the control bits and control valuesfrom the control interface in each PROFIBUS DP cycle and reports back theresponse to them in the same cycle.

In each cycle the 1Count5V/500kHz transfers a measured value and the status bitsthat were valid at the time Ti.

The measurement starts and ends at the time Ti.

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Integration Time in Clocked Mode

If the integration time lasts several TDP cycles, you can recognize the newmeasurement value in the user program on status bit STS_CMP1 (measurementcompleted) of the feedback interface. This makes it possible to monitor themeasurement procedure or for it to be synchronized. It takes 4 TDP cycles,however, for this message to be acknowledged. The minimum integration time inthis case is (4 × TDP).

If the application can tolerate a jitter in the integration time of a TDP and ameasured value that remains constant for several cycles, you don’t have tocontinually evaluate status bit STS_CMP1. Integration times of (1 × TDP) to (3 × TDP) are then possible.

Because clocking was lost in the last TDP cycle of the integration time, theintegration time is increased by one TDP cycle. This does not corrupt the measuredvalue.

Note

You must not violate the range limits for the integration time (see Tables 3-5, 3-6and 3-7 on pages 3-49, 3-51 and 3-54).

If the range limits are violated, this results in a parameter assignment error, andthe 1Count5V/500kHz does not go into clocked mode.

Note

When you change the configuration from non-clocked to clocked mode and viceversa, you must always adjust the integration time parameter if you want to keepthe length of the integration time.

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3.7.1 Frequency Measurement

Definition

In frequency measurement mode, the 1Count5V/500kHz counts the pulses thatarrive within a set integration time.

Integration Time

Preset the integration time with the integration time parameter (see Table 3-5).

Table 3-5 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 1000

TDP < 10 ms n × TDP ( 10 ms/TDP [ms] ) +1 1 1000Clocked mode

TDP ≥ 10 ms n × TDP 1 10000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count5V/500kHz generates aparameterization error and will not go into clocked mode.

Frequency Measurement

The value of the frequency determined is made available in the unit Hz*10 –3. Youcan read the measured frequency value at the feedback interface (bytes 0 to 3).

Count pulses

Internal gate

Beginning of frequencymeasurement

Integration time

End of frequencymeasurement

Integration time

Figure 3-22 Frequency Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Lower Limit fu Upper Limit fo

0 to 499,999,999 Hz*10–3 fu+1 to 500,000,000 Hz*10–3

Possible Measurement Ranges with Error Indication

Integration Time fmin absolute error fmax absolute error

10 s 0.1 Hz ± 0.001 Hz 500000 Hz ± 90 Hz

1 s 1 Hz ± 0.001 Hz 500000 Hz ± 55 Hz

0.1 s 10 Hz ± 0.002 Hz 500000 Hz ± 52 Hz

0.01 s 100 Hz ± 0.013 Hz 500000 Hz ± 63 Hz

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.7.4)

Function of the DO1 Digital Output

Select one of the following functions for the DO1 digital output:

• Output (no switching by means of limit monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 3.7.5)

Function of the DO2 Digital Output

• Output

Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 3.7.5 and 3.7.6)

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3.7.2 Rotational Speed Measurement

Definition

In rotational speed measurement mode, the 1Count5V/500kHz counts the pulsesthat arrive from a rotational speed sensor within a set integration time andcalculates the speed of the connected motor.

Integration Time

Preset the integration time with the integration time parameter (see Table 3-6).

Table 3-6 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 1000

TDP < 10 ms n × TDP ( 10 ms/TDP [ms] ) +1 1 1000Clocked mode

TDP ≥ 10 ms n × TDP 1 10000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count5V/500kHz generates aparameterization error and will not go into clocked mode.

Rotational Speed Measurement

For rotational speed measurement mode, you also have to parameterize thepulses per sensor or motor revolution.

The rotational speed is returned in the unit 1x10–3 /min.

Count pulses

Internal gate

Beginning of rotationalspeed measurement

End of rotational speedmeasurement

Integration time Integration time

Figure 3-23 Rotational Speed Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Lower limit nu Upper limit no

0 to 24,999,999 x10–3 /min nu+1 to 25,000,000 *10–3 /min

Possible Measurement Ranges with Error Indication(Number of Pulses per Encoder Revolution = 60)

Integration time nmin absolute error nmax absolute error

10 s 1 /min ± 0.03 /min 25000 /min ± 4.5 /min

1 s 1 /min ± 0.03 /min 25000 /min ± 2.8 /min

0.1 s 10 /min ± 0.03 /min 25000 /min ± 2.6 /min

0.01 s 100 /min ± 0.04 /min 25000 /min ± 3.2 /min

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.7.4)

Function of the DO1 Digital Output

Select one of the following functions for the DO1 digital output:

• Output (no switching by means of limit-value monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 3.7.5)

Function of the DO2 Digital Output

• Output

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Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 3.7.5 and 3.7.6)

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3.7.3 Period Measurement

Definition

In period measurement mode, the 1Count5V/500kHz measures the time betweentwo rising edges of the count signal by counting the pulses of an internalquartz-accurate reference frequency (16 MHz) within a set integration time.

Integration Time

Preset the integration time with the integration time parameter (see Table 3-7).

Table 3-7 Calculating the Integration Time

Specific Conditions Integration Range of nTime

nmin nmax

Non-clocked mode Any TDP n × 10 ms 1 12000

TDP < 10 ms n × TDP 10 ms/TDP [ms] +1 1 12000Clocked mode

TDP ≥ 10 ms n × TDP 1 120000 ms/TDP [ms] 1

1 Any digits after the decimal point that come about after dividing by TDP can be omitted.These limits must not be violated. If these limits are violated the 1Count5V/500kHz generates aparameterization error and will not go into clocked mode.

Period Measurement

The value of the determined period duration is made available in the unit 1 s and1/16 s. You can read the measured period at the feedback interface (bytes 0 to3).

Count pulses

Internal gate

Start of period measurement End of period measurement

Period

Integration time Integration time

Figure 3-24 Period Measurement with Gate Function

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Limit-Value Monitoring

The following value ranges are permitted for limit-value monitoring:

Resolution 1 s

Lower Limit Tu Upper Limit To

0 to 119999999 s Tu+1 to 120000000 s

Resolution 1/16 s

Lower Limit Tu Upper Limit To

0 to 1919999999 s Tu+1 to 1920000000 s

Possible Measurement Ranges with Error Indication

Resolution 1s

Integration time Tmin ± absolute error T ± absolute error

100 s 1 µs* (10 ± 0) 1 µs* (100000000 ± 10000)

10 s 1 µs* (10 ± 0) 1 µs* (10000000 ± 1000)

1 s 1 µs* (10 ± 0) 1 µs* (1000000 ± 100)

0.1 s 1 µs* (10 ± 0) 1 µs* (100000 ± 10)

0.01 s 1 µs* (10 ± 0) 1 µs* (10000 ± 1)

Resolution 1/16 s

Integration time Tmin ± absolute error T ± absolute error

100 s 1/16 µs* (160 ± 0) 1/16 µs* (1600000000 ± 160000)

10 s 1/16 µs* (160 ± 0) 1/16 µs* (160000000 ± 16000)

1 s 1/16 µs* (160 ± 0) 1/16 µs* (16000000 ± 1600)

0.1 s 1/16 µs* (160 ± 0) 1/16 µs* (1600000 ± 160)

0.01 s 1/16 µs* (160 ± 0) 1/16 µs* (160000 ± 16)

Function of the Digital Input

Select one of the following functions for the digital input:

• Input

• HW gate (see Section 3.7.4)

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Function of the DO1 Digital Output

Select one of the following functions for the digital output:

• Output (no switching by means of limit-value monitoring)

• Measured value outside the limits

• Measured value under the lower limit

• Measured value over the upper limit

(See Section 3.7.5)

Function of the DO2 Digital Output

• Output

Values That Can Be Changed during Operation:

• Lower limit (LOAD_PREPARE)

• Upper limit (LOAD_VAL)

• Function of the DO1 (C_DOPARAM) digital output

• Integration time (C_INTTIME)

(See Section 3.7.5 and 3.7.6)

3.7.4 Gate Functions in Measurement Modes

Software Gate and Hardware Gate

The 1Count5V/500kHz has two gates

• A software gate (SW gate), which is controlled by the SW_GATE control bit.

The software gate can only be opened by a 0-to-1 edge change of theSW_GATE control bit. It is closed when this bit is reset. Note the transfer timesand run times of your control program in this connection.

• A hardware gate (HW gate), which is controlled by means of the digital input onthe 1Count5V/500kHz. You parameterize the hardware gate as a function of thedigital input. It is opened when there is a 0-to-1 edge change at the digital inputand closed when there is a 1-to-0 edge change.

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Internal Gate

The internal gate is the logical AND of the HW gate and SW gate. Counting is onlyactive when the HW gate and the SW gate are open. The STS_GATE feedback bit(internal gate status) indicates this. If a HW gate has not been parameterized, thesetting of the SW gate is decisive.

Gate Control by Means of the SW Gate Only

The opening/closing of the SW gate starts/stops measurement.

If the SW gate is opened in clocked mode in PROFIBUS DP cycle ”n” by settingthe SW_GATE control bit, the measurement starts at the time Ti in cycle “n+1”.

Gate Control by Means of the SW Gate and HW Gate

The opening and closing of the SW gate with the HW gate open starts/stopsmeasurement.

The opening and closing of the HW gate with the SW gate open starts/stopsmeasurement.

The SW gate is opened/closed by means of the control interface with theSW_GATE bit.

The HW gate is opened/closed by means of a 24-V signal at the digital input.

In clocked mode, when the SW gate is open, the measurement starts at the timeTi, immediately after the HW gate has opened. The measurement ends at the timeTi, which occurs immediately after the HW gate has closed.

When the HW gate is open, the measurement starts at the time Ti in the cycle,immediately after the SW has opened, and ends at the time Ti in the cycle, whichoccurs immediately after the SW gate has closed.

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3.7.5 Behavior of the Outputs in Measurement Modes

The various ways of setting the behavior of the outputs are described in thissection.

You can assign parameters to the digital outputs of the 1Count5V/500kHz.

You can store an upper and a lower limit for frequency measurement, rotationalspeed measurement or period measurement. If the limits are violated, digital outputDO1 is activated. These limit values can be parameterized and changed with theload function.

You can change the function and the behavior of the digital outputs duringoperation. The new function takes effect immediately. In clocked mode it alwaystakes effect at the time Ti.

You can choose from the following functions:

• Output

• Measured value outside the limits (limit-value monitoring)

• Measured value under the lower limit (limit-value monitoring)

• Measured value over the upper limit (limit-value monitoring)

Output

If you want to switch the outputs on or off, you must enable them with theCTRL_DO1 and CTRL_DO2 control bits.

You can switch the outputs on and off with the control bits SET_DO1 andSET_DO2.

You can query the status of the outputs with the status bits STS_DO1 andSTS_DO2 at the feedback interface.

In clocked mode, outputs DO1 and DO2 are switched at the time To.

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Limit-Value Monitoring

Gate start

0

Measured valueLower limit Upper limit

UFLW OFLW

Figure 3-25 Limit-Value Monitoring

After the integration time elapses, the measured value obtained (frequency,rotational speed, or period) is compared with the parameterized limit values.

If the current measured value is under the parameterized lower limit (measuredvalue < lower limit), the STS_UFLW = 1 bit is set in the feedback interface.

If the current measured value is over the parameterized high limit (measuredvalue > upper limit), the STS_OFLW = 1 bit is set in feedback interface.

You must acknowledge these bits by means of the RES_STS control bit.

If the measured value is still outside or again outside the limits afteracknowledgment, the corresponding status bit is set again.

If you set the lower limit at 0, you switch off dynamic monitoring of violation of thelower limit value.

Depending on the parameterization, the enabled digital output DO1 can be set bymeans of limit-value monitoring:

“Function DO1” Parameter DO1 is Set ...

Measured value outside the limits Measured value < lower limit ORMeasured value > upper limit

Measured value under the lower limit Measured value < lower limit

Measured value over the upper limit Measured value > upper limit

In clocked mode, the output switches at the time To.

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3.7.6 Assignment of the Feedback and Control Interfaces for theMeasurement Modes

Note

The following data of the control and feedback interfaces are consistent for the1Count5V/500kHz:

• Bytes 0 to 3

• Bytes 4 to 7

Use the access or addressing mode for data consistency over the entire controland feedback interface on your DP master (only for configuration using the DDBfile).

Table 3-8 Feedback Interface (Inputs)

Address Assignment Designation

Bytes 0 to 3 Measured value

Byte 4 Bit 7: Short circuit of the sensor supply

Bit 6: Short circuit / wire break / overtemperature

Bit 5: Parameter assignment error

Bit 4: Short circuit / wire break / overtemperature

Bit 3: Short circuit / wire break / sensor signal

Bit 2: Resetting of status bit active

Bit 1: Load function error

Bit 0: Load function active

ERR_24V

ERR_DO

ERR_PARA

ERR_DO2

ERR_ENCODER

RES_STS_A

ERR_LOAD

STS_LOAD

Byte 5 Bit 7: Down direction status

Bit 6: Up direction status

Bit 5: Reserve = 0

Bit 4: DO2 status

Bit 3: DO1 status

Bit 2: Reserve = 0

Bit 1: DI status

Bit 0: Internal gate status

STS_C_DN

STS_C_UP

STS_DO2

STS_DO1

STS_DI

STS_GATE

Byte 6 Bit 7: Reserve = 0

Bit 6: Measurement range lower limit

Bit 5: Measurement range upper limit

Bit 4: Reserve = 0

Bit 3: Measurement completed

Bit 2: Reserve = 0

Bit 1: Reserve = 0

Bit 0: Reserve = 0

STS_UFLW

STS_OFLW

STS_CMP1

Byte 7 Reserve = 0

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Table 3-9 Control Interface (Outputs)

Address Assignment

Bytes 0 to 3 Lower limit or upper limit

Function of DO1

Byte 0: Bit 1 Bit 0 Function of DO1

0 0 Output

0 1 Measured value outside the limits

1 0 Measured value under the lower limit

1 1 Measured value over the upper limit

Bytes 1 to 3: Reserve = 0

Integration time

Byte 0, 1: Integration time [n*10ms]

(Range 1...1000/12000)

Byte 2/3: Reserve = 0

Byte 4 Bit 7: Diagnostic error acknowledgment – EXTF_ACK

Bit 6: Enable DO2 – CTRL_DO2

Bit 5: DO2 control bit – SET_DO2

Bit 4: Enable DO1 – CTRL_DO1

Bit 3: DO1 control bit – SET_DO1

Bit 2: Start resetting of status bit – RES_STS

Bit 1: Reserve = 0

Bit 0: SW gate control bit – SW_GATE

Byte 5 Bit 7: Reserve = 0

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Change function of DO1, C_DOPARAM

Bit 3: Reserve = 0

Bit 2: Change integration time, C_INTTIME

Bit 1: Load upper limit – LOAD_PREPARE

Bit 0: Load lower limit – LOAD_VAL

Bytes 6 to 7 Reserve = 0

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Notes on the Control Bits

Control Bits Notes

C_DOPARAM Change function of DO1 (see Figure 3-27)

The value from byte 0 is adopted as the new function of DO1.

C_INTTIME Change integration time (see Figure 3-27)

The value from bytes 0 and 1 is adopted as the new integration time for the next measurement.

CTRL_DO1 Enable DO1

You use this bit to enable the DO1 output.

CTRL_DO2 Enable DO2

You use this bit to enable the DO2 output.

EXTF_ACK Error acknowledgment

The error bits must be acknowledged by means of the control bit EXTF_ACK after the cause isremoved. (see Figure 3-29)

LOAD_PREPARE Load upper limit (see Figure 3-27)

The value from bytes 0 to 3 is adopted as the new upper limit.

LOAD_VAL Load lower limit (see Figure 3-27)

The value from bytes 0 to 3 is adopted as the new lower limit.

RES_STS Start resetting of status bit

The status bits are reset by means of the acknowledgment process between the RES_STS bit andthe RES_STS_A bit. (see Figure 3-26)

SET_DO1 DO1 control bit

Switches the DO1 digital output on and off when CTRL_DO1 is set.

SET_DO2 DO2 control bit

Switches the DO2 digital output on and off when CTRL_DO2 is set.

SW_GATE SW gate control bit

The SW gate is opened/closed by means of the control interface with the SW_GATE bit.

Notes on the Feedback Bits

Feedback Bits Notes

ERR_24V Short circuit of the sensor supply

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if assigned as parameter.

ERR_DO1 Short circuit/wire break/overtemperature at output DO1

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if assigned as parameter.

ERR_DO2 Short circuit/wire break/overtemperature at output DO2

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if assigned as parameter.

ERR_ENCODER Short circuit / wire break of sensor signal

The error bit must be acknowledged by means of the EXTF_ACK control bit (see Figure 3-29).Diagnostic message, if parameterized.

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Feedback Bits Notes

ERR_LOAD Load function error (see Figure 3-27)

The bits LOAD_VAL, LOAD_PREPARE, C_DOPARAM, and C_INTTIME cannot be setsimultaneously during transfer. This results in setting the ERR_LOAD status bit, similar to loadingan incorrect value (which is not accepted).

ERR_PARA Parameter assignment error – ERR_PARA

RES_STS_A Resetting of the status bits active (see Figure 3-26)

STS_C_DN Down direction status

STS_C_UP Up direction status

STS_CMP1 Measurement completed

The measured value is updated after every interval that elapses. The end of a measurement (afterthe interval has elapsed) is indicated by means of the STS_CMP1 status bit. This bit is reset by theRES_STS control bit at the control interface.

STS_DI DI status

The status of the DI is indicated in all modes by means of the STS_DI bit at the feedback interface.

STS_DO1 DO1 status

STS_DO2 DO2 status

STS_GATE Internal gate status: Measuring

STS_LOAD Load function running (see Figure 3-27)

STS_OFLW

STS_UFLW

Upper measurement limit violated

Lower measurement limit violated

Both bits must be reset.

Access to the Control and Feedback Interface in STEP 7 Programming

Configuration with STEP 7 Using the DDB File 1)

(Hardware Catalog\PROFIBUS DP\Additional FIELD DEVICES\I/O\ET 200S)

Configuration with STEP 7 Using HWCONFIG

(Hardware Catalog\PROFIBUS DP\ET 200S)

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

Control interface Write with SFC 15 “DPWR_DAT” Transfer instruction (e.g. T PQD)

1)Load and transfer commands are also possible with CPU 3xxC, CPU 318-2 (as of V3.0), CPU 4xx (as of V3.0).

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Resetting of the Status Bits STS_CMP1, STS_OFLW, STS_UFLW

Feedback signals:One of the statusbits

t

Control bit:RES_STS

Feedback bit:RES_STS_A t

t

Event still pending at reset

Request reset

The 1Count5V/500kHz executes resetting

Removal of the request

Reset executed

Figure 3-26 Resetting of Status Bits

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Acceptance of Values with the Load Function

Error bit:ERR_LOAD

Request value transfer and make value available.

t

Remove request and keep value available.

Value accepted. End of transfer

The 1Count5V/500kHz has understood the request

Control bit:LOAD_VALLOAD_PREPAREC_DOPARAMC_INTTIME

Feedback bit:STS_LOAD

t

t

Figure 3-27 Acceptance of Values with the Load Function

Note

Only one of the following control bits can be set at a particular time:

LOAD_VAL or LOAD_PREPARE or C_DOPARAM or C_INTTIME.

Otherwise, the ERR_LOAD error is reported until all the specified control bits aredeleted again.

The ERR_LOAD error bit is only deleted when a correct value is transferred asfollows.

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Acknowledgment in Clocked Mode

In clocked mode exactly 4 PROFIBUS DP cycles are required to reset the statusbits and to accept values during the load function.

Status bit of the mo-dule

Control bitin the userprogram

1st DP cycle 4th DP cycle3rd DP cycle2nd DP cycle

Ti Ti

TDP TDPTDPTDPTDP

TiTi Ti

Figure 3-28 Acknowledgment in Clocked Mode

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Error Detection

The diagnostic errors must be acknowledged. They have been detected by the1Count5V/500kHz and are indicated at the feedback interface. A channel-specificdiagnosis is carried out after you have enabled group diagnosis at parameterassignment (see Chapter 6 of the ET 200S Distributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

An error has occurred, the 1Count5V/500kHz setsan error bit, a diagnostic message may appear,error detection continues.

Error eliminated; when EXTF_ACK is set by the user pro-gram, the 1Count5V/500kHz deletes the error bit; a dia-gnostic message may appear.

Error acknowledgmentEXTF_ACK

Error bit ERR_24V,for example

Figure 3-29 Error Acknowledgment

In the case of continuous error acknowledgment (EXTF_ACK=1) or at CPU/MasterStop, the 1Count5V/500kHz reports the errors as soon as they are detected anddeletes them as soon as they have been eliminated.

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3.7.7 Parameter Assignment for Measurement Modes

You can parameterize the 1Count5V/500kHz with one of the following:

– Using a DDB file (http://www.ad.siemens.de/csi/gsd)

– With STEP 7 as of V5.1 SP4

Parameter List for Measurement Modes

Parameters Value Range Default

Enable

Group diagnosis Disable/enable Disable

Behavior in the Event of the Parent Controller Failing

Reaction to CPU-Master-STOP Turn off DO/Continue working mode/DO substitute a value/DO keep last value

Turn off DO

Diagnosis A and B Off/on Off

Direction input B Normal/Inverted Normal

Output Parameters

Diagnostics DO11 Off/on Off

Diagnostics DO21 Off/on Off

Function DO1 Output/Outside the limits/Under the lower limit/Over the upper limit

Output

Substitute value DO1 0/1 0

Substitute value DO2 0/1 0

1 DO1/DO2 diagnostics (wire break, short circuit) is possible only with pulse lengths of > 90 ms at digitaloutput DO1/DO2.

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Parameters Value Range Default

Mode

Measurement mode Frequency measurement/Rotational speed measurement/Period measurement

Frequency measurement

Resolution of period 1 s

1/16 s

1 s

Function DI Input/HW gate Input

Input signal HW gate Normal/Inverted Normal

Low limit Frequency measurement:0 to fmax–1

Rotational speed measurement:0 to nmax–1

Period measurement:0 to tmax–1

0

0

0

High limit Frequency measurement:Lower limit + 1 to fmax

Rotational speed measurement:Lower limit + 1 to nmax

Period measurement:Lower limit + 1 to tmax

fmax

nmax

tmax

Integration time [n*10ms] Frequency measurement:1 to 1000

Rotational speed measurement:1 to 1000

Period measurement:1 to 12000

10

10

10

Sensor pulses per revolution2 1 to 65535 1

2 Only relevant in rotational speed measurement mode

Parameter Assignment Error

• Incorrect mode

• Lower limit incorrect

• Upper limit incorrect

• Integration time incorrect

• Sensor pulses incorrect

What to Do in the Event of Errors

Check the set value ranges.

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3.8 Count and Direction Evaluation

Signal Evaluation A, B

Signal evaluation by means of A, B allows you to count directionally. Differentevaluation modes are possible depending on what you parameterize:

Rotary Transducer

The 1Count5V/500kHz can count the edges of the signals. Normally, only the edgeat A is evaluated (single evaluation). To obtain a higher resolution, at parameterassignment you can select whether the signals are to be subjected to single,double, or quadruple evaluation.

Multiple evaluation is only possible with asymmetric 24 V incremental encoderswith A and B signals that are 90 degrees out of phase.

Single Evaluation

Single evaluation means that only one edge of A is evaluated; up count pulses arerecorded at a rising edge at A and low level at B, and down count pulses arerecorded at a falling edge at A and low level at B.

The diagram below illustrates the single evaluation of the signals.

Signal A

Signal B

Up countpulsesDown countpulses

Up Down

Figure 3-30 Single Evaluation

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Double Evaluation

Double evaluation means that the rising and falling edge of the A signal areevaluated. Whether up or down count pulses are generated depends on the levelof the B signal.

The diagram below illustrates the double evaluation of the signals.

Signal A

Signal B

Up countpulsesDown countpulses

Up Down

Figure 3-31 Double Evaluation

Quadruple Evaluation

Quadruple evaluation means that the rising and falling edges of the A and Bsignals are evaluated. Whether up or down count pulses are generated dependson the levels of the A and B signals.

The diagram below illustrates the quadruple evaluation of the signals.

Signal A

Signal B

Up countpulses

Down countpulses Up Down

Figure 3-32 Quadruple Evaluation

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3.9 Behavior at CPU-Master-STOP

You can program what the 1Count5V/500kHz is to do in the event of the failure ofthe parent controller.

Parameters Status of the 1Count5V/500kHz atCPU/Master STOP

What Happens if New ParametersHave Been Assigned?

Turn off DO The current mode is terminated, thegate closed, and the digital outputblocked; comparison values 1 and 2and the load value are reset; theupper and lower limit values, functionand behavior of the digital outputs,and the integration time are handledin accordance with the parameterassignments.

The changed parameters areaccepted and take effect.

Continue working mode1 The current mode continues, and thegate and digital output retain theirstatus.

The gate is closed, the current modeis terminated, the digital output isblocked, and the changedparameters are accepted and takeeffect.

DO substitute a value The current mode is terminated, thegate closed, and the substitute valuethat was assigned as a parameter ofthe digital output is switched through; comparison values 1 and 2 and theload value are reset; the upper andlower limit values, function andbehavior of the digital outputs, andthe integration time are handled inaccordance with the parameterassignments.

When a pulse is output when thecomparison value is reached, thesubstitute value is 1 only for theduration of the pulse.

The changed parameters areaccepted and take effect.

DO keep last value The current mode is terminated, thegate closed, and the status of thedigital output is maintained; comparison values 1 and 2 and theload value are reset; the upper andlower limit values, function andbehavior of the digital outputs, andthe integration time are handled inaccordance with the parameterassignments.

The changed parameters areaccepted and take effect.

1 If the mode is to continue during a change from CPU-/Master-STOP to RUN (startup), the CPU/Mastercannot clear the outputs.Possible solution: In the part of the user program that is processed during startup, set the SW gate controlbit and transfer the values to the 1Count5V/500kHz.

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Under What Conditions Does the 1Count5V/500kHz Leave the ParameterizedStatus?

The CPU or master must be in RUN mode, and you have to make a change at thecontrol interface.

A New Parameter Assignment of the ET 200S Station by Means of Your CPU/DP Master Takes Place:

• Upon power on of the CPU/DP master

• Upon power on of the IM 151/IM 151 FO

• After failure of the DP transmission

• After loading an altered parameter assignment or configuration of the ET 200Sstation into the CPU/DP master.

• When the 1Count5V/500kHz is inserted

• Upon power on or inserting of the appropriate power module

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3.10 Technical Specifications

Dimensions and Weight of the1Count5V/500kHz

Dimensions W× H ×D(mm)

30×81×52

Weight Approx. 65 g

Data for Specific Modules

Number of Channels

Counter range

1

32 bits

Voltage, Currents, Potentials

Rated load voltage L+

• Range

• Reverse polarityprotection

24 VDC

20.4 to 28.8V

Yes

Galvanic isolation

• Between backplanebus and counterfunction

• Between counterfunction and loadvoltage

Yes

No

Sensor supply

• Output voltage

• Output current

L+ (–0.8V)

Max. 500 mA,short-circuit proof

Current input

• From the backplanebus

• From the loadvoltage L+ (no load)

Max. 10 mA

Typ. 45 mA

Power dissipation Typ. 2 W

Data on the Digital Input

Isolation No, only from shield andbackplane bus

Input voltage

• Rated value

• 0 signal

• 1 signal

24 VDC

–30 V to 5 V

11 V to 30 V

Input current

• 0 signal

• 1 signal

≤2 mA (bias current)

9 mA (typically)

Minimum pulse width 2.5 s

Connection of atwo-wire BERO type 2

Possible

Input characteristic To IEC 1131, Part 2,Type 2

Shielded cable length Max. 50 m

Encoder signals

• Level

• Terminatingresistance

• Differential inputvoltage

• Max. countingfrequency

• Galvanic isolationfrom ET200S bus

• Shielded cable length

To RS 422

330 Ω

Min. 1 V

500 kHz

Yes

Max. 50 m

Data for the Digital Outputs

Output voltage

• Rated value

• 0 signal

• 1 signal

24 VDC

≤3V

≥L+ (–1 V)

Output current

• 0 signal (residualcurrent)

• 1 signal

Permitted Range

Rated value

Switching frequency

• Resistive load

• Inductive load

• Lamp load

Lamp load

Output delay (resistiveload)

Short-circuit protectionfor output

Response threshold

Inductive extinction

Digital input control

Cable lengths

• Unshielded

• Shielded

≤0.5 mA

5 mA ... 2.4 A

2 A

100 Hz

2 Hz

≤10 Hz

≤10 W

100 s

Yes

2.6 A to 4 A

Yes; L+ –(50 to 60 V)

Yes

600 m

1000 m

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Status, Diagnostics

Digital input DI statusdisplay

LED 16 (green)

Digital output DO1status display

Digital output DO2status display

Up count value change

Down count valuechange

Synchronization

Malfunction indication

Diagnostic information

LED 9 (green)

LED 13 (green)

UP LED (green)

DN LED (green)

SYN LED (green)

SF LED (red)

Yes

Measurement Ranges in the MeasurementModes

Maximum measurementrange

• Frequencymeasurement

• Rotational speedmeasurement

• Periodmeasurement

0.1 Hz to 500 kHz

1 /min to 25000 /min

10 s to 120 s

Response Times

Update rate of the countmodes

• Non-clocked mode 1 ms

• Clocked mode TDP

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1SSI

Chapter Overview

Section Description Page

4.1 Product Overview 4-2

4.2 Clocked Mode 4-3

4.3 Brief Instructions on Commissioning the 1SSI 4-4

4.4 Terminal Assignment Diagram 4-8

4.5 Areas of Application in Standard Mode and Fast Mode 4-9

4.6 Functions of the 1SSI 4-10

4.7 Behavior at CPU-Master-STOP 4-20

4.8 Parameter Assignment 4-21

4.9 Control and Feedback Interface in Standard Mode 4-23

4.10 Feedback Interface in Fast Mode 4-26

4.11 Technical Specifications 4-27

4

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4.1 Product Overview

Order Number

6ES7 138-4DB01-0AB0

Compatibility

The 1SSI with the order number 6ES7 138-4DB01-0AB0 replaces the 1SSI withthe order number 6ES7 138-4DB00-0AB0 and is fully compatible. You can use itwith STEP 7 as of V5.0 SP3 in non-clocked mode. You will need STEP 7 as ofV5.1 SP4 for clocked mode.

Features

• The 1SSI is an interface between an absolute encoder (SSI) and the parentcontroller. You edit the cyclically recorded encoder value in your controllerprogram.

• Can be operated using terminal modules TM-E15S24-01 and TM-E15S26-A1

• Clocked mode

• Standardization of the encoder value (that is, discounting of adjusted, irrelevantbits in the encoder value).

• Reversal of the direction of rotation to adjust the direction of movement of theabsolute encoder to the axis.

• Latch function for freezing the current encoder value (only possible in standard mode).

• Comparison function between the current encoder value and loadablecomparison values (only possible in standard mode).

• You can select the following types of encoder value detection (4.6.1):

– Free-running

– Synchronous to the update rate

– Clocked

• Fast mode can be selected; with rapid encoder value detection andcompressed functionality (cannot be used with the IM 151 with the ordernumber 6ES7 151-1AA00-0AB0).

Supported Encoder Types

The following encoder types are supported:

• Absolute encoder (SSI) with 13 bits

• Absolute encoder (SSI) with 21 bits

• Absolute encoder (SSI) with 25 bits

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Configuration

You can use either of the following to configure the 1SSI:

– A DDB file (http://www.ad.siemens.de/csi/gsd)

– STEP 7 as of V5.1 SP4

4.2 Clocked Mode

Note

The principles of clocked mode are described in a separate manual.

Hardware

You will require the following for clocked mode of the 1SSI:

• A CPU that supports clocking

• A DP master that supports the equidistant bus cycle

• An IM 151 High Feature

Features

Depending on the system parameter assignment, the 1SSI works in eithernon-clocked or clocked mode.

In clocked mode, the transmission of data between the DP master and 1SSI isclocked to the PROFIBUS DP cycle.

In clocked mode the 8 bytes of the feedback interface are consistent.

If clocking is lost due to faults or failure or a delay in global control (GC), the 1SSIwill return to clocked mode at the next cycle without an error response.

If clocking is lost, the feedback interface is not updated.

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4.3 Brief Instructions on Commissioning the 1SSI

Introduction

These instructions use the example of “position detection” to teach you to set up afunctioning application in which you learn about the basic functions of your 1SSI(hardware and software) and how to check them. In this example, the 1SSI isoperated in standard mode and not in clocked mode.

Requirements

The following requirements must be met:

• You put an ET 200S station into service at an S7 station with a DP master.

• You must have the following:

– A TM-E15S24-01 terminal module

– An 1SSI

– An SSI encoder and the necessary wiring material

Installation, Wiring and Fitting

Install and wire the TM-E15S24-01 terminal module (see Figure 4-1). Connect the1SSI to the terminal module (you will find detailed instructions on how to do this inChapter 5 of the ET 200S Distributed I/O System manual).

TM-E15S24-01 and 1SSI

2

3

4

6

7

8

1 5

SSI

DIM

24 VDC24 VDC

C

DD

CTwisted-pair cables

Twisted-pair cablesD

D

CC

CMP

6ES7 138-4DB01-0AB0

7

UP DN

SF

1SSI

24 VDC

M

Figure 4-1 Terminal Assignment for the Example

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Configuration with STEP 7 Using HWCONFIG

You begin by adapting the hardware configuration of your existing ET 200S station.

Open the relevant project in SIMATIC Manager.

Call the HWCONFIG configuration table in your project.

From the hardware catalog, select the 1SSI entry with the number6ES7 138-4DB01-0AB0 in the information text. Drag the entry to the slot at whichyou have installed your 1SSI.

Double-click this number to open the DP Slave Properties dialog box.

On the Addresses tab, you will find the addresses of the slot to which you havedragged the 1SSI. Make a note of these addresses for subsequent programming.

On the Assigning Parameters tab, you will find the default settings for the 1SSI.Select the encoder type in accordance with the connected SSI encoder and enterall the required data. You will find the encoder data on the type label and in thetechnical specifications of the encoder.

Save and compile your configuration, and download the configuration in STOPmode of the CPU by choosing PLC → Download to Module.

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Integration in the User Program

Create block FC101 and integrate it in your control program (in OB1, for example).This block requires the data block DB1 with a length of 16 bytes. The start addressof the module in the following example is 256.

STL Description

Block: FC101

Network 1: PresettingsL 0T DB1.DBD0T DB1.DBD4

Network 2: Write to the control interface

L DB1.DBD0T PQD 256L DB1.DBD4T PQD 260

Network 3: Read from the feedbackinterface

L PID 256T DB1.DBD8L PID 260T DB1.DBD12

//Delete control bits

//Write 8 bytes to the 1SSI//Configured start address of the outputs

//Read 8 bytes from the 1SSI//Configured start address of the inputs

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Test

Use “Monitor/Modify Variables” to monitor the encoder value and the directionindicator.

Select the “Block” folder in your project. Choose the Insert → S7 Block → VariableTable menu command to insert the VAT 1 variable table, and then confirm withOK.

Open the VAT 1 variable table, and enter the following variables in the “Address”column:

DB1.DBD8 (encoder value)

DB1.DBX12.0 (UP status)

DB1.DBX12.1 (DN status)

Choose PLC → File Connect To → Configured CPU to switch to online.

Choose Variable Monitor to switch to → monitoring.

Switch the CPU to RUN mode.

Change the position of the SSI encoder.

You Can Now:

• See that the UP LED or the DN LED on the 1SSI is on, depending on thedirection in which you change the position of the SSI encoder.

• See that the encoder value in the block changes.

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4.4 Terminal Assignment Diagram

Wiring Rules

The cables (terminals 1 and 5 and terminals 4 and 8) must be shielded,twisted-pair cables. The shield must be supported at both ends. To do this use theshield contact (see the ET 200S Distributed I/O System manual, Appendix A,ET 200S Accessories).

Terminal Assignment

You will find the terminal assignment for the 1SSI in the table below.

Table 4-1 Terminal Assignment of the 1SSI

View Terminal Assignment Remarks

TM-E15S24-01 and EM 1SSI

DIM

24 VDC

C

DD

C

Twisted-paircables

Twisted-paircables

2

3

4

6

7

8

1 5

CMP

6ES7 138-4DB01-0AB0

7

UP DN

24 VDCSSI

DD

CC

24 VDC

M

Terminals 1 to 8

1/5: Data from SSI encoder 1

2/6: Power supplyfor absolute encoder and

2

TM-E15S26-A1 and EM 1SSI

Twisted-pair cables

Twisted-pair cables

SSI

DD

CC

24 VDC

M

AUX1A

4

A

3

A

8

A

7AUX1

AUX1

AUX1

2

3

4

6

7

8

1 5

CMP

6ES7 138-4DB01-0AB0

7

UP DN

DIM

24 VDC

C

DD

C

24 VDC

switch 2

3: Chassis ground

7: Digital inputLatch function

4/8: SSI clock (clock line) 1

1 It is essential that you maintain the correct polarity. If you do not, an absolute encoder error is reported. Signals accordingto RS422

2 Short circuit-proof, maximum 0.5 A.

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4.5 Areas of Application in Standard Mode and Fast Mode

In order to take full advantage of the functionality of the 1SSI for the application inquestion, choose between fast mode and standard mode, depending on yourautomation task.

Areas of Application Mode

• Closed-loop control applications such as closed-loop position controlwith position as actual value

• Fast encoder value detection

Fast

• Cyclic processing of encoder values

• Monitoring or detecting of position points

• Measuring lengths, edge detection, synchronization with workpieces

Standard

Configuring Standard Mode And Fast Mode

Standard Mode Fast Mode

Parameters are assigned to the various modes. You will find the parameter lists in thedescriptions of the modes.

You can integrate the 1SSI in your project in two different ways. Decide whether you wantto work with the DDB file or with STEP 7 using HWCONFIG .

Configuring 1SSI with STEP 7 Using HWCONFIG(in Clocked and Non-Clocked Mode)

Select an entry from the hardware catalog that corresponds to the functionality you want.

For standard mode, select the 1SSI entrywith the number 6ES7 138-4DB01-0AB0 inthe information text.

For fast mode, select the 1SSI fast modeentry with the number6ES7 138-4DB01-0AB0 Fast in theinformation text.

Drag the entry to the slot at which you have installed your 1SSI.

Select the parameters.

Configuring 1SSI with the DDB file(Only in Non-Clocked Mode)

Select an entry in the DDB file that corresponds to the functionality you want.

Select 6ES7 138-4DB01-0AB0 1SSI forstandard mode.

Select 6ES7 138-4DB01-0AB0 1SSI Fastfor fast mode.

Select the parameters.

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4.6 Functions of the 1SSI

Section Description Page

4.6.1 Encoder Value Detection 4-11

4.6.2 Gray/Binary Converter 4-12

4.6.3 Transmitted Encoder Value and Standardization 4-13

4.6.4 Detection of Direction and Reversal of the Direction of Rotation 4-14

4.6.5 Comparator (Only in Standard Mode) 4-15

4.6.6 Latch Function (Only in Standard Mode) 4-17

4.6.7 Error Detection in Standard Mode 4-19

4.6.8 Error Detection in Fast Mode 4-19

Mode of Operation

The 1SSI records the signals of the connected position encoder cyclically andforwards them, depending on the parameterization, to the feedback interface bymeans of the following functions:

• Encoder value detection

• Gray/binary converter

• Transmitted encoder value and standardization

• Reversal of the direction of rotation

• Comparator (only in standard mode)

• Latch function (only in standard mode)

• Error detection

The 1SSI indicates by means of the “ready for operation” feedback bit that thefunctions are executable and the displayed encoder value is valid.

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4.6.1 Encoder Value Detection

The absolute encoder transfers its encoder values in message frames to the 1SSI.The transmission of message frames is initiated by the 1SSI. The followingalternatives are available for encoder value detection:

• Free-running encoder value detection

• Synchronous encoder value detection

• Clocked encoder value detection

You can set free-running or clocked encoder value detection in HWCONFIG withthe “Detection” parameter. This parameter only works in non-clocked mode.

The detection of the encoder value will be clocked when the 1SSI is in clockedmode. In this case, the “Detection” parameter is not evaluated.

Table 4-2 illustrates these relationships:

Table 4-2 Encoder Value Detection

Mode ”Detection”Parameter

Encoder Value Detection

Free-running Free-running encoder value detectionNon-clocked mode

Synchronous Synchronous encoder value detection

Clocked mode – (irrelevant) Clocked encoder value detection

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Free-Running Encoder Value Detection

You can obtain a high level of accuracy in free-running detection of the encodervalue with the latch function.

The 1SSI initiates the transmission of a message frame each time theparameterized monoflop time elapses.

The 1SSI processes the detected encoder value asynchronously to thesefree-running message frames in the cycle of the update rate (see the technicalspecifications).

Because of this, some old encoder values result with the free-running detection ofencoder values. The difference between the maximum and minimum age is thejitter (see the Technical Specifications).

Synchronous Encoder Value Detection

Synchronous encoder value detection offers an extremely high degree of accuracy.

The 1SSI initiates the transmission of a message frame in the cycle of the updaterate (see technical specifications).

The 1SSI processes the transmitted encoder value synchronously to its updaterate.

Clocked Encoder Value Detection

Clocked encoder value detection is carried out automatically when the equidistantbus cycle is activated in the DP master system and the DP slave is synchronizedto the DP cycle.

The 1SSI initiates the transmission of a message frame in each PROFIBUS DPcycle at the time Ti.

The 1SSI processes the transmitted encoder value at a clocked rate to thePROFIBUS DP cycle.

4.6.2 Gray/Binary Converter

When gray is set, the encoder value supplied by the absolute encoder in gray codeis converted to binary code. When binary is set, the encoder value that is deliveredis not converted.

Note

If you selected the setting Gray, the 1SSI always converts the total encoder value(13, 21, 25 bits). Preceding special bits thus influence the encoder value andtrailing bits can under some circumstances be corrupted.

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4.6.3 Transmitted Encoder Value and Standardization

The transmitted encoder value contains the encoder position of the absolute valueencoder. Depending on the encoder that is used, other bits that are located beforeand after the encoder position are transmitted in addition to the encoder position.

So that the 1SSI can determine the encoder position, specify the following:

• Encoder type

• Number of trailing bits

• Total steps of the absolute encoder

With standardization, you specify the representation of the encoder value in thefeedback interface.

• With standardization on, you specify that trailing, irrelevant bits in the encodervalue are to be discounted (see the following example).

• With standardization off, you specify that trailing bits are retained and areavailable for evaluation.

Standardization Example

Presettings:

You use a single-turn encoder with 29 ( 9 bits) = 512 steps/revolution(resolution/360°) with the following parameter assignment:

• Encoder type: SSI-13 bit

• Number of trailing bits: 4 places

• Total steps of the absolute encoder: 512

Without standardization: Cyclically recorded encoder position 100

0310 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 XXXX0 010 0110 0 00

Bits transferred

Relevant bits

After standardization: Encoder position 100031

0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 010 0110 000 0000

Relevant bits

Data double word

Data double word

Bits 0 to 3 (identified above by “x”) are displaced.

Of the 13 bits transferred, bits 4 to 12 are required for evaluation.

412

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4.6.4 Detection of Direction and Reversal of the Direction of Rotation

Detection of Direction

The 1SSI needs the following information to detect the direction of movement ofthe encoder correctly:

• Encoder type

• Indication of the total steps of the absolute encoder

• Number of trailing bits

The information is used as explained in the standardization example.

The direction of movement that is determined is displayed at the feedbackinterface and at the LEDs.

UP LED: Change in encoder position from the smaller to the larger value

DN LED: Change in encoder position from the larger to the smaller value

Reversal of the Direction of Rotation

Reversal of the direction of rotation adjusts the direction of movement of theencoder to that of the axis.

Two settings are possible:

Off: The direction of the transmitted encoder position is maintained.

On: The direction of the transmitted encoder position is reversed.That is, even though the encoder is delivering ascending values,descending values are displayed.

This reversal applies to the total steps of the absolute encoder, asindicated in the parameter assignment.

Example of Direction of Rotation Reversal

Presettings:

You use a single-turn encoder with 210 ( 10 bits) = 1024 steps/revolution(resolution/360°) with the following parameter assignment:

• Encoder type: SSI-13 bit

• Number of trailing bits: 3 places

• Reversal of the direction of rotation: On

• Total steps of the absolute encoder: 1024

Encoder value before reversal of the direction of rotation: cyclically recorded encoder position 1023

Encoder value after reversal of the direction of rotation: displayed encoder position 0

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4.6.5 Comparator (Only in Standard Mode)

The encoder position that is detected can be compared with up to two loadablevalues (without hysteresis). Both comparison results are stored in the feedbackinterface. The appropriate comparator becomes active only after the comparisonvalue is loaded.

You set the two comparators in the parameters Comparator 1 and Comparator 2.

Setting Effect on the Result of Comparison (CMPx)

Not active The encoder value is not compared. The feedback bit CMPx=0.

In the up direction The encoder value is compared in the up direction (UP).

• If the encoder value ≥ the comparison value, the feedback bitCMPx = 1.

• If the encoder value < the comparison value, the feedback bitCMPx = 0.

• If the direction is down, the feedback bit CMPx remainsunchanged.

• If no change is detected in the encoder value, the feedback bitCMPx remains unchanged.

In the down direction The encoder value is compared in the down direction (DN).

• If the encoder value ≤ the comparison value, the feedback bitCMPx = 1.

• If the encoder value > the comparison value, the feedback bitCMPx = 0.

• If the direction is up, the feedback bit CMPx remainsunchanged.

• If no change is detected in the encoder value, the feedback bitCMPx remains unchanged.

In both directions The encoder value is compared in both directions.

If the direction is up, the following conditions apply:

• If the encoder value ≥ the comparison value, the feedback bitCMPx = 1.

• If the encoder value < the comparison value, the feedback bitCMPx = 0.

If the direction is down, the following conditions apply:

• If the encoder value ≤ the comparison value, the feedback bitCMPx = 1.

• If the encoder value > the comparison value, the feedback bitCMPx = 0.

If no change is detected in the encoder value, the feedback bitCMPx remains unchanged.

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As soon as you load a comparison value, the comparison result is deleted and isthen entered in accordance with the directional setting.

Note

Only one control bit can be set at a particular time: CMP_VAL1 or CMP_VAL2.

Otherwise, the ERR_LOAD error is reported until both control bits are deleted.

Loading the Comparison Value

Feedback bit:STS_LOAD

1SSI: Value accepted, end of transfer (possiblywith an error)

User: Remove request and keep value available.

Control bit:CMP_VAL1 orCMP_VAL2

1SSI: Request understood

User: Request value transfer and make value available.

Figure 4-2 Value Transfer

Comparator in Clocked Mode

In clocked mode the comparison values are loaded at the time To and are effectiveas of the time Ti in the same PROFIBUS DP cycle.

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4.6.6 Latch Function (Only in Standard Mode)

You use the latch function to freeze the current encoder value of the 1SSI at anedge at the digital input (DI).

The encoder value can thus be evaluated on an event-dependent basis.

A frozen encoder value is identified by the set bit 31 and is preserved until thetermination of the latch function.

The frozen encoder value is entered at the feedback interface at the position of thecyclically recorded value and assigned the identifier “Bit 31 set.”

Note

Direction determination, comparison, and error monitoring also take place whenthe encoder value is frozen.

Prerequisites for Using the Latch Function

At parameter assignment:

• You must have specified which edge (rising and/or falling) at the digital inputfreezes the encoder value.

• You specify that the latch function that is coupled to the digital input is switchedon.

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Terminating the Latch Function

The latch function must be acknowledged. When the controller programacknowledges the acceptance of the encoder value, bit 31 is deleted and theencoder value is updated again. Freezing is then possible again.

LATCH_ACK

1SSI: Latch function active, encoder va-lue frozen (bit 31 = 1), wait forLATCH_ACK.

User: LATCH must be acknowledgedwith LATCH_ACK = 1.

Bit 31 is set in enco-der value

DI

1SSI: Latch function is terminated;encoder value is current

User: LATCH_ACK must be cleared.As soon as 1SSI detects LATCH_ACK = 0, freezing is possible again.

Figure 4-3 Latch Function

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4.6.7 Error Detection in Standard Mode

The absolute value encoder and sensor supply short circuit errors must beacknowledged. They have been detected by the 1SSl and are indicated at thefeedback interface. Channel-specific diagnostics are executed if you enabled groupdiagnosis when you assigned parameters (see Chapter 6 of the ET 200SDistributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

An error occurs, the 1SSI sets an error bit, a dia-gnostic message may appear, error detection conti-nues to be active.

Error eliminated; if EXTF_ACK is set by the user program,the 1SSI clears the error bit; a diagnostic message mayappear.

Error acknowledgmentEXTF_ACK

For example,error bitERR_SSI

Figure 4-4 Error Acknowledgment

In the case of constant error acknowledgement (EXTF_ACK = 1) or in CPU/masterSTOP mode, the 1SSI reports the errors as soon as they are detected and clearsthe errors as soon as they are eliminated.

4.6.8 Error Detection in Fast Mode

The absolute value encoder and sensor supply short circuit errors have beendetected by the 1SSl and are indicated at the feedback interface. Channel-specificdiagnostics are executed if you enabled group diagnosis when you assignedparameters (see Chapter 6 of the ET 200S Distributed I/O System manual).

The parameter assignment error bit is acknowledged by means of correctparameter assignment.

As soon as the absolute value encoder and sensor supply short circuit errors areno longer detected by the 1SSl, the error display at the feedback interface iscleared, and in certain cases the channel-specific diagnosis reports an error-freecondition.

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4.7 Behavior at CPU-Master-STOP

The 1SSI detects the CPU/master STOP mode. The 1SSI reacts to this bystopping the current procedure.

Exiting the CPU-Master-STOP Status

Without reassigning the parameters of theET 200 station

• The feedback interface of the 1SSI remainscurrent.

With reassignment of the parameters of theET 200 station

• You must reload the comparison values.

• The latch function has to be triggered with a newedge at the digital input DI.

A New Parameter Assignment of the ET 200S Station by Means of Your CPU/DP Master Takes Place:

• Upon power on of the CPU/DP master

• Upon power on of the IM 151/IM 151 FO

• After failure of the DP transmission

• After loading an altered parameter assignment or configuration of the ET 200Sstation into the CPU/DP master.

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4.8 Parameter Assignment

You set the parameters for the 1SSI by means of the device database file for theET 200S using the STEP 7 or COM PROFIBUS parameter assignment software. Itis not possible to reassign the parameters by means of the user program.

Depending on the mode that you selected, either of the following parameter setsfrom your parameter assignment appear in the parameter assignment software:

• All parameters (standard mode) or only

• A portion of the parameters (fast mode)

You can enter the following parameters (the default appears in bold):

Parameters Value Range Note

Group diagnosis Disable/enable Enabling parameter

Detection Free-running/synchronous This parameter is irrelevant in clockedmode and is not evaluated.

Encoder type 1 No encoder / SSI-13 bit /SSI-21 bit / SSI-25 bit

No encoder: The encoder input isswitched off.

Gray/binary converter 1 Gray/binary Code supplied by the encoder

Baud rate 1 3 125 kHz / 250 kHz /

500 kHz / 1 MHz / 2 MHz

Note that the transmission rate affectsthe accuracy and currency of theencoder values.

Monoflop time 1 2 3 16 s / 32 s / 48 s / 64 s The specification of the monoflop time isrelevant for free-running encoder valuedetection.

See the vendor’s technicalspecifications.

Transmitted encodervalue and standardization

Off/on –

Number of trailing bits 1 0 to 15 The number of trailing bits must bespecified.

Reversal of the directionof rotation

Off/on –

Total steps of the absoluteencoder 1

• 13-bit encoder type: 16 to 8192

• 21 -bit encoder type:16 to 2097152

• 25-bit encoder type:16 to 33554432

If you find the texts “Total steps –highword” and “Total steps – lowword” inyour parameter assignment softwareinstead of the text “Total steps”, thefollowing definition applies:

Total steps = total steps lowword + totalsteps highword x 216

Latch: Encoder value Not active / With rising edge DI /With falling edge DI / With bothedges DI

This parameter is available in theparameter assignment software instandard mode only.

Not active: The encoder value cannot befrozen.

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Parameters NoteValue Range

Comparator 1 Not active / In the up direction /In the down direction / In bothdirections

This parameter is available in theparameter assignment software instandard mode only.

Not active: The comparator is switchedoff.

Comparator 2 Not active / In the up direction /In the down direction / In bothdirections

This parameter is available in theparameter assignment software instandard mode only.

Not active: The comparator is switchedoff.

1 See the technical specifications of the absolute encoder.

2 The monoflop time is the time between 2 SSI frames. The parameterized monoflop time must be greaterthan the monoflop time of the absolute encoder (refer to the technical specifications of the manufacturer).The time 2 × (1/transmission rate) is added to the value parameterized in HWCONFIG. At a transmissionrate of 125 kHz and a parameterized monoflop time of 16 s, a monoflop time of 32 s is in fact effective.

3 The following limitation applies to the monoflop time of the absolute encoder:

(1/transmission rate) < monoflop time of the absolute encoder < 64 s + 2 × (1/transmission rate)

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4.9 Control and Feedback Interfaces in Standard Mode

Note

For the 1SSI, the following data of the control and feedback interface areconsistent:

• Bytes 0 to 3

• Bytes 4 to 7

Use the access or addressing mode for data consistency over the entire controland feedback interface on your DP master (only for configuration using the DDBfile).

The tables below indicate the assignment of the control interface (outputs) and thefeedback interface (inputs):

Table 4-3 Assignment of the Feedback Interface (Inputs)

Address Assignment

Bytes 0 to 3 Encoder value double word (bit 31 set, encoder value frozen)

Byte 4 Bit 7: Reserved = 0

Bit 6: Ready for operation RDY

Bit 5: Parameter assignment error – ERR_PARA

Bit 4: Absolute encoder error ERR_SSI

Bit 3: Sensor Supply Short Circuit – ERR_24V

Bit 2: DI status – STS_DI

Bit 1: DN status STS_DN

Bit 0: UP status STS_UP

Byte 5 Bit 7: Reserved = 0

Bit 6: Reserved = 0

Bit 5: Reserved = 0

Bit 4: Reserved = 0

Bit 3: Comparison value 2 reached, CMP2

Bit 2: Comparison value 1 reached, CMP

Bit 1: Load function error – ERR_LOAD

Bit 0: Load function active – STS_LOAD

Bytes 6 to 7 Reserved = 0

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Table 4-4 Assignment of the Control Interface (Outputs)

Address Assignment

Bytes 0 to 3 Comparison value 1 or 2 (double word)

Byte 4 Bit 7: Error acknowledgment EXTF_ACK

Bit 6: Latch function acknowledgement LATCH_ACK

Bit 5: Reserved = 0

Bit 4: Reserved = 0

Bit 3: Reserved = 0

Bit 2: Reserved = 0

Bit 1: Load comparison value 2 – CMP_VAL2

Bit 0: Load comparison value 1 – CMP_VAL1

Byte 5 Reserved = 0

Bytes 6 to 7 Reserved = 0

Explanation of the Control and Feedback Bits

Bits Notes

CMP Comparison result of comparator 1

CMP2 Comparison result of comparator 2

CMP_VAL1 Load comparison value 1

CMP_VAL2 Load comparison value 2

ERR_24V The encoder supply is short-circuited. ERR_24V is reset when the short circuit iseliminated and acknowledged by means of the EXTF_ACK control bit.

ERR_LOAD Error while loading the comparison values because both control bits CMP_VAL1 andCMP_VAL2 are set.

ERR_PARA Incorrect parameter assignment for the ET 200S station.

Cause: The total steps of the absolute encoder are not in the range of values for thetype of encoder.

The parameter bit is cleared when a correct parameter assignment is transmitted.

ERR_SSI The 1SSI detects an absolute value encoder error if the message frames at the SSIinterface are faulty.

Causes: no encoder connected; wire break in the encoder cable; type of encoder,transmission rate, monoflop time do not correspond to the connected encoder;programmable encoders do not correspond to the settings on the 1SSI; encoder isdefective or faults exist.

ERR_SSI is reset when the cause of the error is eliminated and acknowledged by theEXTF_ACK control bit.

EXTF_ACK Error acknowledgement for the absolute value encoder ERR_SSI and sensor supplyshort circuit ERR_24V errors

LATCH_ACK Acknowledgement for latch function

STS_DI The bit displays the status of the digital input DI.

STS_DN Status direction down; for encoder value change from larger to smaller encoderpositions (including zero-crossing)

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Bits Notes

STS_LOAD Feedback bit for CMP_VAL1 and CMP_VAL2. Using this bit the 1SSI indicates that acomparison value is loaded.

STS_UP Status direction up; for encoder value change from smaller to larger encoder positions(including zero-crossing)

RDY The parameter assignment of the 1SSI is correct, and the module is executing itsfunctions. The displayed feedback is valid. For the absolute value encoder error,ERR_SSI is also set.

Access to the Control and Feedback Interface in STEP 7 Programming

Configuration with STEP 7 Using the DDB File 1)

(Hardware Catalog\PROFIBUS DP\Additional FIELD DEVICES\ET 200S)

Configuration with STEP 7 Using HWCONFIG

(Hardware Catalog\PROFIBUS DP\ET 200S)

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

Control interface Write with SFC 15 “DPWR_DAT” Transfer instruction (e.g. T PQD)

1) Load and transfer instructions are also possible with CPU 3xxC, CPU 318-2 (as of V3.0), CPU 4xx (as of V3.0) andWinLC RTX (PC CPU).

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4.10 Feedback Interface in Fast Mode

The following table indicates the assignment of the feedback interface (inputs).

Table 4-5 Assignment of the Feedback Interface (Inputs)

Address Assignment

Bytes 0 to 3 Bit 31: Reserved = 0

Bit 30: Ready for operation (feedback is valid) RDY

Bit 29: Parameter assignment error – ERR_PARA

Bit 28: Group error of absolute encoder or short circuit of sensor supply EXTF

Bit 27: DI status – STS_DI

Bit 26: DN status STS_DN

Bit 25: UP status STS_UP

Bits 0 to 24: Encoder value

Notes on the Feedback Bits

Bits Notes

ERR_PARA Incorrect parameter assignment for the ET 200S station.

Cause: Total steps of the absolute encoder are not in the range of values for the type ofencoder.

The parameter bit is cleared when a correct parameter assignment is transmitted.

EXTF Group error: absolute value encoder or supply sensor short circuit

Causes:

The encoder supply is short-circuited

Or

no encoder connected; wire break in the encoder cable; type of encoder, transmissionrate, monoflop time do not correspond to the connected encoder; programmableencoders do not correspond to the settings on the 1SSI; encoder is defective or faultsexist.

EXTF is reset when the causes of the errors are eliminated.

STS_DI The bit displays the status of the digital input DI.

STS_DN Status direction down; for encoder value change from larger to smaller encoderpositions (including zero-crossing)

STS_UP Status direction up; for encoder value change from smaller to larger encoder positions(including zero-crossing)

RDY The parameter assignment of the 1SSI is correct, and the module is executing itsfunctions. The displayed feedback is valid. For the absolute value encoder error,ERR_SSI is also set.

Accessing the Feedback Interfaces in STEP 7 Programming

Configuration with STEP 7 Usingthe DDB File

Configuration with STEP 7 UsingHWCONFIG

Feedback interface Read with SFC 14 “DPRD_DAT” Load instruction (e.g. L PID)

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4.11 Technical Specifications

Dimensions and Weight

Dimensions W× H × D (mm)

15×81×52

Weight Approximately 40 g

Voltage, Currents, Potentials

Rated load voltage L+

• Range

• Reverse polarityprotection

24 VDC

20.4 to 28.8V

Yes

Isolation

• Between backplanebus and SSIfunction

• Between SSIfunction and loadvoltage L+

Yes

No

Sensor supply

• Output voltage

• Output current

L+ (–0.8V)

Max. 500 mA,short-circuit proof

Current input

• From the backplanebus

• From load voltageL+ (no load)

Max. 10 mA

Maximum 34 mA

Power dissipation of themodule

Typ. 0.8 W

SSI Module Encoder Input

Position detection Absolute

Differential signals forSSI data and SSI clock

According to RS422

Data transmission rateand line length withabsolute encoders(twisted pair andshielded)

• 125 kHz max. 320 m

• 250 kHz max. 160 m

• 500 kHz max. 60 m

• 1 MHz max. 20 m

• 2 MHz max. 8 m

Digital Input

Input voltage 0 signal: –30 to 5 V

1 signal: 11 to 30 V

Input current 0 signal: ≤2 mA(closed-circuit current)

1 signal: 9 mA (typically)

Input Delay 0 > 1: Maximum 300 s

1 > 0: Maximum 300 s

Connection of atwo-wire BERO type 2

Possible

Shielded cable length 50 m

Status, Interrupts, Diagnostics

Interrupts

Status display for digitalinput DI

Status display of firstcomparator CMP

LED 7 (green)

CMP LED (green)

Encoder value changeUp

Encoder value changeDown

UP LED (green)

DN LED (green)

Group error SF LED (red)

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Unsharpness of the Encoder Value

Free-running encoder value detection

• Maximum age

– Standard Mode (2 × frame runtime) +monoflop time + 1 ms

– Fast Mode (2 × frame runtime) +monoflop time + 700s

• Jitter

– Standard Mode Frame runtime +monoflop time

– Fast Mode Frame runtime + monoflop time

Synchronous encoder value detection

• Age

– Standard Mode Frame runtime + 1 ms

– Fast Mode Frame runtime + 700s

Clocked encoder value detection

• Age in standardmode and fast mode

Encoder value at time Tiin the currentPROFIBUS DP cycle

Unsharpness of the Latch Value

Free-running encoder value detection

• Jitter in standardmode and fast mode

Frame runtime+ monoflop time

Synchronous encoder value detection

• Jitter

– Standard mode 1 ms

– Fast mode 700s

Clocked encoder value detection

• Jitter in standardmode and fast mode

Frame runtime+ monoflop time

Frame runtime of the encoders

• 125 kHz

• 250 kHz

• 500 kHz

• 1 MHz

• 2 MHz

13 bits 21 bits 25 bits

112 s 176 s 208 s

56 s 88 s 104 s

28 s 44 s 52 s

14 s 22 s 26 s

7 s 11 s 13 s

Monoflop time 1 16 s/32 s/48 s/64 s

Response Times

Update rate of the 1SSI

• In standard mode

• In fast mode

1 ms

700 s

1 The following limitation applies to the monoflop time of the absolute encoder:(1/transmission rate) < monoflop time of the absolute encoder < 64 s + 2 × (1/transmission rate)

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2PULSE

Chapter Overview

Section Description Page

5.1 Product Overview 5-2

5.2 Brief Instructions on Commissioning the 2PULSE 5-3

5.3 Modes and Functions 5-6

5.4 Application Examples 5-40

5.5 Technical Specifications for the Hardware, Terminal Assignment 5-58

5.6 Technical Specifications for Programming, Reference Lists 5-62

5

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5.1 Product Overview

Order Number

6ES7 138-4DD00-0AB0

Features• 2 channels

The two channels of the 2PULSE can be used independently of one another;they permit pulse output in four different modes.Minimum pulse duration: 200 µs, Accuracy: ±(pulse duration × 100 ppm) ±100 µs

• Apart from the set mode, the 2PULSE also has two other functions.

• Digital output DO 0 for channel 0 and digital output DO 1 for channel 1 to outputthe pulses.

• Digital input DI 0 for channel 0 and digital input DI 1 for channel 1 for enabling.

Modes• Pulse output mode

Output of a pulse on the digital output of the 2PULSE with a specifiable pulseduration

• Pulse-width modulation (PWM) mode

Output of a pulse train on the digital output of the 2PULSE; the output valuecorresponds to the ratio of the pulse duration to the period duration.

• Pulse train mode

Output of n pulses on the digital output of the 2PULSE with a specifiable periodduration and pulse duration.

• On/off-delay mode

The signal pending on the DI digital input is output by the 2PULSE with anon/off-delay on the DO digital output.

Functions• Direct control of the DO digital output by means of the control program

• Parameterizable behavior for CPU/master STOP

• Error detection/diagnostics (short circuit of the digital output and sensor supply)

ConfigurationYou can use either of the following to configure the 2PULSE:

– A DDB file (http://www.ad.siemens.de/csi/gsd)

or

– STEP7 as of V5.0 SP3

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5.2 Brief Instructions on Commissioning the 2PULSE

Introduction

These brief instructions use the example of pulse output mode to teach you to setup a functioning application in which you learn about the basic functions of your2PULSE (hardware and software) and how to check them. Channel 0 of the2PULSE is used in the example.

Requirements

The following requirements must be met:

• You put an ET 200S station into service at an S7 station with a DP master.

• You must have the following:

– A TM-E15S24-01 terminal module

– A 2PULSE

Installation and Fitting

Install the TM-E15S24-01 terminal module (see Figure 5-1). Connect the 2PULSEto the terminal module (you will find detailed instructions on how to do this inChapter 5 of the ET 200S Distributed I/O System manual). It is not necessary towire the 2PULSE for this example.

TM-E15S24-01 and 2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

DO 0

Channel 0 Channel 1

Figure 5-1 Terminal Assignment of the 2PULSE for the Example

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Configuration with STEP 7 Using HWCONFIG

You begin by adapting the hardware configuration of your existing ET 200S station.

Open the relevant project in SIMATIC Manager.

Call the HWCONFIG configuration table in your project.

Select the 2PULSE from the hardware catalog. The number6ES7 138-4DD00-0AB0 appears in the info text. Drag the entry to the slot at whichyou have installed your 2SSI.

Double-click this number to open the DP Slave Properties dialog box.

On the Addresses tab you will find the addresses of the slot to which you havedragged the 2PULSE. Make a note of these addresses for subsequentprogramming.

On the Parameters tab, you will find the default settings for the 2PULSE. Leavethe default settings unchanged.

Save and compile your configuration and download the configuration in STOPmode of the CPU by choosing PLC → Download to Module.

Integration in the Control Program

Create block FC101 and integrate it in your control program (in OB1, for example).This block works in this example with the MB10, MB20 and M30.0 memorymarkers.

In block FC101, the start address of the inputs and outputs of the 2PULSE is 256.If necessary, take the address from the hardware configuration.

This block sets a pulse duration of 5000 ms and starts pulse output as soon as youhave issued the enable using your control program (SW_ENABLE=1).

STL Description

Block: FC101

L PIB256T MB20

L 5000T PQW256

L 0T MB10A M30.0= M10.0

L MB10T PQB258

//Read feedback messages from channel 0 of the 2PULSE

//Write pulse duration of 5000 ms to channel 0 of the//2PULSE

//Generate SW_ENABLE control signal

//Query start of pulse output//Set SW_ENABLE=1

//Write control signals to channel 0 of the 2PULSE

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Test

Start a pulse output with SW_ENABLE=1 and monitor the STS_ENABLE andSTS_DO feedback bits using “Monitor/Modify Variables”.

Select the “Block” folder in your project. Choose the Insert S7 Block VariableTable menu command to insert the VAT 1 variable table, and then confirm with OK.

Open the VAT 1 variable table, and enter the following variables in the “Address”column:

M20.0 (STS_ENABLE)

M20.1 (STS_DO)

M30.0 (SW_ENABLE)

Choose PLC Set Up Connection to Configured CPU to switch to online.

Choose Variable Monitor to switch to monitoring.

Switch the CPU to RUN mode.

The following table shows you which activity triggers which result.

Activity Result

When you switch the CPU to RUN, the followingresults are obtained:

• All the LEDs are deleted

• STS_ENABLE=0

• STS_DO =0

Start the pulse output by setting memory marker30.0 (Variable → Modify → )

Directly after the start... • STS_ENABLE =1

• STS_DO =1

• LED 4 for DO 0 lights up

After the 5 s pulse duration hasexpired

• STS_ENABLE=0

• STS_DO =0

• LED 4 for DO 0 is deleted

To start further pulse output, you must delete SW_ENABLE (memory markerM30.0 = 0) and reset it (memory marker M30.0 = 1).

You can change the pulse duration in the control program.

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5.3 Modes and Functions

Section Description Page

5.3.1 Pulse Output Mode 5-8

5.3.2 Pulse-Width Modulation (PWM) Mode 5-13

5.3.3 Pulse Train Mode 5-21

5.3.4 On/Off-Delay Mode 5-27

The 2PULSE has two channels. You can select a separate mode for each channel.You assign parameters to the mode using HWCONFIG or COM PROFIBUS. Youcannot then change the parameterized mode with your control program.

You can select from four different modes for each channel:

• Pulse output

• Pulse-width modulation

• Pulse train

• On/off-delay

In addition to the set mode, the 2PULSE also knows the following functions:

• Direct control of the DO digital output by means of your control program;controllable separately for each channel.

• Error detection/diagnostics; the 2PULSE recognizes the errors for each channelseparately.

• Behavior at CPU/master STOP; the 2PULSE recognizes the CPU/masterSTOP for both two channels and responds in accordance with your parameterassignment.

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Channel 0

Modesand functions

DO 0Control signals

DI 0Feedback signals

ParametersC

ontr

ol P

rogr

am

Pro

cess

Channel 1

Modesand functions

DO 1Control signals

DI 1Feedback signals

Parameters

Figure 5-2 How the 2PULSE Works

Interfaces to the Control Program and Process

To execute the modes and functions, the 2PULSE has as an interface to theprocess a digital input and a digital output for each channel (DI 0, DO 0 forchannel 0 and DI 1, DO1 for channel 1).

You can modify and monitor the modes and functions with your control programusing control signals and feedback signals.

Parameters are assigned to the various modes. You will find a complete parameterlist for all the modes in Section 5.6.

You will find the following in the sections on modes and functions:

• The relevant parameters

• The control and feedback signals

The description of the modes and functions applies to both channels and thechannels are therefore not referred to separately in the description.

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5.3.1 Pulse Output Mode

Definition

For the pulse duration you set, the 2PULSE outputs a pulse at the DO digitaloutput (output sequence) on expiration of the set on-delay.

Software enable(SW_ENABLE)

HW enable(optional)

S

R

Q

On-delay

S

R

Q

Pulseduration

≥1 STS_ENABLE

DO

&

Figure 5-3 Basic Circuit Diagram for Pulse Output Mode

Starting the Output Sequence

You must always issue the enable for the output sequence in your control programby means of the software enable (SW_ENABLE 0→1; MANUAL_DO=0).

The ACK_SW_ENABLE feedback bit displays the software enable pending at the2PULSE.

You can also set the DI digital input of the 2PULSE as hardware enable (HWenable) with the DI function parameter.

If you want to work with software enable and hardware enable at the same time,when a software enable has been issued, the output sequence starts at the firstpositive edge of the hardware enable. Further positive edges of the hardwareenable during the current output sequence are ignored by the 2PULSE. When asoftware enable has been issued, a positive edge of the hardware enable isenough to start the next output sequence.

When the enable is issued (positive edge), the on-delay is started andSTS_ENABLE set. On expiration of the on-delay, the pulse is output with the setpulse duration. The output sequence finishes with the end of the pulse;STS_ENABLE is deleted.

If you make an impermissible change to the pulse duration during operation, theERR_PULS signal indicates a pulse output error. You will then have to restart theoutput sequence.

The next time the output sequence is started, the 2PULSE deletes the ERR_PULSfeedback bit.

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Pulse Diagram

ACK_SW_ENABLE

HW enable(DI digital input)

DO digital output

STS_ENABLE

Pulse duration

ERR_PULS

On-delay

Start of the output sequence End of the output sequence

Software enable(SW_ENABLE)

Figure 5-4 Output Sequence for Pulse Output

Terminating the Output Sequence

Deleting the software enable (SW_ENABLE = 0) during the on-delay or the pulseduration terminates the output sequence, and STS_ENABLE and the DO digitaloutput are deleted.

You will then have to restart the output sequence.

Truth Table

SoftwareEnable

SW_ENABLE

HW Enable(DI Digital Input)

DO Digital Output STS_ENABLE Output Sequence

1 0→1 0, if on-delay >01, if on-delay =0

0→1 Start

0→1 Not used 0, if on-delay >01, if on-delay =0

0→1 Start

0 Any status 0 0 Terminate

1 0 Previous status remains -

1 1 Previous status remains -

1 Not used Previous status remains -

0→1 0 0 0 -

0→1: positive edge

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Setting Times Using a Time Base

By means of the parameterizable time base you can select the resolution andrange of the pulse duration and the on-delay.

Time base = 0.1 ms: You can set times from 0.2 ms to 6.5535 s with a resolution of0.1 ms.

Time base = 1 ms: You can set times from 1 ms to 65.535 s with a resolution of1 ms.

Setting and Changing the Pulse Duration

Set the pulse duration directly in your control program as a numerical valuebetween 0 and 65535.

Pulse duration = time base × set numerical value

If you change the pulse duration when an output sequence is running, the timealready output will be subtracted from the new pulse duration and the pulse willcontinue to be output.

Reducing the Pulse Duration

If you have reduced the pulse duration to a time that is shorter than the timealready output, the output sequence is terminated, STS_ENABLE and the DOdigital output are deleted, and the ERR_PULS status bit is set. At the next outputsequence, the ERR_PULS status bit is deleted.

Setting and Changing the On-Delay

You set the on-delay as a value between 0 and 65535 in the parameters.

Parameterized on-delay = time base × set numerical value

Using the factor for the on-delay, you can adjust the parameterized time in yourcontrol program. Set the factor to be between 0 and 255, with a weighting of 0.1.

On-delay = factor × 0.1 × parameterized on-delay

If you change the on-delay factor during the output sequence, the new on-delay isactivated at the next output sequence.

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Pulse Output Mode Parameters

Parameter Meaning Value Range Default

Mode Set the pulse output mode. • Pulse output

• Pulse-width modulation

• Pulse train

• On/off-delay

Pulse output

Time base Using the time base, selectthe resolution and range ofthe pulse duration and theon-delay.

• 0.1 ms

• 1 ms

0.1 ms

DI function You can use the DI digitalinput as an input or as ahardware enable.

• Input

• HW enable

Input

On-delay The time from the start ofthe output sequence to theoutput of the pulse. Youcan change the on-delayusing your controlprogram.

With a time base of 0.1 ms:0 to 65535

With a time base of 1 ms:0 to 65535

0

Control and Feedback Signals of Pulse Output Mode

Control and Feedback Signals

Meaning Value Range Channel 0Address

Channel 1Address

Control Signals

Software enable(SW_ENABLE)

Starting and termination ofthe output sequence.

0 = SW_ENABLE deleted1 = SW_ENABLE set01 = start of the outputsequence; may be dependent on the hardwareenable

Byte 2:

Bit 0

Byte 6:

Bit 0

Pulse duration The time that is set for theDO digital output on after expiration of the on-delay.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms 1 to 65535

If you violate the lower limitof the range, the 2PULSEwill not output a pulse.

Word 0 Word 4

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Control and Feedback Signals

Channel 1Address

Channel 0Address

Value RangeMeaning

On-delay factor You can change theparameterized on-delaybefore the start of theoutput sequence:

On-delay= factor × 0.1×parameterized on-delay

0 to 255

If the on-delay < 0.2 ms or iffactor = 0, the effective on-delay is = 0.If there is an on-delay> 65.535 s, the on-delay islimited to 65.535 s.

Byte 3 Byte 7

Feedback Signals

STS_ENABLE Displays a current outputsequence.

0 = pulse output blocked

1 = pulse output running

Byte 0:

Bit 0

Byte 4:

Bit 0

STS_DO Indicates the signal level atthe DO digital output. Notethe update rate.

0 = signal at the DO digitaloutput

1 = signal 1 at the DO digital output

Byte 0:

Bit 1

Byte 4:

Bit 1

STS_DI Indicates the signal level atthe DI digital input.

0 = signal 0 at the DI digitalinput

1 = signal 1 at the DI digitalinput

Byte 0:

Bit 2

Byte 4:

Bit 2

ACK_SW_ENABLE

Indicates the status ofSW_ENABLE.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 0:

Bit 3

Byte 4:

Bit 3

ERR_PULS Indicates a pulse output error.

0 = no pulse output error

1 = pulse output error

Byte 0:

Bit 4

Byte 4:

Bit 4

Input and Output Signals of Pulse Output Mode

Input and OutputSignals

Meaning Value Range Channel 0Terminal

Channel 1Terminal

Input Signal

HW enable You can select the HWenable by means of theDI function parameter.The signal of the DI digital input is then interpreted by the2PULSE at the start ofthe output sequence.

0 = HW enable deleted1 = HW enable issued0→1 = start of the output sequence; dependent on the software enable(SW_ENABLE)

1 5

Output Signal

Pulse at the DO digitaloutput

A pulse is output at theDO digital output for theset pulse duration.

0 = no pulse

1 = pulse

4 8

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5.3.2 Pulse-Width Modulation Mode (PWM)

Definition

You specify an output value to the 2PULSE. The 2PULSE generates continuouspulses on this basis. The output value determines the pulse/interpulse period ratiowithin a period (pulse-width modulation). The period duration can be adjusted.

The pulse train is output on expiration of the parameterized on-delay at the DOdigital output of the 2PULSE (output sequence).

S

R

Q

On-delay

S

R

Q

Outputvalue

≥1 STS_ENABLE

DO

&

PWM

PWM inoperation

Software enable(SW_ENABLE)

HW enable(optional)

Figure 5-5 Basic Circuit Diagram for Pulse-Width Modulation Mode

Starting the Output Sequence

You must always issue the enable for the output sequence by means of a softwareenable (SW_ENABLE 0→1; MANUAL_DO=0) in your control program. TheACK_SW_ENABLE feedback bit indicates the software enable pending at the2PULSE.

You can also set the DI digital input of the 2PULSE as HW enable by means of theDI function parameter.

If you want to work with the software enable and hardware enable at the sametime, if the software enable has been issued, the output sequence starts at the firstpositive edge of the hardware enable. Further positive edges of the hardwareenable during the current output sequence are ignored by the 2PULSE.

When the enable is issued (positive edge), the on-delay is started and theSTS_ENABLE set. The pulse train is output on expiration of the on-delay. Theoutput sequence runs continuously as long as SW_ENABLE is set.

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Pulse Diagram

DO digital output

STS_ENABLE

Start of the outputsequence

Period duration

On-delay Pulseduration

Interpulseperiod

HW enable(DI digital input) Period duration

Output value 500‰ Output value 250‰

Software enable(SW_ENABLE)

ACK_SW_ENABLE

Figure 5-6 Pulse-Width Modulation Output Sequence

Terminating the Output Sequence

Deleting the software enable (SW_ENABLE=0) during the on-delay or the pulseoutput terminates the output sequence, and STS_ENABLE and the DO digitaloutput are deleted.

You will then have to restart the output sequence.

Truth Table

SoftwareEnable

SW_ENABLE

HardwareEnable (DI Digital

Input)

DO Digital Output STS_ENABLE Output Sequence

1 0→1 0, if on-delay >01, if on-delay =0

0→1 Start

0→1 Not used 0, if on-delay >01, if on-delay =0

0→1 Start

0 Any status 0 0 Terminate

1 0 Previous status remains -

1 1 Previous status remains -

1 Not used Previous status remains -

0→1 0 0 0 -

0→1: Positive edge

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Modulation of the Pulse Duration

The 2PULSE calculates the pulse duration on the basis of the output value you set(between 0 and 1000‰):

Pulse duration = (output value/1000[‰]) × period duration.

Minimum Pulse Duration and Minimum Interpulse Period

The minimum pulse duration and minimum interpulse period are at a higher levelthan the proportional output characteristic.

You parameterize the minimum pulse duration and minimum interpulse periodusing the minimum/pulse duration parameter; they always have the same value.

A pulse duration calculated by the 2PULSE that is shorter than the minimum pulseduration is suppressed.

A pulse duration calculated by the 2PULSE that is longer than the period duration - minimum interpulse period is set at 1000‰.

Pulse duration

1000

Period durationPeriod duration/minimum interpulseperiod

Minimum pulseduration

0 Output value in ‰

0

Figure 5-7 Modulation of the Pulse Duration

You specify the period duration in accordance with the required accuracy of theprocess variables generated by the actuator.

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Setting Times Using a Time Base

Select by means of the parameterizable time base the resolution and range of theperiod duration, the minimum pulse duration and the on-delay.

Time base = 0.1 ms: You can set times from 0.2 ms to 6.5535 s with a resolution of0.1 ms.

Time base = 1 ms: You can set times from 1 ms to 65.535 s with a resolution of1 ms.

Setting and Changing the Output Value

Select the range for the output value by means of the PWM output formatparameter.

If your output value is between 0 and 1000, select the per mill output format.

If your output value is a SIMATIC S7 analog value (between 0 and 27648), selectthe output format of the S7 analog output module.

You set set the output value directly using your control program.

If you change the output value, the 2PULSE calculates the new pulse duration andinterpulse period:

• If you make changes during the interpulse period and if the new output value issmaller than the previous one, the period duration is extended once only, sincethe new interpulse period is longer.

• If you make changes during the interpulse period and if the new output value isgreater than the previous one, the period duration is shortened once only, sincethe new interpulse period is shorter.

• If you make changes during the pulse duration and if the new output value islower than the previous one, the period duration can be extended once only,since the interpulse period is longer.

• If you make changes during the pulse duration and if the new output value isgreater than the previous one, the period duration remains constant.

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Setting and Changing the Period Duration

Set the period duration as a numerical value between 2 and 65535 in theparameters.

Parameterized period duration = time base × set numerical value

Using the factor for the period duration, you can adjust the parameterized time inyour control program. Set the factor between 0 and 255, with a weighting of 0.1.

Period duration = factor × 0.1 × parameterized period duration

If you change the factor, the 2PULSE immediately calculates the new periodduration and with it the new pulse duration and interpulse period:

• If you make changes during the interpulse period and if the new factor is lowerthan the previous one, a period duration that is shorter than the previous onebut longer than the new one is set once only.

• If you make changes during the interpulse period and if the new factor isgreater than the previous one, a period duration that is longer than the previousone but shorter than the new one is set once only.

• If you make changes during the pulse duration and if the new factor is lowerthan the previous one, a period duration that is shorter than the previous onebut longer than the new one can be set once only.

• If you make changes during the pulse duration and if the new factor is greaterthan the previous one, a period duration that is longer than the previous one butshorter than the new one can be set once only.

Setting the Minimum Pulse Duration and Minimum Interpulse Period

Set the minimum pulse duration and the minimum interpulse period as a numericalvalue between 0 and 65535 using the minimum/pulse duration parameter.

Parameterized minimum pulse duration/minimum interpulse period = timebase × set numerical value

Setting the On-Delay

Set the on-delay as a value between 0 and 65535 in the parameters.

Parameterized on-delay = time base × set numerical value

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Parameters of Pulse-Width Modulation Mode

Parameters Meaning Value Range Default

Mode Set pulse-width modulationmode.

• Pulse output

• Pulse-width modulation

• Pulse train

• On/off-delay

Pulse output

PWM output format Select either the per mill orSIMATIC S7 analog valueoutput formats dependingon the output valueresolution required.

• Per mill

• SIMATIC S7 analogvalue

Per mill

Time base Select by means of thetime base the resolutionand range of the periodduration, theminimum/pulse duration,and the on-delay.

• 0.1 ms

• 1 ms

0.1 ms

DI function You can use the DI digitalinput as an input or as aHW enable.

• Input

• HW enable

Input

On-delay The time from the start ofthe output sequence to theoutput of the pulse train.

With a time base of 0.1 ms:0 to 65535

With a time base of 1 ms:0 to 65535

0

Minimum/pulse duration Minimum pulse durationand minimum interpulseperiod

Enter the response time ofthe actuator connected toyour DO digital output.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms:1 to 65535

If you violate the lower limitof the range, the 2PULSEsets the minimum/pulseduration to 0.2 ms or 1 ms.

10000 → 1 s

Period duration The period duration shouldalways be a multiple of theresponse time of theactuator connected to theDO digital output.

You can change the periodduration using your controlprogram.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms:1 to 65535

20000 → 2 s

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Control and Feedback Signals of Pulse-Width Modulation Mode

Control andFeedback Signals

Meaning Value Range Channel 0Address

Channel 1Address

Control Signals

Software enable(SW_ENABLE)

Starting and termination ofthe output sequence.

0 = SW_ENABLE deleted1 = SW_ENABLE set01 = start of the outputsequence; may bedependent on the hardwareenable

Byte 2:

Bit 0

Byte 6:

Bit 0

Output value The value that is output inpulse-width modulatedformat at the DO digitaloutput.

Depending on the PWMoutput format:

• Per mill 0...1000

• S7 analog output 0...27648

If you enter an output value> 1000 or 27648, the2PULSE limits this to 1000or 27648.

Word 0 Word 4

Period durationfactor

Change the parameterizedperiod duration:

Period duration= factor × 0.1 ×parameterized periodduration

Factor: 0 to 255

Period duration:2×minimum/pulse durationup to 65.635 s.

If a period duration of <2×minimum/pulse durationoccurs or < 400 µs or iffactor = 0, the effectiveperiodduration = 2×minimum/pulse duration.

In this case, the signal 0 isissued if the output value atthe DO digital output< 500‰ or 13824 and thesignal = 1 is output if theoutput value > 500‰ or.13824.

If there is a period duration> 65.535 s, it is limited to65.535 s.

Byte 3 Byte 7

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Control andFeedback Signals

Channel 1Address

Channel 0Address

Value RangeMeaning

Feedback signals

STS_ENABLE Indicates an outputsequence is running.

0 = pulse output blocked

1 = pulse output running

Byte 0:

Bit 0

Byte 4:

Bit 0

STS_DO Indicates the signal level atthe DO digital output.

Note the update rate.

0 = signal 0 at the DO digitaloutput

1 = signal 1 at the DO digitaloutput

Byte 0:

Bit 1

Byte 4:

Bit 1

STS_DI Indicates the signal level atthe DI digital input.

0 = signal 0 at the DI digitalinput

1 = signal 1 at the DI digitalinput

Byte 0:

Bit 2

Byte 4:

Bit 2

ACK_SW_ENABLE

Indicates the status ofSW_ENABLE.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 0:

Bit 3

Byte 4:

Bit 3

Input and Output Signals of Pulse-Width Modulation Mode

Input and OutputSignals

Meaning Value Range Channel 0Terminal

Channel 1Terminal

Input signal

HW enable You can select the HWenable with the DIfunction parameter.The signal of the DIdigital input is theninterpreted by the2PULSE at the start ofthe output sequence.

0 = HW enable deleted1 = HW enable issued01= start of the outputsequence; dependent onthe software enable

1 5

Output Signal

Pulse train at the DOdigital output

The pulse train is outputat the DO digital output.

0 = no pulse

1 = pulse

4 8

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5.3.3 Pulse Train Mode

Definition

The 2PULSE outputs the number of pulses you specified as a pulse train at the DOdigital output on expiration of the set on-delay (output sequence). The periodduration and pulse duration of the pulses can be adjusted.

S

R

Q

On-delay

S

R

Q

Numberof pulses

≥1 STS_ENABLE

DO

&

The pulsetrain is inoperation

Software enable(SW_ENABLE)

HW enable(optional)

Figure 5-8 Basic Circuit Diagram for Pulse Train Mode

Starting the Output Sequence

You must always issue the enable for the output sequence by means of thesoftware enable (SW_ENABLE 0→1; MANUAL_DO=0) in your control program.The ACK_SW_ENABLE feedback bit indicates the software enable pending at the2PULSE.

You can also set the DI digital input of the 2PULSE as HW enable with the DIfunction parameter.

If you want to work with the software enable and hardware enable at the sametime, when the software enable has been issued, the output sequence starts at thefirst positive edge of the hardware enable. Further positive edges of the hardwareenable during the current output sequence are ignored by the 2PULSE. When thesoftware enable has been issued, a positive edge of the hardware enable isenough to start the next output sequence.

When the enable is issued (positive edge), the on-delay is started and theSTS_ENABLE set. On expiration of the on-delay, the pulse train is output with theset number of pulses. The output sequence finishes as soon as the last pulse hasbeen output; STS_ENABLE is deleted.

If you make an impermissible change to the number of pulses during operation, theERR_PULS signal indicates a pulse output error.

At the next output sequence, the 2PULSE deletes the ERR_PULS feedback bit.

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Pulse Diagram

SW enable

DO digital output

STS_ENABLE

On-delay

ERR_PULS

Start of the output se-quenceNumber of pulses = 4

End of the outputsequence

Periodduration

Pulse du-ra-tion

HW enable(DI digital input)

Inter-pulsepe-riod

ACK_SW_ENA-BLE

Figure 5-9 Output Sequence of the Pulse Train

Terminating the Output Sequence

Deleting the software enable during the on-delay or the pulse train terminates theoutput sequence, and STS_ENABLE and the DO digital output are deleted.

You will then have to restart the output sequence.

Truth Table

SoftwareEnable

SW_ENABLE

DI Digital Input DO Digital Output STS_ENABLE OutputSequence

1 0→1 0, if on-delay >01, if on-delay =0

0→1 Start

0→1 Not used 0, if on-delay >01, if on-delay =0

0→1 Start

0 Any status 0 0 Terminate

1 0 Previous status remains -

1 1 Previous status remains -

1 Not used Previous status remains -

0→1 0 0 0 -

0→1: positive edge

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Setting Times Using a Time Base

Select by means of the parameterizable time base the resolution and range of theperiod duration, the pulse duration, and the on-delay.

Time base = 0.1 ms: You can set times from 0.2 ms to 6.5535 s with a resolution of0.1 ms.

Time base = 1 ms: You can set times from 1 ms to 65.535 s with a resolution of1 ms.

Setting and Changing the Number of Pulses

Set the number of pulses directly as a numerical value between 0 and 65535 withyour control program.

If you change the number of pulses on expiration of the on-delay, the new valuetakes effect immediately:

• If you have increased the number of pulses, the new, higher number of pulsesis output.

• If you have reduced the number of pulses, and if the lower number of pulseshas already been output, the output sequence is terminated, STS_ENABLE andthe DO digital output are deleted, and ERR_PULS is set. At the next outputsequence, ERR_PULS is deleted.

Setting and Changing the Period Duration

Set the period duration as a value between 2 and 65535 in the parameters.

Parameterized period duration = time base × set numerical value

Using the factor for the period duration, you can adjust the parameterized time inyour control program. Set the factor between 0 and 255, with a weighting of 0.1.

Period duration = factor × 0.1 × parameterized period duration

If you change the factor during the output sequence, the new period duration willtake effect at the start of the next output sequence.

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Setting the Pulse Duration

Set the pulse duration as a numerical value between 1 and 65535 with theminimum/pulse duration parameter.

Parameterized pulse duration = time base × preset numerical value

Setting the On-Delay

Set the on-delay as a value between 0 and 65535 in the parameters.

Parameterized on-delay = time base × set numerical value

Parameters of the Pulse Train Mode

Parameters Meaning Value Range Default

Mode Set the pulse changemode.

• Pulse output

• Pulse-width modulation

• Pulse train

• On/off-delay

Pulse output

Time base Using the time base, selectthe resolution and range ofthe period duration, pulseduration, and on-delay.

• 0.1 ms

• 1 ms

0.1 ms

DI function You can use the DI digitalinput as an input or as aHW enable.

• Input

• HW enable

Input

On-delay The time from the start ofthe output sequence to theoutput of the pulse train.

With a time base of 0.1 ms:0 to 65535

With a time base of 1 ms:0 to 65535

0

Minimum/pulse duration Pulse duration:

Enter the response time ofthe actuator connected onyour DO digital output.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms:1 to 65535

If you violate the lower limitof the range, the 2PULSEsets the pulse duration to0.2 ms or 1 ms.

10000 → 1 s

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Parameters DefaultValue RangeMeaning

Period duration The period duration shouldalways be a multiple of theresponse time of theactuator connected to theDO digital output.

Define the period durationaccording to the requiredrepetition rate of thepulses.

You can change the periodduration with your controlprogram.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms:1 to 65535

20000 → 2 s

Control and Feedback Signals of Pulse Train Mode

Control andFeedback Signals

Meaning Value Range Channel 0Address

Channel 1Address

Control signals

Software enable(SW_ENABLE)

Starting and termination ofthe output sequence.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

01 = Start of the outputsequence; may bedependent on the HWenable

Byte 2:

Bit 0

Byte 6:

Bit 0

Number of pulses Number of pulses that areoutput at the DO digital output on expiration of theon-delay.

0 to 65535

If the number of pulses is 0,the 2PULSE does notoutput any pulses. Theoutput sequence isterminated with ERR_PULS= 1.

Word 0 Word 4

Period durationfactor

You can change theparameterized periodduration before the start ofthe output sequence:

Period duration = factor × 0.1 × parameterized period duration

Factor: 0 to 255

Period duration:

> Pulse duration up to65.535 s

If there is a period duration> 65.535 s, it is set to65.535 s.If the period duration is ≤the pulse duration, it is setto a pulse durationof + 0.2 ms.

Byte 3 Byte 7

Feedback Signals

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Control andFeedback Signals

Channel 1Address

Channel 0Address

Value RangeMeaning

STS_ENABLE Indicates an output sequence is running.

0 = pulse output blocked

1 = pulse output running

Byte 0:

Bit 0

Byte 4:

Bit 0

STS_DO Indicates the signal level atthe DO digital output.

Note the update rate.

0 = signal 0 at the DOdigital output

1 = signal 1 at the DOdigital output

Byte 0:

Bit 1

Byte 4:

Bit 1

STS_ DI Indicates the signal level atthe DI digital input.

0 = signal 0 at the DI digitalinput

1 = signal 1 at the DI digitalinput

Byte 0:

Bit 2

Byte 4:

Bit 2

ACK_SW_ENABLE

Indicates the status ofSW_ENABLE.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 0:

Bit 3

Byte 4:

Bit 3

ERR_PULS Indicates a pulse output error.

0 = no pulse output error

1 = pulse output error

Byte 0:

Bit 4

Byte 4:

Bit 4

Input and Output Signals of Pulse Train Mode

Input and Output Signals

Meaning Value Range Channel 0Terminal

Channel 1Terminal

Input signal

HW enable You can select the HWenable with the DIfunction parameter.The signal of the DIdigital input is theninterpreted by the2PULSE at startup.

0 = HW enable deleted

1 = HW enable issued

01= Start of the outputsequence; dependent onthe software enable(SW_Enable)

1 5

Output Signal

Pulse train at the DOdigital output

The preset number ofpulses is output at theDO digital output.

0 = no pulse

1 = pulse

4 8

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5.3.4 On/Off-Delay Mode

Definition

The signal pending at the DI digital input is output with an on/off-delay at the DOdigital output by the 2PULSE.

DIS

R

Q

On-delay

STS_ENABLE

DO&

S

R

Q

Off-delay

Software enable(SW_ENABLE) &

Figure 5-10 Basic Circuit Diagram for On/Off-Delay Mode

Enabling the Output Sequence

You must always issue the enable for the output sequence with the softwareenable (SW_ENABLE 0→1; MANUAL_DO=0) in your control program; this setsSTS_ENABLE. The ACK_SW_ENABLE feedback bit indicates the software enablepending at the 2PULSE.

The positive edge at the DI digital input (0→1) starts the on-delay, and onexpiration of the on-delay the DO digital output is set.

The negative edge at the DI digital input (1→0) starts the off-delay, and onexpiration of the off-delay the DO digital output DO is deleted.

If the 2PULSE recognizes a pulse duration or interpulse period that is too short,this is displayed by the ERR_PULS pulse output error.

At the next edge at the DI digital input, the 2PULSE deletes the ERR_PULSfeedback bit.

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Pulse Diagram

DO digital output

STS_ENABLE

ERR_PULS

On-delayOff-delay

HW enable(DI digital input)

Software enable(SW_ENABLE)

ACK_SW_ENABLE

Figure 5-11 On/Off-Delay Output Sequence

Terminating the Output Sequence

Deleting the software enable (SW_ENABLE 0=1) during the output sequenceterminates it, and STS_ENABLE and the digital output are deleted.

Truth Table

SoftwareEnable

SW_ENABLE

DI Digital Input DO Digital Output STS_ENABLE Output Sequence

1 0→1 0, if on-delay >01, if on-delay =0

1 Start

1 1→0 1, if the off-delay >00, if the off-delay =0

1 Start

0 Any status 0 0 Terminate

1 0 Previous status remains 1 -

1 1 Previous status remains 1 -

0→1 0 0 1 -

0→1: Positive edge

1→ 0: Negative edge

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Minimum Pulse Duration/Minimum Interpulse Period of the DO Digital Output

The minimum pulse duration/minimum interpulse period of the DO digital output is0.2 ms.

Make sure you take this into consideration when you set the on/off-delay and thepulse duration/interpulse period of the DI digital input; otherwise, the response atthe DO digital output is not defined.

The Pulse Duration of the DI Digital Input Is Too Short

The 2PULSE detects a pulse that is too short at the negative edge at the DI digitalinput if:

Pulse duration + off-delay ≤ on-delay.

Response of the 2PULSE to a pulse duration that is too short:

– ERR_PULS is set.

– The current on-delay is deleted.

– The off-delay is not started.

– The signal level at the DO digital output remains at 0.

ERR_PULS is deleted at the next positive edge at the DI digital input.

DI digital input

DO digital output

On-delay

Off-delay

Pulse duration

10

Figure 5-12 The Pulse Duration Is Too Short

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The Interpulse Period of the DI Digital Input Is Too Short

The 2PULSE detects an interpulse period that is too short at the positive edge atthe DI digital input if:

Interpulse period + on-delay ≤ off-delay.

Response of the 2PULSE to an interpulse period that is too short:

– ERR_PULS is set.

– The current off-delay is deleted.

– The on-delay is not started.

– The signal level at the DO digital output remains at 1.

ERR_PULS is deleted at the next negative edge at the DI digital input.

DI digital input

DO digital output

Off-delay

On-delay

10

Interpulse period

Figure 5-13 The Interpulse Period Is Too Short

Retriggering the Current On-Delay

The 2PULSE starts a new on-delay at the positive edge at the DI digital input if:

On-delay > pulse duration + interpulse period

This deletes the current off-delay.

The DO digital output is only set if signal level 1 is present at the DI digital inputlonger than the on-delay. This enables you to filter rapid pulse trains.

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DI digital input

On-delay

Off-delay

Retrigger

Interpulseperiod

Pulse duration

DO digital output

Figure 5-14 Retriggering the Current On-Delay

Retriggering the Current Off-Delay

The 2PULSE starts a new off-delay at the negative edge at the DI digital input if:

Off-delay > pulse duration + interpulse period

This deletes the current on-delay.

The DO digital output is only deleted if signal level 0 is present at the DI digitalinput longer than the off-delay.

DI digital input

Off-delay

On-delay

Retrigger

DO digital output

On-delay

Interpulseperiod

Pulse duration

Figure 5-15 Retriggering the Current Off-Delay

Setting Times Using a Time Base

Select by means of the parameterizable time base the resolution and range of theon-delay and the off-delay.

Time base = 0.1 ms: You can set times from 0.2 ms to 6.5535 s with a resolution of0.1 ms.

Time base = 1 ms: You can set times from 1 ms to 65.535 s with a resolution of1 ms.

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Setting and Changing the On-Delay

Set the on-delay as a value between 0 and 65535 in the parameters.

Parameterized on-delay = time base × set numerical value

Using the factor for the on-delay, you can adjust the parameterized time in yourcontrol program. Set the factor between 0 and 255, with a weighting of 0.1.

On-delay = factor × 0.1 × parameterized on-delay

If you change the on-delay factor, the new on-delay is activated with the nextpositive edge at the DI digital input.

Setting and Changing the Off-Delay

Set the off-delay directly as a numerical value between 0 and 65535 in your controlprogram.

Off-delay = time base × preset numerical value

If you change the off-delay factor, the new off-delay is activated with the nextnegative edge at the DI digital input.

Parameters for the On/Off-Delay Mode

Parameters Meaning Value Range Default

Mode Set the on/off-delay mode. • Pulse output

• Pulse-width modulation

• Pulse train

• On/off-delay

Pulse output

Time base Using the time base, selectthe resolution and range ofthe on-delay and theoff-delay.

• 0.1 ms

• 1 ms

0.1 ms

On-delay The time between apositive edge at the DIdigital input and its outputat the DO digital output.You can change theon-delay with your controlprogram.

With a time base of 0.1 ms:0 to 65535

With a time base of 1 ms:0 to 65535

0

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Control and Feedback Signals of On/Off-Delay Mode

Control and Feedback Signals

Meaning Value Range Channel 0Address

Channel 1Address

Control Signals

Software enable(SW_ENABLE)

You must always issue thesoftware enable in yourcontrol program. If youdelete the software enable,the current outputsequence will beterminated.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 2:

Bit 0

Byte 6:

Bit 0

Off-delay The time between anegative edge at the DIdigital input and its output atthe DO digital output.

With a time base of 0.1 ms:2 to 65535

With a time base of 1 ms:1 to 65535

If you violate the lower limitof the range, the off-delaywill not function.

Word 0 Word 4

On-delay factor Change the parameterizedon-delay:

On-delay = factor × 0.1 ×parameterized on-delay

Factor: 0 to 255

On-delay

0.2 ms to 65.535 s

If the only delay is < 0.2 msor with factor = 0, theeffective on-delay = 0. If the on-delayis > 65.535 s, the on-delayis limited to 65.535 s.

Byte 3 Byte 7

Feedback Signals

STS_ENABLE Indicates the status of thesoftware enable(SW_ENABLE).

0 = software enableblocked

1 = software enable issued

Byte 0:

Bit 0

Byte 4:

Bit 0

STS_DO Indicates the signal level atthe DO digital output.

Note the update rate.

0 = signal 0 at the DOdigital output

1 = signal 1 at the DOdigital output

Byte 0:

Bit 1

Byte 4:

Bit 1

STS_DI Indicates the signal level atthe DI digital input.

0 = signal 0 at the DI digitalinput

1 = signal 1 at the DI digitalinput

Byte 0:

Bit 2

Byte 4:

Bit 2

ACK_SW_ENABLE

Indicates the status ofSW_ENABLE.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 0:

Bit 3

Byte 4:

Bit 3

ERR_PULS Indicates a pulse outputerror if the pulse duration orinterpulse period is tooshort.

0 = no pulse output error

1 = pulse output error

Byte 0:

Bit 4

Byte 4:

Bit 4

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On/Off-Delay Signals for On/Off-Delay Mode

Input and OutputSignals

Meaning Value Range Channel 0Terminal

Channel 1Terminal

Input Signal

DI digital input The signal at the DIdigital input is output withan on/off-delay at the DOdigital output by the2PULSE.

0 = no pulse

1 = pulse

1 5

Output Signal

Pulse at the DO digitaloutput

The signal at the DIdigital input is output withan on/off-delay at the DOdigital output by the2PULSE.

0 = no signal

1 = signal

4 8

5.3.5 Function: Direct Control of the DO Digital Output

Definition

You can directly control the DO digital output of the 2PULSE to test the actuatoryou have connected. To do this, you have to select the function by means of yourcontrol program with the MANUAL_DO control bit set and with the SW_ENABLEcontrol bit deleted.

After you have selected the function, the feedback bits STS_ENABLE andERR_PULS are deleted by the 2PULSE, and an output sequence in operation isterminated.

Preset the status of the DO digital output with the SET_DO control bit.

When you delete the MANUAL_DO control bit, you deselect the function for thedirect control of the digital output (DO). This deletes the DO digital output. You willthen have to restart the output sequence.

Control and Feedback Signals/Output Signal

Signals Meaning Value Range Channel 0Address

Channel 1Address

Control Signals

SW_ENABLE To select the function, thecontrol bit must be deleted.

0 = SW_ENABLE deleted

1 = SW_ENABLE set

Byte 2:

Bit 0

Byte 6:

Bit 0

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Signals Channel 1Address

Channel 0Address

Value RangeMeaning

MANUAL_DO You can select anddeselect the function withthe control bit.

0 = direct control of the DOnot selected.

1 = direct control of the DOselected.

Byte 2:

Bit 1

Byte 6:

Bit 1

SET_DO Preset the status of the DOdigital output with thecontrol bit.

0 = signal 0 at the DOdigital output

1 = signal 1 at the DOdigital output

Byte 2:

Bit 2

Byte 6:

Bit 2

Feedback Signals

STS_ENABLE Deleted after the functionhas been selected.

0 = pulse output blocked

1 = pulse output running

Byte 0:

Bit 0

Byte 4:

Bit 0

STS_DO Indicates the signal level atthe DO digital output.

Note the update rate.

0 = signal 0 at the DOdigital output

1 = signal 1 at the DOdigital output

Byte 0:

Bit 1

Byte 4:

Bit 1

STS_ DI Indicates the signal level atthe DI digital input.

0 = signal 0 at the DI digitalinput

1 = signal 1 at the DI digitalinput

Byte 0:

Bit 2

Byte 4:

Bit 2

DO Digital Output The status preset with theSET_DO control bit isoutput at the DO digitaloutput.

0 = no signal

1 = signal

4 8

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5.3.6 Function: Error Detection/Diagnostics

Parameter assignment error - ERR_PARA

If the 2PULSE cannot identify the parameters as its own, it generates a parameterassignment error. The two channels are then not parameterized.

The 2PULSE slot you configure must match the setup.

Make sure that you only set the 2PULSE parameters that have been described.

ERR_PULS Pulse Output Error

The 2PULSE detects a channel-specific pulse output error in the pulse output,on/off-delay, and pulse train modes.

You can find the causes and responses for these in the relevant mode descriptionand in Section 5.6.

The pulse output error detected is displayed for the channel it affects with theERR_PULS feedback bit.

Sensor Supply Short Circuit - ERR_24V

The 2PULSE detects a short circuit in the sensor supply that it makes available atterminals 2 and 6.

The short circuit error detected is displayed for the two channels with theERR_24V feedback bit.

Short Circuit of the Digital Output - ERR_DO

The 2PULSE detects a short circuit at the digital output of the channel. To do this,you must switch on DO diagnostics in the parameters.

The short circuit detected is displayed for the channel it affects with the ERR_DOfeedback bit.

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Diagnostic Message

In the event of parameter assignment errors or a short circuit in the sensor supplyor in the digital output, 2PULSE generates a diagnostic message for the connectedCPU/master. To do this, you must enable the group diagnosis parameter.

Parameters

Parameters Meaning Value Range Default

Group diagnosis When group diagnosishas been enabled, the2PULSE generates adiagnostic message forthe CPU/master.

Disable/enable Disable

Diagnostics DO The 2PULSE detects ashort circuit of the digitaloutput DO whenDiagnostics DO= on.

Off/on Off

Feedback Signals

Feedback Signals Meaning Value Range Channel 0Address

Channel 1Address

ERR_PARA Indicates aparameterization error.

0 = no parameterizationerror

1 = parameterization error

Byte 0:

Bit 5

Byte 4:

Bit 5

ERR_PULS Indicates a pulse outputerror.

0 = no pulse output error

1 = pulse output error

Byte 0:

Bit 4

Byte 4:

Bit 4

ERR_24V Indicates a short circuit ofthe sensor supply.

0 = no sensor supply shortcircuit

1 = sensor supply shortcircuit

Byte 0:

Bit 7

Byte 4:

Bit 7

ERR_DO Indicates a short circuit ofthe DO digital output. To dothis, you must switch onDO diagnostics.

0 = no digital output shortcircuit

1 = digital output shortcircuit

Byte 0:

Bit 6

Byte 4:

Bit 6

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5.3.7 Behavior at CPU-Master-STOP

Definition

You can parameterize what the 2PULSE is to do in the event of the failure of theparent controller for the two channels together.

Behavior at CPU-MasterSTOP

Channel-Specific Response and the Status of the 2PULSE

Turn off DO Delete the DO digital output

Delete STS_ENABLE

Terminate the current output sequence

Continue working mode The DO digital output remains unchanged

STS_ENABLE remains unchanged

The current output sequence is continued

DO substitute a value Output of the channel-specific, parameterized substitute value of the DOdigital output

Delete STS_ENABLE

Terminate the current output sequence

DO keep last value The DO digital output remains unchanged

Delete STS_ENABLE

Terminate the current output sequence

Startup

To start a new output sequence after CPU/master STOP and afterACK_SW_ENABLE has been set, first delete SW_ENABLE, and repeat thisdeletion until ACK_SW_ENABLE has also been deleted.

If the mode is to continue during a change from CPU-/Master-STOP to RUN(startup), the CPU/Master cannot clear the outputs. Possible solution: In the partof the user program that is processed during startup, set the software enablecontrol bit (SW_ENABLE=1), and write the values to the 2PULSE.

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Modified Parameter Assignment

The status assumed by the 2PULSE at CPU/master STOP remains even in thecase of parameter assignment or configuration of the ET 200S station. Thisoccurs, for example, at power up of the CPU/master or the IM 151 or at theresumption of DP transfer.

In “Continue working mode”, however, and after a modified parameter assignmentor configuration of the ET 200S station has been downloaded to the CPU/master,the 2PULSE terminates the process. As a result, the 2PULSE does the following:

• Deletes the DO digital output.

• Deletes STS_ENABLE.

• Terminates the current output sequence.

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5.4 Application Examples

Section Description Page

5.4.1 Filling Liquids 5-41

5.4.2 Heating a Liquid 5-45

5.4.3 Packing Piece Goods 5-50

5.4.4 Applying a Protective Layer 5-54

The following application examples give you an overview of the possible uses forthe 2PULSE in different processes.

You can use the 2PULSE in different modes according to your generalprocess-related requirements.

The table below shows you the modes some of the processes can be used with:

Applications/Processes Mode

Filling liquids Pulse output

Heating a liquid Pulse-width modulation

Packing piece goods Pulse train

Applying a protective layer On/off-delay

Due to the highly complex nature of the processes, each application example onlyrepresents part of a process.

This section illustrates the principal method of operation of the 2PULSE for thetask chosen. Assumed prerequisites allow you to evaluate how you can use the2PULSE optimally in your process.

Additional Applications

Other possible uses are described in this section.

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5.4.1 Filling Liquids

Description

Filling is started as soon as a container is under the valve. The valve is opened fora preset pulse duration by means of the 24 V control signal. The amount of liquid isproportional to the specified pulse duration.

The 2PULSE generates the 24 V control signal at its digital output for the pulseduration you have specified. After it has been filled, the container is moved along.

Valve

24 V control signalfrom 2PULSE

24 V enable signalto 2PULSE

Pump

Initiator

Figure 5-16 Filling Liquids

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Requirements

• The volume of liquid to be filled is proportional to the time the valve is open.

• The cross-section of the feeder pipe cannot be changed.

• The valve only has the two positions OPEN or CLOSED.

• The minimum pulse duration must be longer than the on/off times specified bythe manufacturer.

Pulse Output Mode

Use channel 0 of the 2PULSE in pulse output mode for the filling process. In thismode, the 2PULSE generates a pulse at the DO digital output (24 V control signal)for the specifiable pulse duration to control the valve.

Sequence

Start of the filling process: To start the process, use the software enable(SW_ENABLE) on your control program. The 2PULSE uses the 24 V enable signal(DI digital input) to check whether the container is correctly positioned. Then openthe valve using the control program (SW_ENABLE 0→1) and start the fillingprocess.

Monitoring the filling process: The error detection/diagnostic function allows youto check in the program that the process is running correctly.

End of the filling process: You can find out when the process has finished in theprogram by evaluating STS_ENABLE.

24 V enable signal(DI digital input)

Software enable(SW_ENABLE)

24 V control signal(DO digital output)

STS_ENABLE

Container is positioned

Fillingstarts

Fillingends

Container is moved away

Pulse duration = 5000 ms

Figure 5-17 Flow Diagram for the Filling Process

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Parameters

The following parameters are required for channel 0 of the 2PULSE to fill liquids inpulse output mode.

Table 5-1 Parameter List for the Filling Process

Parameters Set Value Meaning

Group diagnosis Enable The following errors trigger adiagnostic message:

• Short circuit - DO digitaloutput

• Short circuit of thesensor supply

• Parameter assignmenterror

Diagnostics DO 0 On The 2PULSE detects theshort circuit of the DO 0digital output error.

Behavior atCPU-Master-STOP

Turn off DO 0

Mode Pulse output

Time base 1 ms All the preset times arespecified at a resolution of1 ms.

DI function 0 Input The digital input is used toestablish whether thecontainer is correctlypositioned.

On-delay 0 The valve is openedimmediately withSW_ENABLE = 1

The additional parameters of channel 0 of the 2PULSE have no effect on the pulseoutput mode.

The parameters for channel 1 are not relevant in this application example.

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Programming/Flow Diagram

Below you will find a section from a STEP 7 STL program.

The configured start address of the inputs and outputs of the 2PULSE is 256.

You use this part of the program to start the filling process. To do this, memorymarker M30.0 must be set.

The pulse duration in this example is 5000 ms.

STL Description

Block:

L PIB256T MB20

L 5000T PQW256

L 0T MB10A M20.2A M30.0= M10.0

L MB10T PQB258

Read the feedback messages from channel 0 of the2PULSE

Write a pulse duration of 5000 ms to channel 0 of the2PULSE

Generate SW_ENABLE

Container is positionedStart of the filling process:Set SW_ENABLE=1

Write control signals to channel 0 of the 2PULSE

Wiring/Terminal Assignment Diagram

TM-E15S24-01 and2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

Channel 0 Channel 1

Initiator

ValveDO 0

24 V enable signal

24 V control signal

Figure 5-18 Terminal Assignment of the 2PULSE for Filling Liquids

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5.4.2 Heating a Liquid

Description

A liquid is heated with an electrical heating element. The energy needed to do thisis supplied to the heating element by a switching element (a contactor, forexample).

The 2PULSE generates a 24 V control signal for the switching element. Thetemperature of the heating element is determined by the on/off length of the 24 Vcontrol signal.

The longer the 24 V control signal is switched on, the longer the heating processand therefore the greater the rise in temperature of the fluid.

24 V control signal from the2PULSE

Electrical heating element

Figure 5-19 Heating a Liquid

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Requirements

• The heating element only has two switching states: ON or OFF.

• The flow of heat corresponds to the ration of the on/off duration of the 24 Vcontrol signal.

• The minimum pulse or minimum interpulse period must be greater than theresponse times of the switching element and heating element.

Pulse-Width Modulation (PWM) Mode

Use channel 0 of the 2PULSE in pulse-width modulation mode to control theheating element. In this mode, the 2PULSE generates a pulse train at the DOdigital output (24 V control signal) for the specifiable ratio of the pulseduration/period duration to control the switching element.

Sequence

Starting the heating process: To start the heating process, use the softwareenable (SW_ENABLE) in your control program.

Monitoring the heating process: The error detection/diagnostic function allowsyou to check by means in the program that the heating element is being controlledcorrectly.

STS_ENABLE

Heating process starts

Software enable(SW_ENABLE)

24 V control signal(DO digital output)

Figure 5-20 Flow Diagram - Heating a Liquid

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Parameters

The following parameters are required for channel 0 of the 2PULSE to heat a liquidin pulse-width modulation mode.

Table 5-2 Parameter List for Heating a Liquid

Parameters Set Value Meaning

Group diagnosis Enable The following errors trigger adiagnostic message:

• Short circuit - digitaloutput

• Short circuit of thesensor supply

• Parameter assignmenterror

Diagnostics DO 0 On The 2PULSE detects theshort circuit error at the DO0 digital output.

Behavior atCPU-Master-STOP

Turn off DO 0

Mode Pulse-width modulation

PWM output format Per mill The output value is presetin [‰] (0...1000)

Time base 1 ms All the preset times arespecified at a resolution of1 ms.

DI function 0 Input The digital input is notrequired for this application

On-delay 0 The 24 V control signal isimmediately output withSW_ENABLE=1

Minimum/pulse duration 500 Minimum pulse duration:

This is 500 ms in theselected time base; this alsoapplies to the minimuminterpulse period

Period duration 30000 This is 30 s in the selectedtime base

The additional parameters of channel 0 of the 2PULSE have no effect onpulse-width modulation mode.

The parameters for channel 1 are not relevant in this application example.

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Programming/Flow Diagram

Below you will find a section from a STEP 7 STL program.

The configured start address of the inputs and outputs of the 2PULSE is 256.

This part of the program starts the heating process. To do this, memory markerM30.0 must be set. Set up the output value in memory word MW32.

STL Description

Block:

L PIB256T MB20

L MW32T PQW256

L 10T PQB259

L 0T MB10A M30.0= M10.0

L MB10T PQB258

Read feedback messages from channel 0 of the 2PULSE

Write output value to channel 0 of the 2PULSE

Write period duration factor 10 0.1 to channel 0 ofthe 2PULSE

Generate SW_ENABLE control signal

Heating process startsSet SW_ENABLE=1

Write control signals to channel 0 of the 2PULSE

Wiring/Terminal Assignment Diagram

TM-E15S24-01 and2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

Channel 0 Channel 1

ContactorDO 0

24 V control signal

Figure 5-21 Terminal Assignment of the 2PULSE for the Heating of a Liquid

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Additional Applications

Limit-value monitoring of the temperature: To monitor the limits of thetemperature of the medium, use a temperature sensor evaluated by an analogmodule. You can monitor the temperature with your control program.

Temperature control: To control the temperature of the medium, use atemperature sensor evaluated by an analog module. You can use one of thesoftware controllers of SIMATIC S7 to do this. Pass on the manipulated variablecalculated by the software closed-loop controller directly to the 2PULSE using yourcontrol program. If you require separate actuators for heating and cooling, use thesecond channel of the 2PULSE. If you detect a negative manipulated variable inyour control program, pass on the value to the second channel of the 2PULSE.

Heating up a liquid with a heat exchanger: Basic actuators that only have twoend settings (OPEN/CLOSED) create an almost continuous manipulated variablethrough the control of the 24 V control signal. This will enable you to control, forexample, the flow through a heat exchanger using a solenoid valve.

Heat exchanger Solenoid valve

24 V control signal from the 2PULSE

Figure 5-22 Using a Solenoid Valve to Control the Flow

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5.4.3 Packing Piece Goods

Description

Packing is started as soon as a folding box from conveyor 1 is in the correctposition. The 24 V control signal controls the pusher and, when thecompartmentalized conveyor is in operation, pushes the piece goods into thefolding box. Each pulse corresponds to a complete movement of the pusher. Thenext movement of the pusher begins at the next pulse from the pulse train.

The number of items that have to be packed corresponds to the number of outputpulses.

The 2PULSE generates the 24 V control signal at its DO digital output with thenumber of pulses you have specified. After the piece goods have been packed, thefolding box is moved on.

Counting begins from the start again when a new folding box passes the initiator.

24 V control signalfrom the 2PULSE

24 V enable signal to the 2PULSEInitiator

ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ

Locking mechanism

Conveyor 1

Compartmentalized conveyor

Foldingbox

Foldingbox

Foldingbox

Figure 5-23 Packing Piece Goods

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Requirements

• Identical piece goods

• Repetition rate depends on the conveyor

• Constant speed of the compartmentalized conveyor during pulse output

• The pulse duration and interpulse period must be longer than the response timeof the pusher.

Pulse Train Mode

Use channel 0 of the 2PULSE in pulse train mode to pack piece goods. In thismode, the 2PULSE generates a specifiable number of pulses at the DO digitaloutput to control the pusher. The pulse duration and period duration of the outputsignal can be adjusted.

Sequence

Start of the packing process: To enable the start, use the software enable(SW_ENABLE 0→1) in your control program. The 2PULSE uses the 24 V enablesignal (HW enable, DI digital input) to tell whether the folding box is correctlypositioned and then starts the pusher.

Monitoring the packing process: The error detection/diagnostic function allowsyou to check in the program that the packing process is running correctly.

End of the packing process: By evaluating STS_ENABLE, you can find outwhen the preset number of goods has been packed.

STS_ENABLE

The folding boxis in position,the pusherstarts

Preset number ofgoods packed

Folding box is moved away

24 V enable signal(HW enable; DI digi-tal input)

Software enable(SW_ENABLE)

24 V control signal(DO digital output)

Figure 5-24 Flow Diagram for the Packing of Piece Goods

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Parameters

The following parameters are required for channel 0 of the 2PULSE to pack piecegoods in pulse train mode.

Table 5-3 Parameter List for the Packing of Piece Goods

Parameters Set Value Meaning

Group diagnosis Enable The following errors trigger adiagnostic message:

• Short circuit - digitaloutput

• Short circuit of thesensor supply

• Parameter assignmenterror

Diagnostics DO 0 On The 2PULSE detects theshort circuit error at the DO0 digital output.

Behavior atCPU-Master-STOP

Turn off DO 0

Mode Pulse train

Time base 1 ms All the preset times arespecified at a resolution of1 ms.

DI function 0 HW enable

On-delay 0 The pusher is controlledimmediately with thesoftware enable.

Minimum pulse duration 500 This is 500 s in the selectedtime base

Period duration 1000 This is 1 s in the selectedtime base. This results in aninterpulse period of 500 ms.

The additional parameters of channel 0 of the 2PULSE have no effect on pulsetrain mode.

The parameters for channel 1 are not relevant in this application example.

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Programming/Flow Diagram

Below you will find a section from a STEP7 STL program.

The configured start address of the inputs and outputs of the 2PULSE is 256.

You use this part of the program to start the packing process (5 pieces). To do this,memory marker M30.0 must be set.

The HW enable then starts the pulse train.

STL Description

Block:

L PIB256T MB20

L 5T PQW256

L 10T PQB259

L 0T MB10A M30.0= M10.0

L MB10T PQB258

Read the feedback messages from channel 0 of the2PULSE

Write the number of pieces (5) to channel 0 of the2PULSE

Write period duration factor 10 0.1 to channel 0 ofthe 2PULSE

Generate SW_ENABLE control signal

Enable the packing processSet SW_ENABLE=1

Write control signals to channel 0 of the 2PULSE

Wiring/Terminal Assignment Diagram

TM-E15S24-01 and2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

Channel 0 Channel 1

Initiator

Locking mechanismDO 0

24 V enable signal

24 V control signal

Figure 5-25 Terminal Assignment of the 2PULSE for the Packing of Piece Goods

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5.4.4 Applying a Protective Layer

Description

Metal parts are to be covered with a wax layer. The conveyor belt moves at aconstant speed. As soon as a metal part passes the initiator, the valve is opened.The distance the item and the wax have to cover is proportional to the time.

The 2PULSE receives a 24 V enable signal from the initiator. The 2PULSE thengenerates a 24 V control signal at its digital output that opens the valve. The valveremains open while the Initiator sends the 24 V enable signal to the 2PULSE.

To ensure that the wax hits the metal at the optimum time, a correspondingon/off-delay is required.

Valve

24 V control signal from the2PULSE

24 V enable signal to the2PULSE

Pump

Initiator

ÏÏÏÏÏÏÏÏÏÏÏÏ

ÏÏÏÏÏÏÏÏÏÏÏÏ

Figure 5-26 Applying a Protective Layer

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Requirements

• The item is moved at a constant and quantifiable speed. (The distance isproportional to the time.)

• The valve only has the two positions OPEN and CLOSED.

• The minimum pulse duration must be longer than the on/off times specified bythe manufacturer.

On/Off-Delay Mode

Use channel 0 of the 2PULSE in on/off-delay mode to control the valve. In thismode, the 2PULSE generates a 24 V control signal at its DO digital output tocontrol the valve. This 24 V control signal is switched on and off with the 24 Venable signal.

Sequence

Start of the process: To start the process, use the software enable(SW_ENABLE) on your control program. The 2PULSE uses the 24 V enable signal(DI digital input) to check whether a metal object is positioned at the initiator. Thevalve is opened on expiration of the on-delay. If the metal object goes past theinitiator, the valve is closed after the off-delay has expired.

Monitoring the process: The error detection/diagnostic function allows you tocheck by means of a program that the valve is being controlled correctly.

End of the process: You can tell on the program by evaluating the STS_DO(status of the 24 V control signal) when the process has ended.

STS_ENABLE

Metal object atthe initiator

Valve open Metal object pastthe initiator

Close valve

24 V enable signal(DI digital input)

Software enable(SW_ENABLE)

24 V control signal(DO digital output)

Figure 5-27 Flow Diagram for Applying a Protective Layer

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Parameters

The following parameters are required for channel 0 of the 2PULSE to apply aprotective layer in on/off-delay mode.

Table 5-4 Parameter List for Applying a Protective Layer

Parameters Set Value Meaning

Group diagnosis Enable The following errors trigger adiagnostic message:

• Short circuit - digitaloutput

• Short circuit of thesensor supply

• Parameter assignmenterror

Diagnostics DO 0 On The 2PULSE detects theshort circuit error at the DO0 digital output.

Behavior atCPU-Master-STOP

Turn off DO

Mode On/off-delay

Time base 1 ms All the preset times arespecified at a resolution of1 ms.

On-delay 500 The valve is switched onafter an on-delay of 500 ms.

The additional parameters of channel 0 of the 2PULSE have no effect onon/off-delay mode.

The parameters for channel 1 are not relevant in this application example.

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Programming/Flow Diagram

Below you will find a section from a STEP7 STL program.

The configured start address of the inputs and outputs of the 2PULSE is 256.

You use this part of the program to start the process. To do this, memory markerM30.0 must be set. Set up the off-delay in memory word MW32.

STL Description

Block:

L PIB256T MB20

L MW32T PQW256

L 10T PQB259

L 0T MB10A M30.0= M10.0

L MB10T PQB258

Read the feedback messages from channel 0 of the2PULSE

Write off-delay to channel 0 of the 2PULSE

Write on-delay factor 10 0.1 to channel 0 of the2PULSE

Generate SW_ENABLE control signal

Heating process startsSet SW_ENABLE=1

Write control signals to channel 0 of the 2PULSE

Wiring/Terminal Assignment Diagram

TM-E15S24-01 and2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

Channel 0 Channel 1

Initiator

ValveDO 0

24 V enable signal

24 V control signal

Figure 5-28 Terminal Assignment of the 2PULSE for Applying a Protective Layer

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5.5 Technical Specifications for the Hardware and TerminalAssignment

Dimensions and Weight

Dimensions W x H x D(mm)

158152

Weight Approximately 40 g

Data for Specific Modules

Number of Channels 2

Voltage, Currents, Potentials

Rated load voltage L+(from the power module)

• Reverse polarityprotection

24 VDC

Yes 1)

Galvanic isolation

• Between the channels

• Between the channelsand backplane bus

No

Yes

Permissible potentialdifference

• Between differentcircuits

Insulation tested with

75 VDC, 60 VAC

500 VDC

Sensor supply

• Output voltage

• Output current

L+ -0.8V

Maximum 500 mA,short-circuit proof

Current input

• From the backplane bus

• From load voltage L+(no load)

Maximum 10 mA

Maximum 40 mA

Power dissipation of the2PULSE

Typically 1.8 W

Data for the Digital Inputs

Input voltage

• Rated value

• With signal “1”

• With signal “0”

24 VDC

11V ... 30V

–30V ... 5V

Input current

• With signal “1” 9 mA (typically)

Minimum pulseduration/interpulse period

25 s

Maximum response time 100 s

Input characteristic To IEC 1131, Part 2,Type 2

Connection of 2-wireBEROs

• Permitted residualcurrent

Possible

≤ 2 mA

Shielded cable length Max. 100 m

Data for the Digital Outputs

Output voltage

• With signal “1” Minimum L+ – 1 V

Output current

• With signal “1”

Rated value

Permitted Range

• With signal “0” (leakagecurrent)

2 A 2)

7 mA...2 A

Maximum 0.5 mA

Minimum pulse duration 200 s

Accuracy ± (Pulseduration × 100 ppm)±100 s 3)

Output delay (with resistiveload)

• At “0” to “1”

• At “1” to “0”

Maximum 100 s

Maximum 200 s

Lamp load Maximum 10 W

Control of a digital input Yes

Switching frequency

• With resistive load

• With inductive load

• With lamp load

2.5 kHz

2 Hz

10 Hz

Limitation (internal) of theinductive circuit interruptionvoltage

L+ –(50 V ... 65 V)

Short-circuit protection foroutput

• Response threshold

Yes

Typically 10 A

Cable lengths

• Unshielded

• Shielded

600 m

1000 m

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Status, Interrupts, Diagnostics

Status indicators Green LED for DI 0,DI 1, DO 0, DO 1

Diagnostic functions

• Group error

• Diagnostic informationreadable

Red “SF” LED

Yes

Update rate for feedbackmessages

1.2 ms

1) Polarity reversal can lead to the digital outputs being

switched through.

2) See the figures below

3) With a load of ≤ 50 Ω

The figures below show you the output current in relation to the ambienttemperature and the frequency.

0

40 50 60

0.5

1

1.5

2

2.5

0,6 kHz/1,67 ms

2.5 kHz/400µs

1 kHz / 1ms

Ambient temperature [C]

Cur

rent

[A]

Figure 5-29 Resistive Load - Both Channels PWM 50/50

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0

40 50 60

0.5

1

1.5

2

2.5

1,5 kHz/666µs

2.5 kHz/400µs

Ambient temperature [C]

Cur

rent

[A]

Figure 5-30 Resistive Load - Only Channel 0 PWM 50/50

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Terminal Assignment

The following table shows the terminal assignment for the 2PULSE.

View Terminal Assignment Meaning

TM-E15S24-01 and2PULSE

MM

24 VDC24 VDC

DO 1

DI 1DI 0

DO 0

Channel 0 Channel 1

Channel 0: Terminal 1...4

Channel 1: Terminal 5...8

24 VDC: Sensor supply

M: Chassis ground

DI: Input signal

DO: Output signal

(Maximum 2 A perchannel)

Wiring Rules

The cables (terminals 1 and 2 and terminals 5 and 6) must be shielded. The shieldmust be supported at both ends. To do this use the shield contact (see theET 200S Distributed I/O System manual, Appendix A, ET 200S Accessories).

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5.6 Technical Specifications for Programming, Reference Lists

Assignment of the Control Interface

Address Assignment

Channel 0 Channel 1

Word 0 Word 4 Depending on the mode

• Pulse output: Pulse duration

• Pulse-width modulation: Output value

• Pulse train: Number of pulses

• On/off-delay: Off-delay

Byte 2 Byte 6 Bit 7: Reserve = 0

Bit 6: Reserve = 0

Bit 5: Reserve = 0

Bit 4: Reserve = 0

Bit 3: Reserve = 0

Bit 2: SET_DO

Bit 1: MANUAL_DO

Bit 0: SW_ENABLE

Byte 3 Byte 7 Depending on the mode

• Pulse output: On-delay factor

• Pulse-width modulation: Period duration factor

• Pulse train: Period duration factor

• On/off-delay: On-delay factor

Assignment of the Feedback Interface

Address Assignment

Channel 0 Channel 1

Byte 0 Byte 4 Bit 7: ERR_24V

Bit 6: ERR_DO

Bit 5: ERR_PARA

Bit 4: ERR_PULS

Bit 3: ACK_SW_ENABLE

Bit 2: STS_DI

Bit 1: STS_DO

Bit 0: STS_ENABLE

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Notes on the Control Signals

Control Signal Notes

Pulse output mode:

• Pulse duration The time that is set for the DO digital output on expiration ofthe on-delay.

• On-delay factor You can change the parameterized on-delay before the startof the output sequence:

On-delay = factor × 0.1 × parameterized on-delay

Pulse-width modulation mode

• Output value Value that is output with pulse-width modulation at the DOdigital output on expiration of the on-delay.

• Period duration factor Change the parameterized period duration:

Period duration = factor × 0.1 × parameterized period duration

Pulse train mode

• Number of pulses Number of pulses that are output at the DO digital output onexpiration of the on-delay.

• Period duration factor You can change the parameterized period duration before thestart of the output sequence:

Period duration = factor × 0.1 × parameterized period duration

On/off-delay mode

• Off-delay

The time between a negative edge at the DI digital input andits output at the DO digital output.

• On-delay factor You can change the parameterized on-delay before the startof the output sequence:

On-delay = factor × 0.1 × parameterized on-delay

Direct control of the digital output

• MANUAL_DO You use the control bit to select and deselect the function fordirectly controlling the digital output.

• SET_DO You use the control bit to set the status of the DO digitaloutput.

Software enable (SW_ENABLE) You must always issue the software enable in your controlprogram. If you don’t use a HW enable, the output sequencewill be started by the positive edge of the software enable. Ifyou delete the software enable, the current output sequencewill be terminated.

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Notes on the Feedback Bits

Feedback Bits Notes

ACK_SW_ENABLE Indicates the status of the software enable pending at the 2PULSE.

ERR_24V Indicates a short circuit of the sensor supply.

ERR_DO Indicates a short circuit at the digital output. To do this, you must switch on DOdiagnostics.

ERR_PARA Indicates a parameterization error.

ERR_PULS Pulse output mode:

Indicates a pulse output error. If, on expiration of the on-delay, you reduce thepulse duration so much that the time is shorter than the time already output,this is detected by the 2PULSE.

The next time the output sequence starts, the 2PULSE deletes the ERR_PULSfeedback bit.

Pulse train mode:

Indicates a pulse output error. If, on expiration of the on-delay, you reduce thenumber of pulses and this lower number of pulses has already been output, thisis detected by the 2PULSE.

The next time the output sequence starts, the 2PULSE deletes the ERR_PULSfeedback bit.

On/off-delay mode:Indicates a pulse output error if the pulse duration or interpulse period is too short.

The 2PULSE deletes the ERR_PULS feedback bit at the next positive edge of thesoftware enable or at the next edge at the DI digital input.

STS_ DI Indicates the signal level at the DI digital input.

STS_DO Indicates the signal level at the DO digital output.

STS_ENABLE Pulse output mode:

Is set at the start of the output sequence until the pulse duration expires. If youdelete the software enable (SW_ENABLE) or the 2PULSE detects a pulseoutput error (ERR_PULS), STS_ENABLE is deleted.

Pulse-width modulation (PWM) mode

Is set at the start of the output sequence. If you delete the software enable(SW_ENABLE), STS_ENABLE is deleted.

Pulse train mode:

Is set at the start of the output sequence until the output of the last pulse. If youdelete the software enable (SW_ENABLE) or the 2PULSE detects a pulseoutput error (ERR_PULS), STS_ENABLE is deleted.

On/off-delay mode:

Indicates the status of the software enable (SW_ENABLE) detected by the2PULSE.

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Access to the Control and Feedback Interfaces in STEP 7 Programming

Configuration with STEP 7 Usingthe DDB File

Configuration with STEP 7 UsingHWCONFIG

Feedback interface Load instruction (L PEW, forexample)

Load instruction (L PEW, forexample)

Control interface Transfer instruction (T PQW, forexample)

Transfer instruction (T PQW, forexample)

Parameter List

Parameters Value Range Default

Group diagnosis Disable/enable Disable

Behavior at CPU-master STOP Turn off DO/Continue working mode/DO substitute a value/DO keep last value

Turn off DO

Channel 0

Diagnostics DO Off/on Off

Substitute value DO 0/1 0

Mode Pulse output/Pulse-width modulation (PWM)/Pulse train/On/off-delay

Pulse output

PWM output format Per mill/S7 analog output module Per mill

Time base 0.1 ms/1 ms 0.1 ms

DI function Input/HW enable Input

On-delay 0 - 65535 0

Minimum/pulse duration 0 - 65535 0

Period duration 1 - 65535 20000

Channel 1

Diagnostics DO Off/on Off

Substitute value DO 0/1 0

Mode Pulse output/Pulse-width modulation (PWM)/Pulse train/On/off-delay

Pulse output

PWM output format Per mill/S7 analog output module Per mill

Time base 0.1 ms/1 ms 0.1 ms

DI function Input/HW enable Input

On-delay 0 - 65535 0

Minimum/pulse duration 0 - 65535 0

Period duration 1 - 65535 20000

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Index

Numbers1Count24V/100kHz

clocked mode, 2-3count modes, 2-9measurement modes, 2-45modes, 2-8technical specifications, 2-73terminal assignment diagram, 2-7

1Count5V/500kHzclocked mode, 3-3count modes, 3-9measurement modes, 3-47modes, 3-8technical specifications, 3-74terminal assignment diagram, 3-7

1SSIclocked mode, 4-3detection of encoder value, 4-11encoder types, 4-2in fast mode, 4-9in standard mode, 4-9parameters, 4-21standardization, 4-13technical specifications, 4-27terminal assignment diagram, 4-8

2PULSEapplication examples, 5-40on/off-delay, 5-27pulse output, 5-8pulse train, 5-21PWM, 5-13technical specifications, 5-58terminal assignment, 5-44, 5-61

BBrief instructions on commissioning

1Count24V/100kHz, 2-41Count5V/500kHz, 3-41SSI, 4-42PULSE, 5-3

CClocked mode

1Count24V/100kHz, 2-31Count5V/500kHz, 3-31SSI, 4-3

Comparison setting, 4-15Control and feedback interface, accessing with

STEP7 programming, 2-39, 2-61, 3-41,3-63, 4-25

Control interface, 2-35, 2-57, 4-23, 5-62Count and direction evaluation, 2-68, 3-70Count modes

control interface, 2-35, 3-37feedback interface, 2-35, 3-37

DDirection detection, 4-14

EEncoder value detection

clocked, 4-12free-running, 4-12synchronous, 4-12

Endless counting, 2-11, 3-11

FFeedback interface, 2-35, 2-57, 5-62

fast mode, 4-26Feedback interfaces, standard mode, 4-23Frequency measurement, 2-47, 3-49

GGate functions

in count modes, 2-19, 3-19in measurement modes, 2-53, 3-56

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IInput assignment, 4-23

LLatch function, 4-17

MMeasurement modes

control interface, 2-57, 3-60feedback interface, 2-57, 3-60

OOnce-only counting, 2-13, 3-13Output assignment, 4-24, 4-26

PParameters

1Count24V/100kHz count modes, 2-431Count24V/100kHz measurement modes,

2-66for count modes, 3-45for measurement modes, 3-68

Period measurement, 2-51, 3-54Periodic counting, 2-16, 3-16

RReversal of the direction of rotation, 4-14Rotational speed measurement, 2-49, 3-51

TTechnical specifications

1Count24V/100kHz, 2-731Count5V/500kHz, 3-741SSI, 4-272PULSE, 5-58