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7/25/2019 EMI EMC pt 4
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EMC Design of PCBs
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Contents
Introduction Component selection and mounting
PCB trace impedance
PCB layer stackup Crosstalk control
Power distribution
Decoupling
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Contents
Zoning Grounding
I!s connection
"ermination
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Introduction
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Introduction
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Introduction
EMC Control Measurescan be incorporated at
t#ree le$els%
&Primary le$el 'PCB( Circuitetc)
& *econdary le$el 'Cables(
connector etc)
& "ertiary le$el '*#ielding)
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Introduction
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Introduction
Primary +e$el
& Circuit design measures( Board layout
grounding
*econdary +e$el
& Cables , Connectors
"ertiary +e$el
& !pertures (Gaskets etc
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Component *election , Mounting
Digital circuits& Digital circuits are generator of EMI(#ig#
fre-uency s-uare.wa$es are ric# in #armonics
are distributed t#roug#out t#e system% !nalog circuits
&!nalog circuits are muc# -uieter because #ig#fre-uency s-uare wa$es are not normally t#efeature%
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Component *election , Mounting
Fourier transform
& Basic to understanding of w#y switc#ing circuit cause
interference is t#e concept of time domain /fre-uency
domain transform& *witc#ing wa$eform can be represented as
trape0oidal wit# defined rise and fall time %"#e
#armonic amplitude content of a trape0oid decreases
from t#e fundamental at a rate of 12dB per decade
until a breakpoint is reac#ed at 3/ptr( after w#ic# it
decreases at 42dB/decade
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Component *election , Mounting
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Component *election , Mounting
It is ad$isable to use t#e slowest logic
family t#at will do t#e 5ob6 don7t use fast
logic w#en it is unnecessary% "reat wit#
caution any proposal to substitute de$ices
from a faster logic family( suc# as
replacing 849C parts wit# 84!C%
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Component *election , Mounting
9armonics contents of different logic families
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Component *election , Mounting
*ome IC manufacturers are addressing t#e problem of :;emissions at t#e c#ip le$el%
By careful attention to t#e internal switc#ing regime of +*I
de$ices( noise currents appearing at t#e pins can be
minimi0ed% "#e transition times can be optimi0ed rat#er t#an minimi0ed
for a gi$en application %
:e$ised package design and smaller packages can allow
t#e decoupling capacitor to be placed as close as possibleto t#e c#ip( wit#out t#e internal lead frame7s inductance
negating its effect6
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Component *election , Mounting
;rom t#e point of
$iew of immunity( a
slow logic family will
respond less readily
to fast transient
interference
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Component *election , Mounting
"#e #ig# fre-uency spectral content of t#e
component signal are gauged by t#e signal
speed