Electronics Review 'Flashcards'web.eece.maine.edu/~hummels/classes/ece343/docs/flashcards.pdfElectronics Review "Flashcards" Don Hummels, University of Maine January 24, 2012 Don Hummels,

Outline Op Amps Diodes Silicon pn Junctions BJTs MOSFETs Impedance

Electronics Review ”Flashcards”

Don Hummels, University of Maine

January 24, 2012

Don Hummels, University of Maine Electronics Review ”Flashcards”


1 Op Amps

2 Diodes

3 Silicon

4 pn Junctions

5 BJTs

6 MOSFETs

7 Impedance



Open Loop Characteristics

Open-Loop Op-Amp Characteristics(first-order model)



Closed Loop Characteristics

Closed-Loop Op-Amp Amplifiers(first-order op-amp model)

A0 large, low-frequencies:

v0 =(

1 +R2

R1

)︸︷︷︸

non-inverting gain

v1 − R2

R1︸︷︷︸inverting gain

v2

-3 dB bandwidth (either input): fBW =fT

1 + R2R1

For finite op-amp low-frequency gain A0, the closed loop in-verting and non-inverting gains are reduced by a factor of1 + (1 + R2/R1)/A0.



Op Amp Saturation

Op-Amp output saturation limits:Rated Output Voltage: Maximum output voltage range.

Rated Output Current: Maximum output current.(Remember that the op-amp must supply the load cur-rent plus any current required by the feedback circuit)

Slew Rate: Maximum rate of change of the output voltage.

SR =dvo

dt

∣∣∣∣max



DC Nonidealitis

Op-Amp DC Imperfections

Offset Voltage: VOS is the maximum magnitude of aDC input voltage that is required tobring the output voltage to zero.Model as an ideal op-amp, with an ad-ditional DC source at one of the opampinput terminals.

In some cases, capacitively coupling an amplifer inputwill significantly reduce the DC gain, so that the output isless dependent on VOS .

Input Currents: The input bias current IB is the aver-age current which must be externallysupplied to each op-amp input termi-nal. The offset current IOS is the max-imum magnitude of the difference be-tween the currents for the two inputs.Model using an ideal op-amp, with twoadditional DC current sources at the in-put terminals to reflect the required biascurrents. Use IB1 ≈ IB2 ≈ IB with|IB1 − IB2| ≤ IOS .

By making the external resistance seen at two op-amp in-put terminals the same (assuming 0-volts at the op-amp out-put), the output can be made independent of IB (but not IOS).



Inverting Amplifier

vo = −R2

R1vin



Inverting Amplifier

vo = −R2

R1vin



Noninverting Amplifier

vo =

(1 +

R2

R1

)vin



Noninverting Amplifier

vo =

(1 +

R2

R1

)vin



Voltage Buffer

vo = vin



Voltage Buffer

vo = vin



Difference Amplifier

vo =R2

R1(v1 − v2)



Difference Amplifier

vo =R2

R1(v1 − v2)



Integrator

H(s) = − 1

R1Cs



Integrator

H(s) = − 1

R1Cs



”Leaky” Integrator

H(s) = − R2/R1

1 + R2Cs



”Leaky” Integrator

H(s) = − R2/R1

1 + R2Cs



Summing Amplifier

vo = −(

Rf

R1v1 +

Rf

R2v2 +

Rf

R3v3 + . . .

)



Summing Amplifier

vo = −(

Rf

R1v1 +

Rf

R2v2 +

Rf

R3v3 + . . .

)



Exponential Diode Model

Exponential Model:

iD = Is

(evD/nVT − 1

)≈ Ise

vD/nVT

Is : Reverse Saturation CurrentVT : Thermal Voltage (≈ 25.8 mV at 300K)n : Ideality Coefficient

vD = nVT ln (iD/IS)rD = nVT /ID



Ideal Diode Model

Ideal Diode Model:



Voltage Drop Model

Constant Voltage Drop Model:



Small-Signal Diode Model

Small Signal Behavior:Once a DC operating point (VD, ID) is determined,deviations from the operating point can be predictedby modeling the diode as the resistance rD = nVT /ID.

iD = ID + id, vD = VD + vd =⇒ vd = idrD



Temperature Dependence

Temperature Dependence:For a pn-junction diode, iD ≈ Ise

vD/nVT . Is grows ex-ponentially with temperature (tending to increase iD or de-crease vD), while VT increases linearly with temperature (tend-ing to have the opposite effect). For silicon at room temper-ature, Is essentially doubles every 5◦C, and dominates thechange in the diode current & voltage (iD increases with T ,while vD decreases with T ). However, the amount of changein iD or vD depends on the bias conditions and on the ideal-ity coefficient n.



Breakdown

Diode Breakdown:If the reverse-bias voltage is large enough, the diode even-tually “breaks down” and begins to conduct current in thereverse direction. The “Breakdown Voltage” is VZ .

Avalanche breakdown occurs when the depletion regionelectric field is large enough to give carriers in the depletionregion enough energy to free additional electron-hole pairsin the crystal. Usually VZ > 5 V for Silicon. VZ tends toincrease with temperature.

Zener breakdown is a quantum effect which occurs inhighly doped devices with narrow depletion regions. UsuallyVZ < 7 V for Silicon. VZ tends to decrease with temperature.

Silicon voltage regulation diodes commonly use Vz ≈ 5.7 Vto achieve a very low temperature coefficient.

In breakdown the resistance rZ gives the relationship be-tween small changes in the diode voltage and current: ∆vD =rz∆iD.



Semiconductors

Periodic Table Segment

III IV V

B C NAl Si PGa Ge AsIn Sn Sb



Physical Constants

Physical Constants

k = 8.62× 10−5 eV/K

= 1.38× 10−23 J/K

q = 1.60× 10−19 coulomb

ε0 = 8.854× 10−14 F/cmVT = kT/q = 25.8 mV at 300K

Silicon at 300K:

EG = 1.12 eV εr = 11.7

ni = pi = 1.5× 1010 cm−3

µn ≈ 1350 cm2/V · s

Dn ≈ 34.8 cm2/s

µp ≈ 480 cm2/V · s

Dp ≈ 12.4 cm2/s



Moving Charge

Charge Movement

Mobile charge carriers include electrons located in the conduction band (and are therefore loosely boundto the crystal), and holes which indicate the absence of an electron in the valence band. The electron andhole density are denoted n and p. The charge density due to the mobile carriers is −nq and pq, where qis the charge of a single electron/hole. If the temperature is nonzero (T 6= 0) these carriers are alwaysmoving randomly. Current is the average movement of this cloud of charge carriers.

DRIFT is the movement of the charge due to an applied electric field, E. Electrons and holes reachan average velocity of −µnE and µpE respectively, where µn and µp are the electron and hold mobilityfor the crystal. The current density due to drift of carriers is (Ohm’s law):

Jdrift = pqµpE + nqµnE = q(pµp + nµn)E =E

ρ, ρ =

1q(pµp + nµn)

= “resistivity”

If the carrier density is not uniform (n and p depend on the position x in the crystal), then the randommotion of the carriers causes a net current which tends to “even out” the carrier density. This net currentis “DIFFUSION”, and is proportional to the negative of the rate of change of the charge densities:

Jdiff = Dn

(qdn

dx

)−Dp

(qdp

dx

)The diffusivities Dn and Dp increase with temperature and with mobility. The Einstein Relationshipgives

Dn

µn=Dp

µp= VT =

kT

q(≈ 25.8 mV for T = 300 K)



Resistivity

Resistivity/Resistance

The resistance of a sheet of mate-rial with thickness t, width W , andlength L is

R = ρL

tW=

(ρt

) (W

L

)A fab is likely to let a designer con-trol L andW , and usually providesthe sheet resistance ρ/t.



Intrinsic Silicon Carier Density

Si Approximation: n

i

2 doubles every 5 degrees

ni =1.5 x 1010 at 300K n i

2∝T 3 e−EG /kT

EG =1.12 eV



Doping

Carrier densities are controlled by introducing “dopants” into a crystal. Group V elements are“donors”, which ionize to introduce a conduction-band electron. The positive-charged ion remains fixedwithin the crystal lattice. Group III elements are “acceptors” which ionize by adopting an electron in thevalance band from a neighboring atom, creating a hole. In this case, the fixed ion is negatively charged.The donor and acceptor concentrations in a crystal are denoted ND and NA.

The “Mass-Action Law” relates the carrier concentrations by np = n2i , where ni is the intrinsic

(undoped) carrier concentration (which depends strongly on temperature).The doping concentration is used to determine the majority carrier concentration. The minority

carrier concentration is determined by the mass-action law and remains highly temperature dependent.

n-type: ND � NA n = ND −NA p = n2i /n

p-type: NA � ND p = NA −ND n = n2i /p



Silicon Mobility Vs Temperature and Doping Level

n ≈ 1350 at 300K (No doping)

p ≈ 480 at 300K (No doping)

Carrier Mobility Trends For Silicon



Unbiased Junction

For no applied voltage, free majority car-riers near a pn junction tend to diffuse intothe opposite region (in the diagram, holesdiffuse to the right, and electrons to theleft). The result is a depletion region nearthe junction in which no free carriers areavailable, and the bound charge due to theionized dopant atoms remain. The pres-ence of the bound charge creates an elec-tric field in the depletion region which op-poses the diffusion of free charge carriers.The depletion region expands until thedrift current associated with the electricfield cancels the diffusion current. Thebuilt in potential V0 is the voltage that de-velops across the junction associated withthe developed uncovered charge/electricfield.At equilibrium (for an abrupt pn junctionwith no applied voltage),

V0 = VT ln(NAND

n2i

)wD0 = xn + xp =

√2εqV0

(1NA

+1ND

)xn0 =

(NA

NA +ND

)wD0

xp0 =(

ND

NA +ND

)wD0



Junction With External Voltage

An external voltage applied to the pn-junction opposes thebuilt-in potential, so that the actual voltage across the pnjunction becomes V0 − vD. The effect is to change thewidth of the depletion region. The stored charge, E-fieldstrength, depletion region widths, etc. can be calculatedusing the same equations as for the zero-bias case by re-placing V0 with the new junction voltage V0−vD. The re-sult is that xn, xp and wD are all scaled by

√1− vD/V0

from their zero-bias values. e.g.

wD = wD0

√V0 − vD

V0= wD0

√1− vD

V0

For a reverse bias (vD < 0), the depletion regionbecomes wider. The majority charge carriers donot have enough energy to diffuse across the (in-creased) junction voltage. Only a small current(−Is) due to the drift of minority carriers throughthe junction remains.

A forward bias (vD > 0) decreases the widthof the depletion region. The number of majoritycarriers with enough energy to diffuse across thejunction increases exponentially as vD grows andthe junction voltage decreases.

iD = n2i qA

(Dn

LnNA+

Dp

LpND

)︸︷︷︸

Is

(evD/VT − 1

)= Is

(evD/VT − 1

)

Is = Reverse Saturation Current Ln = Diffusion length of electrons in the p-type materialA = Junction cross-sectional area Lp = Diffusion length of holes in the n-type material



Junction Capacitance

The “Junction” or “Depletion” capacitanceof a diode reflect change in the “uncovered”charge stored in the depletion-region of apn-junction. The small-signal junction ca-pacitance is

CJ =εA

wD

This is the parallel-plate capacitance for twoplates separated by distance wD. For a DCbias voltage VD across the diode, the resultis usually written in terms of the zero-biasvalue CJ0 = εA/wD0:

CJ =CJ0

(1− VD/V0)m

(m = 0.5 for an abrupt pn junction.)



Diffusion Capacitance

The “Diffusion capacitance” of a forward-biased diode reflects change charge associ-ated with the excess minority carriers nearthe pn junction. The diffusion capacitanceis proportional to the diffusion current throughthe diode. Let τT be the “mean transit time”of the diode (the average time for minor-ity carriers to recombine). Then the small-signal diffusion capacitance is

CDIFF =τT IsVT

eVD/VT ≈ τTVT

ID



npn BJT Structure

An npn BJT consists of two pn junctions with a shared p-type “base” region. By design,the n-type “emitter” region is heavily doped relative to the base and collector, so thatelectrons carry the majority of the current in the device. Depletion regions form atboth the base-collector (BC) junction and at the base-emitter (BE) junction. The basewidth wB is kept small, so that most electrons which diffuse into the base cross the basewithout recombining with the free holes in the base.



Forward Active npn Current Flow

When used as an amplifier, a BJT is normally biased in the “forward-active” region of operation (forward biased BE Junc-tion, reverse biased BC junction). In this case, the current flow is controlled by setting the BE junction voltage. Sincemost of the carriers crossing the BE junction are electrons, and most of these diffuse across the base and are swept into thecollector, very little base current is needed to control large emitter and collector currents. The collector current is relativelyinsensitive to the collector voltage, provided the BC junction remains reverse biased.

γF : À Injection Efficiency: Fraction ofBE current carried by electrons(close to one, we hope.)

BT : Á Base Transport Factor: Fractionof electrons crossing the base with-out recombining (also close to one,provided wB is small)

αF = γFBT =iCiE

(Close to one?)

βF =αF

1− αF=iCiB

(Large?)



npn Large Signal Models

Forward-active npn large-signalmodel. Current swept into the collec-tor through the BC junction depletionregion is modeled as a controlledcurrent source.

Equivalent forward-active npn large-signal model relating the collectorcurrent to the base current.

Ebers-Moll Model: Used for allmodes of operation.

ISE = Aqn2i

(Dn

wBNA+

Dp

LpND

)IS , αF ISE = BT γF ISE = BTAqn

2i

(Dn

wBNA

)

Base Width Modulation: Since the width of the BC depletion region changes with the collector voltage, the base widthwB gets smaller as vCE grows. The result is that the collector current increases (slightly) with vCE . Rather than writingthe (complicated) relationship between vCE and IS (and αF ), this “Early Effect” is modeled as a linear change by leavingIS and αF as constants, but scaling the collector current by a factor of (1 + vCE/VA). VA is the “Early voltage”.



npn BJT Large Signal Characteristics

npn BJT Large-Signal Behavior

• Cutoff Mode: Both the BE and BC junctions are reverse-biased. Very little current flows.

• Saturation Mode: Both the BE and BC junctions are forward-biased. The collector and emitter voltages are withina few tenth of volts from each other (vCE < 0.2 V). Base currents may be significant.

• Forward Active Mode: BE junction is forward biased, and BC junction is reverse biased. Most carriers injectedinto the BE junction are swept out through the collector depletion region, so that base currents remain small. Thecollector current is determined primarily by the BE diode voltage, and is nearly independent of the collector voltage.

iC = αiE = βiB = IsevBE/VT

(1 +

vCE

VA

)VT =

kT

q≈ 25.8 mV at T = 300 K α =

β

β + 1



pnp Transistors

An pnp BJT consists of two pn junctionswith a shared n-type “base” region. The p-type “emitter” region is heavily doped, sothat holes carry the majority of the currentin the device. The base width wB is keptsmall, so that most holes which diffuse intothe base cross the base without recombin-ing with the free electrons in the base.

Forward Active Operation: (forward bi-ased EB Junction, reverse biased CB junc-tion) Current flow is controlled by settingthe EB junction voltage. Since most of thecarriers crossing the BE junction are holes,and most of these diffuse across the baseand are swept into the collector, very littlebase current is needed to control large emit-ter and collector currents.

Forward-active pnp large-signal model re-lating the collector current to the emittercurrent.

Equivalent forward-active pnp large-signalmodel relating the collector current to thebase current.

Ebers-Moll Model: Used for all modes ofoperation.



pnp BJT Large Signal Characteristics

pnp BJT Large-Signal Behavior

pnp BJTs are governed by the same voltage/current relationships as npn BJTs, except that the polarities of the voltagesand currents are reversed:

• Cutoff Mode: Both the EB and CB junctions are reverse-biased. Very little current flows.

• Saturation Mode: Both the EB and CB junctions are forward-biased. The collector and emitter voltages are withina few tenth of volts from each other (vEC < 0.2 V). Base currents may be significant.

• Forward Active Mode: EB junction is forward biased, and CB junction is reverse biased. Most carriers injectedinto the EB junction are swept out through the collector depletion region, so that base currents remain small. Thecollector current is determined primarily by the EB diode voltage, and is nearly independent of the collector voltage.

iC = αiE = βiB = IsevEB/VT

(1 +

vEC

VA

)VT =

kT

q≈ 25.8 mV at T = 300 K α =

β

β + 1



BJT Small Signal Characteristics

npn BJT Small-Signal Behavior

Once a DC operating point is determined (the transistor “bias” or “quiescent point” or “Q-point”), deviations from theoperating point can be predicted using a linear circuit model. The hybrid-π model and T-model are shown below.

DC Operating Point:IC , IB , IE , VBE , VCE iX = IX + ix vXY = VXY + vxy

gm =ICVT

rπ =β

gmre =

α

gm

r0 =VA + VCE

IC≈ VAIC



BJT Small Signal Characteristics

pnp BJT Small-Signal Behavior

Once a DC operating point is determined (the transistor “bias” or “quiescent point” or “Q-point”), deviations from theoperating point can be predicted using a linear circuit model. The hybrid-π model and T-model are shown below.

DC Operating Point:IC , IB , IE , VEB , VEC iX = IX + ix vXY = VXY + vxy

gm =ICVT

rπ =β

gmre =

α

gm

r0 =VA + VEC

IC≈ VAIC



Common Emitter Amplifier

Common Emitter Amplifier

Reasonable Gain. Adjustable input impedance. Relatively high out-put impedance. Good inverting voltage amp (If the load is known!)

Avo =−gm(RC ‖ ro)

1 + gm(RC ‖ ro)RE/RClarger0≈ −gmRC

1 + gmRE

largegmRE≈ −RC

RE

Ais = β

Rin = rπ + (β + 1)RERout = RC ‖ {ro + (1 + gmro)(RE ‖ rπ)}



Common Collector Amplifier

Common Collector Amplifier

Nice voltage buffer: High Rin and low Rout. “Copies the input volt-age to an unknown load”.

Avo =RE ‖ ro

re +RE ‖ ro ≈ 1

Ais = β + 1Rin = rπ + (β + 1)(RE ‖ ro)Rout = re ‖ RE ‖ ro ≈ re



Common Base Amplifier

Common Base Amplifier

Nice current buffer: Low Rin and high Rout. “Copies the input cur-rent to an unknown load”. Also used as a noninverting voltage amp—IF you know the load, and need a low input resistance.

Avo = gm(ro ‖ RC)Ais = α ≈ 1

Rin = re +RC

gmro

r0�RC≈ re

Rout = RC ‖ ro



nmos: Structure

n-channel MOSFET Structure

The n-channel MOSFET is formed in p-type body.The source and drain are n-type regions, separatedby the “channel length” L. The gate is a conductorwhich is insulated from the body by a thin oxidelayer.In operation, the body is kept at a low voltageto avoid forward biasing the PN junctions at thesource and drain terminals. Voltages applied to thegate terminal create an electric field which alter theproperties of the channel (directly below the gateoxide). By changing the gate voltage, current be-tween the drain and source is regulated.



nmos: No Bias Voltages

nmos Transistor (all terminals grounded)

If all nmos terminals are grounded, no current flowsin the device. Depletion regions (with the associ-ated electric field) form at both the source and drainpn junctions.Here, the pn junction diodes are explicitely shown.For an nmos transistor, the body voltage is held ator below the source and drain voltages to ensurethat these diodes never conduct significant current.



nmos: Subthreshold

nmos Transistor (subthreshold)

For a small positive gate voltage, an electric field iscreated which drives free holes into the body (awayfrom the gate oxide). The depletion region extendsacross the channel. Positive charge stored on thegate is offset by the negative charge associated withthe ionized dopants in the body (now “uncovered”in the depletion region).For our purposes, no significant current flows be-tween the source and the drain. (There are actuallysmall currents which grow exponentially as the gatevoltage nears the threshold voltage... but we don’ttalk much about those!)



nmos: Ohmic/Triode

nmos Transistor (“ohmic” or “triode” operation)

As the gate voltage (relative to the source) growsbeyond a fixed “threshold voltage” (Vt), eventuallyfree electrons are attracted to the region directly be-low the gate oxide. This layer of electrons in thep-type body is the “inversion region”. A positivevoltage applied to the drain can now cause currentflow between the source and drain through this con-ductive channel.“Ohmic” or “Triode” operation implies that thechannel exists both at the source and drain ends ofthe channel (VGS > Vt and VGD > Vt). Relativeto the source terminal, the voltage conditions are

VGS > Vt, 0 < VDS < VGS − Vt



nmos: Saturation/Pinch-off

nmos Transistor (“pinch-off” or “saturation” operation)

As the drain voltage increases beyond VGS − Vt,the gate voltage is not sufficient to support the in-version region near the drain terminal. The channelbecomes “pinched off”. Current still flows in thedevice: free electrons at the pinched-off end of thechannel are swept into the drain by the electric fieldin the drain-body depletion region. The currentflow becomes (nearly) independent of the actualdrain voltage (but changes in the channel lengthcause small changes in the current – “channel-length modulation”).



MOSFET Large Signal Characteristics

n-channel MOSFET Large-Signal Behavior

• Cutoff Region: No channel at the source or the drain (vGS < Vt). Very little current flows.

• Triode (Ohmic) Region: Channel is supported at both the source and the drain (vGS > Vt and vGD > Vt; orequivalently vOV = vGS − Vt > 0 and vDS < vOV ). The drain current is initially proportional to vDS , with slope1/rDS , but falls off as vDS increases and the device enters saturation.

iD = k′WL

[(vGS − Vt)vDS − 1

2v2

DS

]k′ = µnCox

1rDS

= k′WL

(vGS − Vt) = k′WLvOV

• Saturation (Pinch-off) Region: Channel is supported at the source, but not at the drain (vGS > Vt and vGD < Vt; orequivalently vOV > 0 and vDS > vOV ). The carriers in the channel are swept to the drain through the Drain-Bodydepletion region, so the current is nearly independent of the drain voltage.

iD =k′

2W

L(vGS − Vt)2(1 + λvDS) =

k′

2W

Lv2

OV (1 + λvDS) λ =1VA

=λ′

L=

1V ′

AL

Threshold voltage depends on VSB : Vt = Vt0 + γ[√

2φf + VSB −√

2φf

]



MOSFET Small Signal Characteristics

n-channel MOSFET Small-Signal Behavior (in Saturation only)

Once a DC operating point is determined (the transistor “bias”), deviations from the operating point can be predicted usinga linear circuit model. The hybrid-π model and T-model are shown below.

gm = k′WLVOV

=2IDVOV

=√

2k′(W/L)ID

gmb = χgm =γ

2√

2φf + VSB

gm

r0 =VA + VDS

ID≈ VA

ID=

1λID



Common Source Amplifier

Common Source Amplifier

Reasonable Gain. Adjustable input impedance. Relatively high out-put impedance. Good inverting voltage amp (If the load is known!)

Avo =−gm(RD ‖ ro)

1 + gm(1 + χ)(RD ‖ ro)RS/RD

larger0≈ −gmRD

1 + gm(1 + χ)RS

largegmRE≈ −RD

(1 + χ)RS

Ais =∞Rin =∞Rout = RD ‖ {ro + (1 + gm(1 + χ)r0)RS}



Common Drain Amplifier

Common Drain Amplifier

Nice voltage buffer: Infinite Rin and low Rout. “Copies the inputvoltage to an unknown load”.

Avo =gm(RS ‖ ro)

1 + gm(1 + χ)(RS ‖ ro) ≈1

1 + χ

Ais =∞Rin =∞Rout =

1gm(1 + χ)

‖ RS ‖ ro ≈ 1gm(1 + χ)



Common Gate Amplifier

Common Gate Amplifier

Nice current buffer: Low Rin and high Rout. “Copies the input cur-rent to an unknown load”. Also used as a noninverting voltage amp—if you know the load, and need a low input resistance.

Avo = gm(1 + χ)(RD ‖ ro)Ais = 1

Rin =1

gm(1 + χ)+

RD

gm(1 + χ)ror0�RD≈ 1

gm(1 + χ)Rout = RD ‖ ro



Small Signal Resistance at BJT Base

Emitter Impedances seen through the base of aBJT are increased by a factor of β + 1.

R ≈ rπ + (β + 1)RE



Small Signal Resistance at BJT Collector

Impedances seen through the collector of a BJTare increased by the intrinsic gain of the transis-tor. Loads attached to the emitter are in parallelwith rπ .

R = r0 + (1 + gmr0)(RE ‖ rπ)

With a base resistor, RB is added to rπ , and gm is scaled by(

rπrπ+RB

):

R = r0 +(

1 +(

rπrπ + RB

)gmr0

)(RE ‖ (rπ + RB))



Small Signal Resistance at MOSFET Drain

Impedances seen through the drain of a MOS-FET are increased by the intrinsic gain of thetransistor. Use g′

m = gm + gmb = (1 + χ)gm:

R = r0 + (1 + g′mr0)RS



Small Signal Resistance at BJT Emitter (CommonCollector)

Base Impedances seen through the emitter of aBJT are decreased by a factor of β + 1.

R ≈ rπ +RBβ + 1

= re +RBβ + 1



Small Signal Resistance at BJT Emitter

Collector impedances seen through the emitter ofa BJT are are decreased by the intrinsic gain ofthe transistor.

R = rπ ‖(

1gm‖ r0 +

RC

1 + gmr0

)≈ rπ ‖

(1

gm+

RC

gmr0

)r0�RC≈ rπ ‖ 1

gm= re

With a base resistor, RB is added to rπ , and gm is scaled by(

rπrπ+RB

):

R = (rπ + RB) ‖ 1(

rπrπ+RB

)gm‖ r0 +

RC

1 +(

rπrπ+RB

)gmr0



Small Signal Resistance at MOSFET Source

Impedances seen through the source of a MOS-FET are reduced by the intrinsic gain of the tran-sistor. Use g′m = gm + gmb = (1 + χ)gm:

R =1g′m‖ r0 +

RD

1 + g′mr0

≈ 1g′m

+RD

g′mr0

r0�RD≈ 1g′m


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Electronics Review 'Flashcards'web.eece.maine.edu/~hummels/classes/ece343/docs/flashcards.pdfElectronics Review "Flashcards" Don Hummels, University of Maine January 24, 2012 Don Hummels,