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Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Differential Amplifier
If vG1 = vG2, vo = vD1-vD2 = 0
If vG1 > vG2, vo < 0
If vG1 < vG2, vo > 0
Non-zero output only for input differenceDifferential amplifier
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Consider Common-Mode and Differential-Mode separately.
1 1, 2 2id id
G CM G CMv v
v V v V= + = −
1 21 2,
2G G
CM id G Gv v
V v v v+
= = −
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Common-Mode: vG1= vG2 = vCM
1 2 0 (No CM output)D Dυ υ− =
vCM, max?
DS GS tv v V≥ −
( ) ( )2DD D CM GS GS tIV R v v v V− − − ≥ −
,max 2CM t DD DIV V Rυ∴ = + −
2DD D t CMIV R V v− + ≥
vCM, min?
Input common-mode range
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Differential-mode small-signal analysis (assume vid < VCM)
No voltage changesince left and right areanti-symmetric
1 2 = 2 2id id
od o o m D m D m D idv v
v v v g R g R g R v= − = − − −
odd m D
id
vA g R
v= = −
( || )d m D oA g R r= −With , or
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Differential-mode small-signal half-circuit
1
1
( || )/ 2
2
( || )
om D o
id
odo
odm D o
id
vg R r
vv
v
vg R r
v
= −
=
∴ = −
Differential pair acts as CS amplifier for input difference!
Consider only half circuit
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Why a differential amplifier?
- Input stage for operational amplifier (Op-Amp)
- Not sensitive to noises that are commonto both input signals.
Common-Mode Rejection Ratio
CMRR = |Ad/Acm|
Ideally, infinite
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
What if the current source is NOT ideal?
Common-mode
open circuit(Left and Right aresymmetric)
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Common-Source with source resistanceCommon-mode half circuit
Differential output ( vo = vo1 – vo2), vo= 0
common-mode gain due to Rss for single-ended output
1 ?o
icm
vv
= 1 -o m gs Dv g v R=
(2 )gs icm m gs SSv v g v R= −
1 2icm
gsm SS
vv
g R=
+
1
1 2o m D
icm m SS
v g Rv g R
= −+ 2
D
SS
RR
−
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
What if the current source is NOT ideal? Differential-Mode
vid/2 - vid/2
With anti-symmetric input, the mid-point is still small-signal ground!
( || )d m D oA g R r= −
CMRR: Common-Mode Rejection Ratio(Single-ended output)
( || )CMRR=
2
d m D o
Dcm
ss
A g R rRAR
CMRR for differential output?
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
MOS differential pair is based on the symmetry
Anything that breaks the symmetry affects the circuit performance(CMRR, input offset)
Device mismatches cause non-ideal performance Eliminate RD
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
Active-loaded MOS differential pair(single-ended)
It can be shown with finite , 1
2due to non-ideal current source.
ss
ocm
icm m ss
Rv
Av g R
= −
vicm vicm
Common mode
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
2o m o
did
v g rA
v= =
( || )/ 2
om o o
id
vg r r
v= −
−
But with more detailed analysis,
What is wrong with the half-circuit analysis?
Differential mode small-signal analysis
Assume it is (almost) symmetric
4o m o
id
v g rv
∴ =
Source terminals are grounded
Half circuit analysis is possible
Electronic Circuits 2 (07/1) W.-Y. Choi
Lect. 11: Differential Amplifiers
2
12
12
m od
m o sscm
m ss
g rACMRR g r R
Ag R
∴ = =
The current mirror action is not considered!
Current mirror doubles the transconductance
Twice voltage gain!
12
od m o
id
vA g r
v∴ = =