IEEE TRANSACTIONS ON MAGNETICS, VOL. 51, NO. 11, NOVEMBER 2015 3401507

Electric-Field-Controlled Magnetoelectric RAM:Progress, Challenges, and Scaling

Pedram Khalili Amiri1,2, Juan G. Alzate1, Xue Qing Cai1, Farbod Ebrahimi1,2, Qi Hu2, Kin Wong1,Cécile Grèzes1, Hochul Lee1, Guoqiang Yu1, Xiang Li1, Mustafa Akyol1, Qiming Shao1,

Jordan A. Katine3, Jürgen Langer4, Berthold Ocker4, and Kang L. Wang1

1Department of Electrical Engineering, University of California at Los Angeles, Los Angeles, CA 90095 USA2Inston Inc., Los Angeles, CA 90024 USA

3HGST Inc., San Jose, CA 95135 USA4Singulus Technologies AG, Kahl am Main 63796, Germany

We review the recent progress in the development of magnetoelectric RAM (MeRAM) based on electric-field-controlled writingin magnetic tunnel junctions (MTJs). MeRAM uses the tunneling magnetoresistance effect for readout in a two-terminal memoryelement, similar to other types of magnetic RAM. However, the writing of information is performed by voltage control of magneticanisotropy (VCMA) at the interface of an MgO tunnel barrier and the CoFeB-based free layer, as opposed to current-controlled(e.g., spin-transfer torque or spin–orbit torque) mechanisms. We present results on voltage-induced switching of MTJs in bothresonant (precessional) and thermally activated regimes, which demonstrate fast (<1 ns) and ultralow-power (<40 fJ/bit) writeoperations at voltages ∼1.5–2 V. We also discuss the implications of the VCMA-based write mechanism on memory array design,highlighting the possibility of crossbar implementation for high bit density. Results are presented from a 1 kbit MeRAM test array.Endurance and voltage scaling data are presented. The scaling behavior is analyzed, and material-level requirements are discussedfor the translation of MeRAM into mainstream memory applications.

Index Terms— Magnetic RAM (MRAM), magnetoelectric RAM (MeRAM), nonvolatile memory, spin-transfer torque (STT),voltage control of magnetic anisotropy (VCMA).

I. INTRODUCTION

MAGNETOELECTRIC effects enable new devices wheremagnetic properties are controlled by the application of

an electric field. A number of such emerging devices are basedon electric-field-induced switching of nanomagnets [1]–[5],which may have important applications for memory and logicin electronic systems.

A key advantage of a magnetoelectric device, comparedwith those of existing current-controlled devices utilizingspin-transfer torque (STT) [6]–[11], Oersted fields [12], [13],or even spin-orbit torques [14]–[17], is the potential fordramatic reductions in power dissipation. By eliminating theneed for currents to operate the device, Ohmic dissipation—which in most cases is the predominant loss mechanism inmagnetic memory—is significantly reduced, resulting in avery low dynamic (i.e., switching) energy dissipation [1]–[4].While nonvolatile memories such as magnetic RAM (MRAM)have been known to reduce or eliminate standby power,the additional gain in dynamic power dissipation is also ofconsiderable importance, in particular for applications wherefrequent rewriting of the memory bits takes place duringoperation, e.g., in embedded cache or logic-in-memoryarchitectures [18], [19]. This has motivated much research onnovel mechanisms such as voltage control for switching ofmagnetization.

In this paper, we discuss the development statusand challenges of electric-field-controlled magnetoelectric

Manuscript received March 20, 2015; revised May 28, 2015; acceptedMay 28, 2015. Date of publication June 10, 2015; date of current versionOctober 22, 2015. Corresponding author: P. Khalili Amiri (e-mail: pedramk@ucla.edu).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TMAG.2015.2443124

RAM (MeRAM) based on voltage control of magneticanisotropy (VCMA) in magnetic tunnel junctions (MTJs).In addition to reduced power dissipation, the use of electricfields for writing in MeRAM offers an advantage in termsof enhanced bit density. In particular, magnetoelectric writingdoes not impose a current-drive-based size limit on the accessdevices (e.g., transistors) when integrated in a circuit, henceallowing for a much smaller overall cell area [5], [20]. At thesame time, MeRAM in principle retains all key advantagesof STT-MRAM, namely, high endurance, high speed, radiationhardness, and a possibility for nonvolatile operation.

The paper is organized as follows. Section II presents a briefoverview of the VCMA effect, followed by a discussion andcomparison of different switching regimes (i.e., thermal andprecessional). This section will also briefly discuss possiblecrossbar array configurations utilizing unipolar VCMA-basedwriting. Section III will then present experimental data onprototype MeRAM bits and 1 kbit test arrays. Write speedand energy will be discussed based on recent experimental dataon MTJ devices with a perpendicular magnetization. This isfollowed by a discussion of resistance distributions, endurance,and write voltage of MeRAM bits (down to 60 nm in size).Scaling requirements of magnetoelectric memory and theirimplications for the required VCMA effect in MTJ materialsystems will be discussed as well.

II. DEVICE CONCEPT AND MEMORY OPERATION

A. Voltage Control of Magnetic Anisotropy

In metallic ferromagnetic films such as those typicallyused in MTJ devices, electric fields are screened by theconductivity of the material and hence only penetrate a fewangstroms into the film surface. Hence, the concentration of

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3401507 IEEE TRANSACTIONS ON MAGNETICS, VOL. 51, NO. 11, NOVEMBER 2015

Fig. 1. Measured magnetoresistance curves of an 80 nm × 80 nmperpendicular MTJ under an out-of-plane magnetic field. Note that the devicehas out-of-plane free and fixed layers when no electric field is applied (V = 0),while the application of a negative (positive) voltage increases (decreases) thecoercivity of the free layer (bottom ferromagnet in this case) due to VCMA.

the electric field near the surface is in principle a limitationfor electric field control of magnetic properties. However,by utilizing ultrathin (∼<2 nm) ferromagnetic films, themagnetic properties may be sensitive to—or even dominatedby—interface effects, hence providing a mechanism forcoupling the applied electric field to the magnetic anisotropyof the material. Thus, manipulating metallic ferromagnetsvia voltage-controlled interfacial perpendicular magneticanisotropy (PMA) can be used to realize electric-fieldcontrolled nanomagnetic devices [7], [21]–[33].

The VCMA effect can be explained in terms of the electric-field-induced change of occupancy of atomic orbitals at theinterface, which, in conjunction with spin–orbit interaction,results in a change of anisotropy [34]–[36]. The VCMA effectcan also be qualitatively described based on the interfacialRashba effect [29].

Fig. 1 shows the measurements of resistance versusthe out-of-plane magnetic field in a perpendicular80 nm × 80 nm MTJ device [37]. The application of avoltage results in an electric field through the MgO oxideand, hence, in the accumulation of charges near the interfacebetween the MgO and the CoFeB free layer. Negative voltagesare observed to increase the coercivity of the free layer alongthe perpendicular axis for this particular material stack,i.e., the perpendicular magnetic anisotropy is increasedat −1 V, while it is decreased for the opposite voltage (+1 V).This reconfiguration of the magnetic anisotropy of the freelayer via the VCMA effect is critical to allow for switchingusing electric fields, as described next.

The effective magnetic anisotropy in a thin ferromagneticfilm can be written as

K1,eff(V ) = Ms Hk,eff(V )

2≈ Ki (V )

t− 2π M2

s (1)

where Ms is the saturation magnetization, Hk,eff is theeffective anisotropy field, Ki (V ) is the voltage-dependentinterfacial anisotropy energy, and t is the thickness of theferromagnetic layer. The external electric field applied to thedevice is Eext = V/d , where V is the applied voltage andd is the thickness of the MgO layer. In general, Ki (V )may have a nonlinear dependence on the applied voltage.

Fig. 2. Schematic of VCMA-induced switching mechanisms in an MTJ withperpendicular magnetization. At equilibrium (V = 0), the energy barrier Ebseparates the two stable states of the free layer magnetization (pointing upand down, indicated by the arrows). Due to VCMA, a voltage applied acrossthe device can reduce the energy barrier so that switching can be achievedvia thermal activation (top panel). If the voltage is increased further beyondthe critical voltage Vc (4), full 180° switching can be achieved by timing theresulting precessional motion of magnetization.

However, considering the linearized form of the dependenceobserved in most experiments to date, we have

Ki (V ) = Ki (V = 0) − ξV/d (2)

where ξ is the linear VCMA magnetoelectric coefficient usedto parameterize the PMA dependence on the applied electricfield. The VCMA coefficient (fJ/V · m) is a material stackand interface-dependent parameter quantifying the change ofinterfacial anisotropy energy (mJ/m2) per unit electricfield (V/nm).

Typical values of interface anisotropy and VCMA in thewidely used Ta|CoFeB|MgO-based MTJ material structureare Ki ∼ 1–2 mJ/m2 [6], [7], [25], [38], while the mag-nitude of the VCMA coefficient is typically in the rangeof 30–50 fJ/V · m [2], [24], [25], [38]. The choice ofcapping/seed metal layer has an important effect onPMA and VCMA. Hence, recent works have explored the useof different metal layers in conjunction with the CoFeB|MgOstructure in MTJ devices. As an example, the use of Hf and Moseed layers has resulted in a larger Ki compared with that ofthe Ta layer, which is an important requirement for scalingof MeRAM [39], [40] (see Section III-E), while very largeVCMA values have been observed in V|Fe-based films [41].However, further work is required to integrate these structuresinto high-tunneling magnetoresistance (TMR) MTJs andevaluate their potential at the level of memory arrays.

B. Precessional Versus Thermally Activated Switching

Recent results have demonstrated VCMA-based switchingin in-plane as well as perpendicularly magnetized MTJs inboth thermally activated and precessional switching regimes(see [1]–[4], [42], [43]). The switching process is shownin Fig. 2. The application of a voltage with the correctpolarity can reduce Ki , lowering the energy barrier betweenthe free layer states. Depending on the amplitude of theapplied voltage, switching can then take place by thermalactivation across the barrier or a precessional reorientation ifthe anisotropy is reduced sufficiently to eliminate the barrier.

KHALILI AMIRI et al.: ELECTRIC-FIELD-CONTROLLED MeRAM: PROGRESS, CHALLENGES, AND SCALING 3401507

Fig. 3. Thermally activated VCMA-induced switching: the measuredprobability of switching for the VMCA-induced switching of MTJ devices.Note that to achieve deterministic switching, the write process is assistedby STT in this experiment [3], compared with the experiment for nonde-terministic precessional switching (see Fig. 4), where no STT is required.Importantly, for both types of VCMA-induced switching (Figs. 3 and 4), thewriting is unipolar, i.e., it uses only one polarity of voltage. The device has anR–A product of ∼170 �-μm2, TMR ∼20%, and � ≈ 40, with the appliedpulses having a length of 100 ms.

Thermally activated switching, using a combination ofSTT and VCMA, provides deterministic switching in bothdirections, using voltage pulses of different amplitudes(see Fig. 3) [2], [3], [43]. Notably, in this approach,deterministic switching is achieved by: 1) incorporating anonzero stray field from the fixed layer, which determinesthe switching direction for the lower voltage pulse amplitude(i.e., where current-induced torques are small), and2) designing the device such that for a larger voltagepulse, current-induced spin torques overcome the effect ofthis stray field and realize the opposite switching direction.However, this approach has only been successfully realizedat slow speeds (μs – ms) and requires the realization ofboth significantly larger VCMA and STT efficiencies, beforebeing of practical interest for high-speed memory and logicapplications.

Precessional (i.e., resonant) switching, by contrast, takesplace at a much faster time scale, but requires timing ofthe voltage pulse width to achieve 180° reorientation. Exper-imental results on precessional (i.e., resonant) switching ofperpendicular MTJs based on VCMA demonstrate write timesof <1 ns with relatively low write voltages (see Fig. 4). Thistype of switching, however, is nondeterministic and presentsnew considerations in terms of circuit design. Notably, the stateof the MTJ needs to be read out before writing, to determinewhether a reversal of the free layer magnetization is needed towrite the required information [44]. Given the fast read timespossible in high-TMR MTJ devices (∼<2 ns) and the veryshort time required for precessional switching (∼0.1–1 ns),this can still provide competitive total programming timesof <3 ns [44].

C. Array Structure and Select Devices

Similar to STT-MRAM, MeRAM can be realized using a1-transistor/1-MTJ cell structure with CMOS transistors asthe access devices. In STT-MRAM, however, the relativelylarge currents required to switch STT-based MTJs requirelarge transistors to drive them [20], [45]. As a result, thedensity of STT-MRAM arrays is typically limited not bythe dimensions of their MTJs, but rather by the switchingcurrent of the magnetic bit itself. In addition, the use of

Fig. 4. Precessional VCMA-induced switching: the measured probabilityof precessional voltage-induced switching in a perpendicular MTJ, for bothparallel (P) to antiparallel (AP) and AP to P directions. Note the oscillatorydependence of the write probability on the voltage pulse duration, whichis a signature of the precessional write process. No current is required forswitching in this case. The device has an R–A product of ∼175 � · μm2

and a TMR of ∼40%, providing a minimum write energy of ∼30–40 fJ/bit.

Fig. 5. (a) Illustration of two adjacent diode-MTJ magnetoelectric memorycells in a crossbar MeRAM array. The use of diodes as access devices ispossible due to the unipolar writing characteristic of VCMA-based devices(see Figs. 3 and 4). (b) Measured time-domain traces showing the operationof the diode-MTJ structure. To write or read information, the bit line ofthe selected bit is set to the appropriate write or read voltages, respectively.Bit selection is accomplished by grounding the desired source line (SL) andpulling the undesired SL to a high enough voltage to turn OFF its selectdevice [20], [46].

three-terminal CMOS transistors also imposes a layout-basedlimit of approximately 6–8F2 on the maximum cell density.

The unipolar writing process of MeRAM (see Figs. 3 and 4),however, allows it to be used also in a 1-diode/1-MTJ crossbarcell structure [20], [46]. In principle, crossbars are the densestmemory arrays possible (with a 4F2/N cell size, where N isthe number of stacked MTJ layers in the backend of theline process), and hence, the realization of a diode-controlledmemory device for crossbar arrays can greatly increase thedensity and scalability of the overall memory.

Fig. 5 shows a schematic of such a crossbar cell struc-ture, along with experimental data from a prototype array,

3401507 IEEE TRANSACTIONS ON MAGNETICS, VOL. 51, NO. 11, NOVEMBER 2015

Fig. 6. Distributions of low- and high-resistance states on the measured testarrays, indicating a separation of 6σ for 60 nm devices (left) and 12σ for120 nm devices (right), respectively.

using devices with VCMA-induced switching in the thermallyactivated regime [20], [47]. The combined action ofSTT and VCMA in this example allows for a unipolar set/resetwrite scheme, where voltage pulses of the same polaritybut different amplitudes can be used to switch the devicebetween the parallel (P) and antiparallel (AP) states. Voltagepulses of the opposite polarity will not switch the device, butrather reinforce the initial state [20], [47]. It should be notedthat the same cell structure can be applied to precessional-switched MeRAM bits as well, which similarly use only onepolarity (and amplitude) of write voltage pulse. Fig. 5(b) showsthe experimentally measured waveforms demonstrating thefunctionality of the crossbar structure. MTJ1 and MTJ2 are firstinitialized into the P state. MTJ1 is then switched fromP to AP, and back to P, without disturbing the value of MTJ2.This is followed by a similar process for MTJ2, with interme-diate reading steps demonstrating that the correct informationhas been written into the selected bit in each case.

III. DEVICE AND TEST ARRAY MEASUREMENT RESULTS

This section presents measurement results on MeRAMdevices and 1 kbit test chips, discussing the key performancemetrics. A discussion of the material-level requirements, futureprospects, and scaling behavior of MeRAM is also presented.

A. 1 kbit Test Arrays

Voltage-controlled perpendicular MTJ arrays werefabricated on silicon wafers for statistical measurements.The samples consisted of 1 kbit test arrays without selectdevices. Arrays were designed to provide electrical accessto individual MTJ bits for measurements using a probe-cardsystem. We performed measurements on devices withbit diameters ranging from 60 to 400 nm. For the smallestbit size measured (60 nm), we obtained the MTJ resistancedistributions shown in Fig. 6 (left), which show TMR ≈ 40%with low- and high- state resistance standard deviations (σ) of6% and 5%, respectively, corresponding to a 6σ separation.The read margin further increases with bit size, with resistancedistributions at 100 and 120 nm bit size showing separationsof 8σ (not shown) and 12σ [see Fig. 6 (right)], respectively.The dependence on bit size may point to sidewall damageduring etching of the MTJ pillars, as well as lithographicvariations in the device size, resulting in wider distributions at

Fig. 7. Endurance measurements on an MTJ bit using 1 ns voltage pulseswith an amplitude of 1.5 V. The device shows no significant degradation forthe range of applied pulses, indicating an endurance >1011 cycles.

smaller nodes. The read margin is expected to further increasewith improved MTJ devices having higher TMR >100%.

B. Subnanosecond Write Performance

Fig. 4 shows the measured VCMA-driven precessionalwrite probability for an 80 nm × 80 nm MeRAM bit withperpendicular magnetization. The material stack consists ofa bottom electrode |FeCoB (1.1)|MgO (1.1)|FeCoB (1.4)|Ta (0.3)|[Co (0.3)|Pt (1.0)] × 10| top electrode (thickness innanometers) multilayer structure. The device has a parallel-state resistance Rp ≈ 37 k�, � ≈ 20, and TMR ≈40%,corresponding to a resistance–area (R–A) productof ∼175 �-μm2. The observed oscillatory behavior ofthe switching probability is a signature of precessionalswitching. The results show ∼100% switching probability ina pulse width window of ∼700 ± 250 ps on the first peakof the switching probability, using a voltage pulse of 1.9 V,corresponding to a minimum write energy of ∼30–40 fJ/bit.

C. Endurance

Endurance is a key requirement for scenarios where frequentmemory access and rewrites are required, including workingmemory (e.g., dynamic RAM) and embedded (e.g., staticRAM) types of applications. Magnetic memories includingMeRAM are expected to have very high endurance due tothe operation mechanism of their storage device, which doesnot require physical displacement of atoms or ions, hencepreventing physical fatigue. The results of a preliminaryendurance measurement with 1 ns voltage pulses on a samplememory bit are shown in Fig. 7, indicating a lower boundof 1011 write cycles for the endurance. It is expected thatMeRAM can achieve very high endurance levels (>1015)similar to other types of MRAM, provided a material systemwith sufficiently large VCMA is available to ensure lowenough write voltages. It should also be noted that a typicallythicker MgO used in magnetoelectric devices (as opposedto low R–A values required for STT writing) may have anadditional beneficial effect to increase endurance.

D. Voltage Scaling and Thermal Stability

To analyze the scaling behavior of magnetoelectric memory,we consider as a figure of merit the ratio of switchingvoltage over the thermal stability (Vc/�) based on the VCMAeffect [37], [48].

KHALILI AMIRI et al.: ELECTRIC-FIELD-CONTROLLED MeRAM: PROGRESS, CHALLENGES, AND SCALING 3401507

Fig. 8. Measured dependence of Vc/� on device dimensions (60 and 80 nm)of perpendicular MTJs switched by VCMA, where � = Eb/kT is the thermalstability parameter.

From (1), the voltage-dependent thermal stability factor fora perpendicular MTJ can be calculated as

� = Eb(V )

kT≈

(Ki − ξV/d − 2π M2

s t)

A

kT

= �(V = 0) − ξ A

dkTV (3)

where the demagnetization factor in the perpendicular(out-of-plane) direction is approximated to be Nz ∼ 1, A isthe bit area, k is the Boltzmann constant, T is temperature,and Eb is the voltage-dependent energy barrier between thestable free-layer states. The standby thermal stability ratio ofthe memory bit follows from V = 0. From (3), it is seen thatas the device is scaled down (i.e., A is decreased), increasingthe VCMA coefficient ξ is required to keep the same rate ofcontrol of the energy barrier by the applied voltage.

In the thermally activated switching regime, Eb is reducedby voltage such that a switching event is realized due tothermal fluctuations of the free-layer magnetization. Thecritical switching voltage Vc in this scenario can be defined asthe voltage required to reduce the energy barrier between theperpendicular states to zero, i.e., �(Vc) = 0. Hence

Vc = dkT

ξ A�(V = 0). (4)

For any write voltages Vw > Vc, the magnetic easy-axisis reoriented to the in-plane condition. In this scenario, full180° switching can be obtained by timing the pulse voltageto take advantage of the magnetization precession, as shownin Fig. 2.

The VCMA-induced switching performance was character-ized using pulsed switching probability testing for an ensembleof devices in the size range of 60–80 nm, allowing for writevoltage characterization. The thermal stability factor at V = 0was estimated from magnetic bias field-dependent dwell-timemeasurements. The results are given in Fig. 8, which showsthe measured dependence of Vc/� on the dimensions ofperpendicular MTJs switched by VCMA.

E. Device and Material Requirements

Equation (4) suggests that for scaling with a constantelectric field (Vc/d), scaling of the magnetic bit size for

Fig. 9. (a) Scaling requirements for the interfacial magnetic anisotropy Kito meet different nonvolatile retention limits (� = 40, 60, and 80) [37].Note that this projection is valid for any magnetic memory utilizing interfacialperpendicular anisotropy to realize out-of-plane memory bits, regardlessof the writing mechanism. As device dimensions are scaled, largerKi values are required. The arrow indicates the typical values reported forthe CoFeB|MgO material system, which are suitable for the 32 nm node.(b) Scaling of the VCMA coefficient ξ across technology nodes. Thecurrent CoFeB|MgO-based systems provide typical values <100 fJ/V · m(right arrow), while newer materials have been reported to provide valuespotentially suitable for 14 nm and below. Note that the requirements on bothKi and ξ may be significantly relaxed for applications where nonvolatility isnot required, i.e., where � < 40.

perpendicular VCMA-switched MTJ devices is markedby a tradeoff between the device area A and the VCMAcoefficient ξ . At the same time, similar to other typesof MRAM, an increase in the perpendicular anisotropy(i.e., Ki ) is required with device scaling, if a constantthermal stability factor (i.e., retention time) is required.These two requirements—i.e., the increase in Ki and ξ—andmaintenance of a high TMR to ensure a sufficient readmargin, are the primary material considerations for thedevelopment of MeRAM devices.

Fig. 9(a) provides a scaling analysis in the single-domainapproximation, showing the required interfacial perpendicularanisotropy energy Ki and the VCMA coefficient ξ for bitdimensions ranging from 90 to 5 nm [37]. Three target valuesof the thermal stability factor are considered (� = 40, 60,and 80). In a practical setting, the required value for � dependson the target application, which determines the retentiontime needed for memory operation. As an example, for asingle bit of information at room temperature, the values of� = 30 and 40 correspond to retention times of ∼3 h and10 years, respectively. Hence, while low values of � < 30may be sufficient for applications in embedded memory withrelaxed retention requirements, higher values of 60–80 maybe needed for long-term nonvolatility in larger (∼Mbit–Gbit)arrays. The scaling analysis of Ki in Fig. 9(a) is based on (3).

3401507 IEEE TRANSACTIONS ON MAGNETICS, VOL. 51, NO. 11, NOVEMBER 2015

For better accuracy, the demagnetization factors were included(calculated using the elliptical/circular cylinder approxi-mation described in [49]). A saturation magnetization ofMs = 1000 emu/cm3 was assumed. It can be seen that fortechnology nodes down to 45 nm with � = 40, the typicalvalues of Ki ∼ 1 erg/cm2 (=1 mJ/m2) in the Ta|CoFeB|MgOsystem may be sufficient to scale the device size, providedthe CoFeB layer thickness is reduced accordingly to increaseoverall PMA [see the inset in Fig. 9(a)]. To prevent reducingthe free-layer thickness below ∼1 nm (which may affectTMR), an increase in Ki is needed for technology nodesbelow 32 nm. Note that this Ki requirement is common toall types of MRAM using interfacial anisotropy, regardless ofthe writing mechanisms used.

The corresponding scaling analysis for the VCMAcoefficient ξ is shown in Fig. 9(b). The analysis is basedon (4), assuming scaling at a constant electric field of 1 V/nm(i.e., corresponding to write voltages ∼1 V at each technol-ogy node). It can be seen that for nonvolatile operation atscaled technology nodes below 45 nm, higher values of ξ(compared with the experimental and theoretical valuesfor Ta|CoFeB|MgO, which are typically <100 fJ/V · m)are required. Several experiments have already demonstratedpossible routes to realizing such large values of ξ(see [41], [50]), with numbers up to ∼7500 fJ/V · m demon-strated when a strain-mediated mechanism is used to controlthe interface anisotropy Ki [51]. Further work is required tointegrate these materials into devices with high TMR andassess their performance at the level of arrays. In addition,uniformity of the precessional switching across memory arraysneeds to be studied for implementation into products.

IV. CONCLUSION

The switching of magnetoelectric MTJs using pulsedvoltages provides a pathway to fast, ultralow-power, and high-density memory arrays. The unipolar write scheme used inMeRAM devices facilitates the realization of crossbar memoryarrays, potentially resulting in a very small cell area. We pre-sented recent results from MTJ devices as well as 1 kbit testarrays, showing subnanosecond switching times with energies<40 fJ/bit. Existing switching measurement data from deviceswith different dimensions show good agreement with theexpected scaling trend. The scaling roadmap of MeRAM wasdiscussed along with the projected material-level requirementson VCMA and anisotropy at different technology nodes.

ACKNOWLEDGMENT

This work was supported in part by the NSF NanosystemsEngineering Research Center for Translational Applicationsof Nanoscale Multiferroic Systems (TANMS), in part by theDARPA Program on Nonvolatile Logic, and in part by Instonthrough an NSF Phase II Small Business Innovation ResearchAward. P.K.A. and J.G.A. contributed equally to this work.

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