ELEC 6740 Electronics Manufacturing

Chapter 6 Surface Mount Land Pattern Design

R. Wayne JohnsonAlumni Professor

334-844-1880johnson@eng.auburn.edu

Chapter 6• Introduction• Passive Components• Land Patterns for Transistors• Land Patterns for PLCCs• Land Patterns for LCCCs• Land Patterns for SOICs• Land Patterns for SOJs• Land Patterns for DIPs (Butt Mount)• Land Patterns for Fine Pitch Gull Wing Packages• Land Patterns for BGAs• Land Patterns for Solder Paste & Solder Mask Screens

Introduction

• Design for Manufacture (DFM)– Chapter 7

• IPC-SM-782 Land Pattern Guide• Each company defines there own design

rules often based on IPC standards and experience

Passive (rectangular)

• Land patterns for resistors & capacitors– Pad width (A) = Wmax – K– Pad length (B)

• For resistors B = Hmax + Tmax – K• For Capacitors B = Hmax + Tmin – K

– Gap between lands (G) = Lmax - 2Tmax – K

– K = constant (typically 1 mil)

Passive (rectangular)

Passive (rectangular)

Tantalum Capacitors

Tantalum Capacitors

MELF

D = B – (2B+A-Lmaxmax))

2

Transistors (SOT 23)

Transistors (SOT 89)

Transistors (SOT 143)

SOD 123

SOT 223

TO 252 DPAK

PLCC

PLCC

SOIC

SOIC

SOP

SOJ

DIP (Butt Mount)

Fine Pitch Gull Wing

QFP

BGA

BGA