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  • 8/4/2019 EEWeb Pulse - Issue 8, 2011

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    PULSEEEWeb.c

    Issu

    August 23, 2

    Jeritt KentAnalog Devices

    Electrical Engineering Commun

    EEWeb

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    TABLE OF C ONTENTS

    Jeritt Kent 4ANALOG DEVICESInterview with Jeritt Kent - Senior Staff Applications Engineer, Analog Devices

    8-Bit MCU Relevancy in 2011BY STEVE DARROUGH WITH ZILOG

    Pervasive Power and Point of Load 11DeliveryBY STEVE GRADY WITH CYMBET

    RTZ - Return to Zero Comic 18

    As technology continually improves, the relevancy of 8-bit microcontrollers is drawn intoquestion. Darrough discusses 8-bit microcontrollers and their future in various technologyarenas.

    9

    Based on fundamental power distribution and energy storage techniques, Grady introducesseveral new concepts for micro-power electronic system design.

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    INTERVIEW

    Jeritt KentAnalog DevicesHow did you get intoelectronics/engineering andwhen did you start?

    Well, it is an interesting story. Istarted my collegiate studies in thelate 1980s at Gonzaga Universityin Spokane, Washington on

    scholarship. As a junior in highschool at Bishop Kelly in Boise,Idaho, I participated in the JuniorEngineering Technical Society(JETS) program, and that certainlysparked my interest in becomingan engineer. While at Gonzaga, Ioriginally considered mechanicalor chemical engineering. Iparticipated in core classes andan option class, Introduction toCircuits. There were actually twoclass options: one would satisfythe requirements for a mechanicalengineering degree and the other

    was an advanced version thatsatisfied the requirements for anelectrical engineering degree.I decided to take the advancedclass thinking, What if? Asit turns out, I really enjoyed theclass!

    During my sophomore year, I hada conversation with my advisor,Dr. Dennis Kelsh, about chemicalengineering. As the chemicalengineering program was not inplace at Gonzaga, we discussedthe idea of transferring to theUniversity of Idaho. I visited theMoscow campus that summerand quickly realized that the

    Jeritt Kent - Senior Staff Applications Engineer, Analog Devices

    engineering program at Idahowas very strong.

    Many of my good friends plannedto participate in GonzagasFlorence, Italy program for their

    junior year. This helped with theemotional side of my decision to

    transfer to Idaho.

    After transferring to Idaho, I hadto learn a lot of math and related

    material in order to succeed.The timing was very good, andit was a tremendous gift to havethe opportunity to study underprofessors Earl Gray and Calvin

    Finntwo of Idahos premierteachers in analog design. Idecided to stay in Moscow, and

    went on to receive my BachelorsDegree with a specialty in analogCMOS circuit design. I interviewedand accepted a position with

    American Microsystems (AMI) inPocatello, Idaho as an AutomotiveProject Design Engineer.

    Can you tell us more aboutworking at AMI?

    It really was a tremendousopportunity, as jobs were very

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    INTERVIEW

    scarce when I graduated. In January 1991, Jerry Downeyhired me, and I was surroundedby some of the best ApplicationSpecific Integrated Circuit (ASIC)designers in the world. This designteam gave me my first opportunityto work in mixed signal design.

    A project engineer had primaryresponsibility for every aspectof a development: design, bonddiagrams, specifications, testprograms, and everything inbetween. While involved withmany challenging and interestingprojects at AMI, I was initiallyassociated with the device that, atthat time, was arguably the highest-

    volume Application SpecificIntegrated Circuit (ASIC) in the

    world; this was before cell phoneIntegrated Circuits (IC). This wascalled the PRNDL, which standsfor Park Reverse Neutral DriveLow. The PRNDL is responsiblefor indicating the gear that a driverselects for the vehicle (usually via

    an LED). That IC went into almostevery General Motors (GM) carmade in the 1990s. Many mightthink that it is a simple device, butone thing about building a chipin the automotive industry is thatit has to be at least 99 percentfault graded. This means thatany internal fault needs to causesomething at the pin level of thedevice to change. Since the onlymeasurable interface on an IC isat its pins, the silicon and the testprograms must work together tofully exercise the device to passany potential flaws out to wherethey can be seen so that a badpart can be rejected. I am still veryproud of this development; the testprogram and silicon modificationsthat I helped define with the team

    allowed this part to be testedmuch more efficiently.

    Automotive devices need tomeet tough environmental

    specifications like temperatureand electrostatic discharge (ESD).

    While we were designing chips forGM, we spent a lot of time doinganalysis on crystal oscillators andceramic resonators. One of thebig challenges is getting a circuitlike that to work over a -55C to125C environment. This is nosmall task, but we found ways todo just that. A lot of time was alsospent developing some of the firsthigh-voltage ESD tolerant circuitsusing punchthru devices andparasitic bipolar transistors. Jerry,Bob Klosterboer, and I spent a lotof time trying different structureson different test chips. One of ourchips passed 4KV on every pin,and this was back at a time whenthis was very hard to do.

    My most memorable design was

    the first octal CMOS integratedsmart carburetor driver for naturalgas powered vehicles. Motorolahad built individual bipolar drivers,but AMIs Canadian customer

    wanted a single chip. This wasa tremendous challenge. Thesimulation models that needed tobe developed were cutting-edge.Saber Cadat was in its genesis.

    We used every Mentor tool wehad: HSPICE, BSIM modeling,

    Cadence, and Synopsis.

    I was most proud when the sevenstate-variable, dual-feedbackmixed signal circuit that I designed

    via Karnaugh maps successfullydrove the TMOS IV power FETsin 60 nanoseconds while criticallydamped! The model of a low

    side solenoid driver with flybackcontrol is still, in my opinion,one of the most encompassingelectrical engineering challengesin the analog domain.

    Where did you go after AMI?

    In 1995, after four years inPocatello, I was offered a positionto replace one of my mentors, ArtTan, at the AMI representativeoffice in Fort Wayne, Indiana.Having been a part of the teamsthat built a lot of the chips that

    were being integrated into vehicle systems at Delco and

    GM, I moved to Fort Waynethehalfway point between Kokomo,Indiana and Flint, Michiganthetwo main design locations forDelco Electronics. My stay wasa little over a year as the Field

    Applications Engineer for theNorth Central Territory. During thesummer of 1996, while celebrating

    with my grandparents for their60th wedding anniversary on theOregon coast, I noticed an ad in

    the Oregonian for semiconductorsales for the Pacific Northwest.I interviewed and accepteda position with AllegroMicrosystems and moved back toBoise in late 1996 having variousresponsibilities in applications,marketing, distribution, andsalesa little bit of everything.

    When did you start withAnalog Devices?

    On May 3, 1999, I went to workfor Analog Devices. I remained inBoise for about ten months beforemoving to Seattle, Washington

    where I worked out of our Bellevueoffice for seven years.

    I was ADIs first Linear FieldApplications Engineer specifically

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    INTERVIEW

    assigned to the Northwest,transitioning later into a role as acommunications engineer for the

    western U.S. My focus was AnalogDevices GSM and EDGE radiosand baseband devices beforethat part of the business was sold.

    After that business transaction, Ibecame an RF specialist for the

    Americas, being involved withcommunication system design atmany levels.

    As that happened, I had anopportunity to get involved in aspecific area of RF as a result of

    work being done at some keycustomers who were addingcommunications capability tothe electric, gas, and watermetering infrastructure; the metersometimes being referred to asa smart meter. One customerrequested that I get much moreinvolved with the key radiostandards for this applicationspace, namely 802.15.4g. Mycurrent role is RF and Systems

    Specialist for the Energy Segment within Analog Devices Industrialand Instrumentation division.

    What percentage of thenation has converted over toSmart Meters?

    It is evolving. There are threephases that companies are

    working on right now. There isAutomatic Meter Reading (AMR), Automatic Meter Infrastructure(AMI), and then the Smart Grid.

    The AMI is more of a tacticalapplication of adding two-

    way communication and somefeatures to the structure of AMR,

    which is often a system of one- way communication to replace ameter reader. A main objective of

    AMR was to keep the technicianfrom having to go out and read themeters on your house.

    A primary objective of AMI is

    bidirectional communicationallowing the utility to query andcontrol the meter. The Smart Gridis really looking forward to thefuture to create a network thatprovides secure and robust meansof measurement and control. Theapplication possibilities for theSmart Grid are extensive, rangingbeyond the simple task of

    In order to behighly successful in

    analog you reallyhave to have a

    rich history in cell

    development andmaintain high team

    morale becausea lot of what you

    are doing is basedoff of knowledge.

    gathering metrology informationto saving lives. Japanese metermanufacturers, for example,have considered adding seismicmeasurement to a gas meter soin the case of a seismic event, the

    valve can be closed and possiblyprevent a natural gas explosion.

    Another concept where the SmartGrid is likely to contribute is whatsome have called the Internet ofThings (IOT): devices that rangefrom vending machines to coffeepots in your home, connectedinto this dedicated grid-basednetwork.

    Analog Devices is considered a world leader in metrologythemeter side of thingsand RF.Some of my recent work is as acontributing member of 802.15.4gthat meets every other monthall over the world, defining thephysical layer communicationsspecifications for these SmartGrid applications. We are workingdiligently on the 4g standardbecause many believe that willrepresent a major part of theoverall market.

    Where do you want to gofrom here?

    There will be career opportunitiesto move up the ladder. Right

    now though, the Smart Grid is, Ibelieve, one of the most excitingareas in electronics and my teamis right in the middle of it withglobal industry connections.I have been able to travel tomany places because of theseopportunities, visiting customers,learning from them, and engagingin successful business. The SmartGrid is a global objective; it willchange the world. It is reallyexciting to imagine what it willdo for countries like India, Brazil,China, and Japan, and how vital itcould be for Europe. There are a

    whole lot of creative and valuablethings you can do with the SmartGrid once the key building blocksare in place.

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    INTERVIEW

    Do you see the analog ICindustry changing?

    In order to be highly successfulin analog you really have to have

    a rich history in cell developmentand maintain high team moralebecause a lot of what you aredoing is based off of knowledge.

    Analog Devices has been able tokeep a great majority of the talentthat it has harvested. It amazesme every month when I readthe company website to see thenumber of personnel celebratinga 25th, 30th, or 35th anniversary. Alot of the reason Analog Devices

    is so successful is because ofthe people in its history that havedesigned the key intellectualproperty (IP) blocks that areshared with the new generation ofengineers. Many of these designsare improved and managed to anew process or structure to furtherenhance and enable analogtechnology.

    Microelectromechanical systems

    (MEMS) are another key technol-ogy area, possibly best catego-rized as analog. We are in the veryearly days of understanding all ofthe possibilities that this technol-ogy will bring to the world.

    As digital gets better, faster,stronger, and more powerful,the requirement for the analogbecomes more challenging. Itgives you a chance to dig downand look at topics that werepreviously put on the back burner.Engineers really get a chance tooperate outside the box lookingat solutions. One of the certaintiesof the semiconductor industryis cyclicity. There have beengroundbreaking discoveries andideas in the past that have set

    the next cycle. Gordon Moore,for example, threw down thegauntlet with Moores Lawawhile back that still appearsto hold. Breakthroughs willcontinue, I believe, mainly due tohow effectively new-generationengineers can be educatedthrough the previous efforts(successes and failures) of theirmentors.

    What are some of the papersyou have written?

    Following is a list of articles I have written or contributed to. They

    can be accessed at the URLs thataccompany each title.

    The Smart Grid Communications

    Evolution: Closing the Loop for

    the Intelligent Electric Grid

    www.mwjourna l .com/ar t ic le .asp?HH_ID=AR_10003

    Small Circuit Forms Programma-

    ble 4- to 20-mA Transmitter

    www.edn.com/article/480893-

    S m a l l _ c i r c u i t _ f o r m s _programmable_4_to_20_mA_transmitter.php

    Encoders Spare Channel Embeds

    Whole-House Stereo Audio in Sat-

    ellite Set-Top-Box Designs Stably

    and Cost-Effectively

    w w w . a n a l o g . c o m / l i b r a r y / analogDialogue/archives/39-07/btsc.html

    Interfacing the ADSP-BF535

    Blackfin Processor to High-

    Speed Converters (like those on

    the AD9860/2) Over the External

    Memory Bus

    www.analog.com/static/imported-files/application_ notes/3EE162.pdf

    Stability and Transient Analysis of

    the Miller-Compensated Linear

    Regulators on the ADP3178

    w w w . a n a l o g . c o m / s t a t i c / i m p o r t e d - f i l e s / a p p l i c a t i o n _notes/142101805AN593.pdf

    Interfacing the ADSP-BF533/ADSP-

    BF561 Blackfin Processors to

    High Speed Parallel ADCs

    w w w . a n a l o g . c o m / s t a t i c / i m p o r t e d - f i l e s / a p p l i c a t i o n _notes/527407802AN813_0.pdf.

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    2011MCU Relevancy in

    8-BIT

    Steve DarroughDirector of Marketing, Worldwide

    Industry speculation continually exists across manypast and present technologies. When looking at theevolution of microcontrollers, it is easy to wonder if andhow long they will be relevant in such a fast-paced worldthats speeding down the technology highway.

    Certainly in some technology arenas, applications areramping quickly into more and more sophisticated levelsin which ARM and Atom are leading as powerful solutionsand enjoying big buzz. Many in the industry would agreethat as some products evolve into more richly-featuredsolutions, they are indeed the right solutions. But wheredoes that leave the 8-bit micros that we all grew up on?

    Are they a thing of the past? Are they now just too archaic

    to have any real technical worth? Seemingly, there areplenty who believe 8-bits are now good for only the mostbasic functions, and that the future will have little use forthem.

    Others may see this a bit differently that although todaysfast pace has created a huge demand for better andmore powerful microcontrollers, theres also the largerarena that comprises many fast-growing technologies

    technologies which compel the growing demand formany more 8-bits. Lets just take one example in the

    energy management segmentalthough its certainlynot a new arena or topicand thats the new emergingproducts which have recently gained far more tractionin the marketplace. The change has resulted in broaderawareness, justification for adoption, and far fasterdemand for more energy solutions than ever before. Forthe average person opening his or her electricity bill,the very thought of saving $30$100 a month on homepower consumption is a real wake-up call. When lookingat it in terms of the smart home, intelligent appliances, orexpansion of the smart grid, one can quickly see wherethere are tons of new product opportunities in whicha certain level of smarts is needed to accomplish theenergy and money-saving functions we demand.

    One might propose that as all of these solutionsaccelerate and expand across the globe, there will beseveral complex levels within each model. For instance,lighting control is quickly becoming one of the fastestareas in which people and businesses see instant returnon their investments. Parking structures, factories,

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    PERVASIVE

    POWER

    and Point oLoad Delivery

    Steve GradyVP Marketing

    Pervasive Power Overview

    This article introduces several new concepts for micro-power electronic system design. These concepts arebased on the fundamental power distribution and energystorage techniques deployed in advanced power gridarchitectures. With the introduction of small solid stateenergy storage ICs, new Pervasive Power solutions cannow be created by placing micro energy storage devicesdirectly at the point of load (POL) where the energy isused. Point of load architectures have been deployed in

    various power architectures down to the circuit boardlevel. Recently introduced breakthroughs in solid stateenergy device technology enable circuit designers toplace energy storage directly inside a chip for true point

    of load powering.

    In order to provide a foundation for understandingPervasive Power and the advantages of Point of Loadenergy delivery, the following areas are discussed:

    Defining Pervasive Power

    The interconnected power grid hierarchy

    Power distribution and energy storage techniques inthe various grids

    Micropower and nanopower trends with enablingtechnologies

    Solid state energy storage devices and Embedded

    Energy New point of load and Pervasive Power applications

    What is Pervasive Power?

    Pervasive Power is a recently introduced powerdistribution architecture that utilizes energy storagedevices at the actual point of energy usage (point of load).This is accomplished by placing micro energy storagedevices inside a complex device requiring power.Examples include microcontrollers, real-time clocks,SRAM memory, sensors, and multi-chip modules. The

    introduction of new solid state energy storage devicesutilizing a silicon substrate is the enabling technologyfor this Power on Chip configuration. Co-packagedmodules using a solid state energy storage device withother ICs are now commercially available.

    A Pervasive Power architecture is created when Poweron Chip enabled devices are placed together on anelectronic assembly. This new distributed energy storageconfiguration provides many advantages.

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    TECHNICAL ARTICLE

    Advantages of Pervasive Power

    A Pervasive Power architecture is realized when mostof the major functional semiconductor chips on a circuitboard have Embedded Energy capabilities. There are

    many advantages that are realized with a PervasivePower architecture:

    With Power on Chip for all major chips, overallsystem power is reduced.

    Power saving techniques for trickle chargingcircuit boards can be used.

    Damaging in-rush currents are reduced with Poweron Chip.

    Minimizes induction in the Power train.

    Reduces current draw variability.

    Reduces heat.

    Peak energy shaving and energy shifting techniquescan be utilized.

    Lower power budget is realized through efficiencies.

    Fewer voltage conversion interfaces.

    Dirty power into chips is corrected, with purepower delivered.

    Reduces bypass capacitors surrounding ICs.

    Lowers I/O switching noise

    Scalableenergy storage on the System increaseswith each added device

    Pervasive Power and Power

    Grid Techniques

    In order to have a better feel for the benefits of PervasivePower, it is instructive to look at Power Grid techniquesand how Power Grids are interconnected. It turns out thatalmost every technique for power distribution, voltageconversion, energy storage, noise reduction, and energyloss avoidance can be utilized in each grid topology.

    Power Grid Hierarchy and Power

    Distribution Techniques

    When people think of power grids, they often think of

    the main Backbone Grid providing power from a PowerUtility to a business or home. Recently, there has alsobeen a great deal of news coverage on the Micro-Gridin either green buildings or home-based solar energydeployments. But if you look at power distribution fromthe point of energy creation to the actual point of load,there are actually five interconnected grids as shown inthe following diagram.

    Equipment Grid Board Grid Chip Grid

    Backbone Grid Facility GridTransmissionDistributionGeneration

    Transmission Lines765, 500, 345, 230, and 138kV

    Transmission Customers138kV or 230kV

    Generator StepUp Transformer

    Generating Station

    SubstationStep-Down

    Transformer

    SubtransmissionCustomer

    26kV and 69kV

    Solar Modules

    Mounting Tracks

    Battery Bank

    AC ServicePanel

    DC ServicePanel

    (optional)

    DC LoadController

    (optional)

    ChargeController

    BackupGenerator

    (optional) SuppliesPower toAC Loads

    SuppliesPower toDC Loads

    Inverter & DC/ACDisconnectsPrimary Customer

    13kV and 4kV

    Secondary Customer120V and 240V

    Figure 1

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    TECHNICAL ARTICLE

    The Five Interconnected Grids

    1. Backbone Grid: Power is generated at a power plantand distributed to facilities (businesses or homes)using high voltage AC power transmission linesthat are stepped down to AC Power delivery at thefacility. The Backbone Grid utilizes AC current andtypically does not have large power storage elementsdue to the losses associated with AC to DC to ACpower conversions. However, many new techniquesfor Backbone Grid power storage are now beingexplored.

    2. Facility Grid: Once AC power enters a facility(typically a business or residence), the power isdistributed within the facility. The facility itself mayhave the ability to provide standalone power in theevent the Backbone Grid power feed fails using localgenerators. The Facility Grid might be equipped withlocal power generators that could supply power backinto the Backbone Grid; recent examples are homesolar cells that create more energy than is used inthe facility. There may be local energy storage in theFacility Grid, and new energy storage technologiesand devices are being introduced.

    3. Equipment Grid: This grid is most often seenin commercial facilities for data centers ormanufacturing machinery. In most cases, thisdemarcation occurs at the point where input powerfrom the Facility Grid is converted from AC to DC torun electronics. Often times, the power distribution in

    the Equipment Grid is a DC voltage (380V, 48V, 12V).Using DC power also enables more cost effectiveenergy storage solutions (e.g., UninterruptiblePower Supplies) to be used to back the Rack Grid inthe event of Facility Grid power failure.

    4. Board Grid: This is the power grid used on a circuitboard or electronic assembly. The electronicassembly might be autonomous like a portablehandheld device that was powered from an AC/DCconverter on the Facility Grid. Board Grids almostalways use DC power distribution (12V, 5V) andstep down the DC voltage from the Board Grid input

    source to the electronic devices on the board.

    5. Chip Grid: This is the power grid that is insidea semiconductor-based device. Initially, powerdistribution in semiconductor devices was a fairlysimple architecture. But with the advent of highlyintegrated large-scale devices and multi-chip moduleimplementations, the Chip Grid power architectureshave become very complex. Many of the powerdistribution and energy storage techniques used inthe other grids now are being used in the Chip Grid.

    Demarcations between each power grid are defined

    by the following:

    1. A physical hand-off from a one entity to another (e.g.,power company to a consumer or a factory power

    center to a process machine).2. A standardized physical power connection interface

    (e.g., wall outlet to electrical device or an electronicsrack backplane to a circuit card).

    3. A current conversion from AC to DC.

    4. A DC-DC voltage step down.

    Reducing Grid Energy Losses

    There is currently a great deal of focus on the SmartGrid where many new solutions are being brought

    to bear to improve the performance of the BackboneGrid. The following chart of power uses by commercialenterprises is sourced from the DOEs EnergyInformation Administration. Note how important it isto lower the Electrical Losses (wasted energy) on theBackbone Grid. Of course, lowering the amount ofElectricity used in commercial enterprises will lower thecorresponding amount of energy.

    In order to reduce Backbone Grid losses, new techniquessuch as active status monitoring, energy storage,more efficient energy conversion electronics, dynamic

    demand algorithms, and point of load energy deliveryare being deployed.

    QuadrillionBTU

    Commercial - By Major Source

    2.5 BTU islost for every1 BTUdelivered

    12

    10

    8

    6

    4

    2

    019601950 1970 1980 1990 2000

    Electrical LossesCoal Natural GasPetroleum Electricity

    Figure 2

    Cross-grid Similarities and Point

    of Load Power Management

    Just like the Backbone Grid, the need to effectivelymanage power and reduce energy losses are just as

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    TECHNICAL ARTICLE

    important in the other four interconnected grids. Manyof the same techniques and technologies implementedin the Backbone grid apply even down to the Chip Grid.The following figure shows the relationship between theEquipment, Board, and Chip grids. System level designsneed to view these grids holistically in order to managethe energy used by the system effectively. One of the keymethods of effectively managing power is to use Point ofLoad technologies. Point of Load management involvesthe following:

    Measuring the power being used at the actual pointof use

    Characterizing all the points in the power deliverychain

    Actively managing the power to the point of usethrough a closed loop control system

    Implementing dynamic power demand algorithmsto optimize the efficiency of the power used

    Providing energy storage at the point of load toenable optimal energy saving profiles independent

    of the power input

    Placing rechargeable energy storage at the point of

    load in the Chip Grid has many advantages:

    Minimize I2R losses. Because devices with Power onChip can be trickled charged, less power needs tobe presented to the electrics from the power supply.

    Power Sources can be isolated. With Power on Chip,devices can be lifted off the grid and run on the

    pure power in the rechargeable energy storagedevice. When isolation is no longer required, thedevice can be placed back on the grid.

    Reduced I/O switching noise when using on chippower.

    Power where ever it is needed. Power on Chip canbe placed in any type of device.

    Power Bridging. In the event of power brownout/blackout, the on chip energy storage takes over andpowers the device.

    Power Boosting. There may be times when a deviceneeds additional power and can draw upon the onchip energy storage versus placing an additionaldemand on the main power supply.

    Effective in ultra low power applications which aretypically also miniaturized.

    Warm start energy can be used for devices in deepsleep or standby.

    Bridging error or early termination conditions.There may be times when a power interruption

    would create device operation errors or even devicefailure. Having Power on Chip provides power tocomplete operations in an orderly fashion.

    Chip Grid Trends

    There are key trends that are occurring at the Chip Gridlevel:

    Lower power devices using lower voltages

    Denser Devices

    Rack Grid PowerBoard Grid Power

    Chip Grid Power

    Intermediate Bus Architecture (IBA)

    BulkAC/DCPowerSupply

    12V Intermediate Bus (Typ)48Vdc Bus (Typ)IBC

    Load 1NiPCL

    Load 2NiPCL

    Load 4NiPCL

    Load 5NiPCL

    Load 6NiPCL

    BACKPLANE

    Figure 3

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    TECHNICAL ARTICLE

    Multi-chip modules

    System on Chip

    Lab on Chip

    Advanced power management techniques

    Same digital power control techniques as BoardGrids and Rack Grids

    All of these trends are pointing toward integration andminiaturization. Many technologies have progresseddown this curve, but batteries have not kept pace.So what are the implications to the Chip Grid? Onekey implication is that we need to integrate intelligentrechargeable energy storage into the Chip Grid. In orderto achieve this requirement, a new product technologyhas been introduced: solid state rechargeable energystorage devices.

    Solid State Rechargeable

    Energy Storage Devices

    Cymbet has introduced a solid state rechargeableenergy storage device based on a silicon substratecalled the EnerChip. The following photo diagramshows how the EnerChip is created on a silicon wafer.The EnerChips are diced and then can be used as baredie or packaged in standard semiconductor packages.Mounted on tape and reel, the EnerChips are placed oncircuit boards using Surface Mount Technology and then

    can be reflow soldered to the board. The EnerChips aretreated like the other IC packages on the final board.

    Using the EnerChip bare die has unique advantagesfor Point of Load energy storage from a packagingperspective as they are small and can be co-packagedin many ways with other ICs or micro devices. The photobelow is a millimeter-sized Solar Energy Harvestingsensor. The solar cell sits on an ultra low powermicrocontroller that sits on a solid state rechargeableenergy storage device (EnerChip CBC012). The devicesare wire bonded to each other.

    Integrated Energy Storage for

    Point of Load Power Delivery

    With the introduction of solid state rechargeable energystorage devices, it is now possible to co-package energystorage directly with other Integrated circuits.

    Examples are shown in the following diagrams:

    Rechargeable Solid State Energy bare die Co-packagedside-by side with an IC:

    EnerChip Bare Die

    Controller, Sensor, RTC

    FLIPCHIPPASSIVES

    Rechargeable Solid State Energy bare die Co-packagedin wedding cake die stack:

    DieDie

    Lead

    Mold CompoundMold Compound

    Lead

    Sn/Pb or Sn

    SolderBump

    SolderBump

    Rechargeable Solid State Energy bare die in System onChip module:

    An important attribute of Solid State Energy Storage built

    on silicon wafer is that they can be solder attached tothe circuit board surface using a flip chip technique.The flip chip attach mechanism opens up many newminiature packaging options.

    Conclusions

    This paper introduced several key concepts which aresummarized as follows:

    1. Pervasive Power is a new power distributionarchitecture that provides enhanced use of power atthe point of load that increases overall system energyefficiency.

    2. There are five levels of interconnected Grids

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    TECHNICAL ARTICLE

    terminating in the Chip Grid. Each grid type sharesthe same principles of power generation, powerdistribution, energy storage and energy managementusing dynamic demand algorithms.

    3. The interconnected Grids can utilize digital powercontrol techniques to optimize the end to end use ofpower and improve energy efficiencies.

    4. In order to enable the Chip Grid, a new energystorage device that can be integrated into the Chipmust be used. Rechargeable solid state energydevices ideally meet this need.

    5. These rechargeable energy storage devices canbe co-packaged with other ICs in the Chip Grid tocreate a miniature highly integrated package.

    6. Once boards are populated with Chips with on-chipenergy storage, Pervasive Power architecture iscreated.

    For additional information on Pervasive Power forIntegrated Energy Storage for Point of Load Delivery, thehttp://www.cymbet.com website has application notes,datasheets, videos and contact forms.

    About the Author

    Steve Grady is responsible for all strategic messaging,product roadmap, CRM, e-initiatives, collateral andlead generation at Cymbet. He has more than twodecades of domestic and international experiencein marketing, sales, business development, productmanagement, engineering, and general managementin the networking, hardware, and software industries.Steve has been in both startup and large companyenvironments with global scope. Prior to joining Cymbet,Steve held senior management and technical positionsat ADC, Marconi, TimeSys, Reltec, and AT&T Bell Labs.He holds BSEE and MSEE degrees from the Universityof Illinois Champaign-Urbana.

    EEWebElectrical Engineering Community

    Contact Us For Advertising Opportunities

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  • 8/4/2019 EEWeb Pulse - Issue 8, 2011

    17/19

    In tersil (and desig n )isa reg iste redtra demarkof Inters ilAme ricasIn c.Co pyrig h tInters ilAme ricas Inc.2 010,2 011A llRig h tsRes erved .Alloth ertra dema rksmention edare thep ropert yofth eirre spectiv eown ers.

    D ig ita lD C / D C PMB u s 12 A Mo du le

    Z L9 10 1MT heZL 910 1Mis a1 2Av ariab leou tputs tep -downP MBu s-complia ntdig italp owersu pply.I nclu ded inth emo duleis ahig hpe rformanc edig ital PWMcon trolle r,po werMOS FETs ,a nind ucto r,and allt hep assiv eco mpo nents req uired for ac omple teD C/D Cpo wers oluti on.T heZ L910 1Mopera tes overa wide inpu tvo ltage rang ean dsu pport san outp utvo ltag era nge of0.6 Vto 4V,whic hca nbe setb yexte rna lres istors orvia PMBus .This high effic ienc ypo wermodu leis cap able ofd elive ring1 2A.O nly bulk inpu tan dou tputc apa citors aren eede dto finish the desig n.T heo utpu tvolta ge canb ep recis elyre gula tedto as lowas0.6 Vw ith 1%o utpu tvolt agere gula tion over line, load ,and tempera ture varia tion s.T heZL 910 1Mfe atu resin tern alco mpe nsatio n,in tern also ft-sta rt,a uto-r ecov eryo verc urre ntpro tecti on,a nen ableo ption ,and pre -bias edou tputs tart -up capa bilitie s.T heZL 910 1Mis pac kage din athe rma llyen han ced,c ompact(1 5mmx15 mm)and lowprofi le(3 .5mm)ov er-molde dQF Np acka gemodule suit able fora utomate dass emb lyby stan dardsu rfac emo unte quip men t.Th eZL 9101 Mis Pb-fr eea ndR oHSc ompli ant.

    Fe atu re sC omp leteD igita lSw itch Mod ePowerS upplyF astT ransie ntR esp onseE xtern alSy nchro niza tionO utpu tVolt age Trac kingC urren tSh aringP rogra mmable Soft- start Dela yan dRa mpO vercu rren t/Un derc urren tPro tecti onP MBu sComplia ntAp pli ca tio n sS erver, Tele com,and Data comIn dustr iala ndMedic alEq uipmentG enera lPu rpos ePo into fLoa dRe la te dL ite ra tu reS eeA N203 3,Z ilke rLab sPMBus Comman dSe t-DD CP rodu ctsS eeA N203 4,C onfig urin gCu rren tSha ring onth eZL 2004a ndZL 200 6

    FIGURE1.12AAPPLICATIONCIRCUITN OTE:F igure 1re pres entsa typic alimplementa tiono fthe ZL91 01M. ForP MBu sope ration ,itis reco mme nded totie thee nable pin (EN)to SG ND.

    VIN

    2x 22F16V

    I2C/S MBus 1

    POWE RGOO DOU TPUTV OUT

    R TN

    4.5V TO13 .2V

    3 x47 F31 6V

    ENAB LEDD CBus 2

    Notes :1.The I2C/S MBus require spull- upre sistors .Plea serefe rtoth eI2C/S MBus specif icatio nsfor mored etails .2.The DDC busre quires apull- upre sistor. There sista ncewil lvary based onth ecapa citive loadin gofth ebus (ando nthe numbe rofdevic escon nected ).Th e10k defau ltvalu e,ass uming amax imumof100 pFpe rdevic e,pro vides thene cessary 1s pull-up riseti me.Pleas erefer tothe Digita l-DCB usse ctionfo rmore deta ils.3.Add itiona lcapa citanc emay bereq uired tomee tspec ifictra nsien trespo nseta rgets4.The VR,V 25,VD RV,a ndVDD capa citors should bep lacedn ofurth erth an0.5 cmfro mthe pin.

    E xtSy nc

    10F16V

    Z L9101 MSYN C

    SA

    SCLSDAVSETVTRK

    FB+

    VDRV

    VDD

    FB-

    PG

    DDC

    VR

    V25

    SGND

    EN

    4.7 F16V

    4.7F16V10 F1 6V

    PG ND(E PAD)

    VIN(E PAD)

    SW(E PAD)

    V OUT(E PAD)

    VDRV4.5V TO6 .5V

    A pril8 ,201 1F N766 9.2

    G etth eDa tash eet and Ord erS amp leshtt p:// www .inte rsil.c om

    Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010, 2011

    All Rights Reserved. All other trademarks mentioned are the property of their respective owners

    Digital DC/DC PMBus 12A Module

    ZL9101MThe ZL9101M is a 12A variable output step-down

    PMBus-compliant digital power supply. Included in the module

    is a high performance digital PWM controller, power MOSFETs,

    an inductor, and all the passive components required for a

    complete DC/DC power solution. The ZL9101M operates over

    a wide input voltage range and supports an output voltage

    range of 0.6V to 4V, which can be set by external resistors or

    via PMBus. This high efficiency power module is capable of

    delivering 12A. Only bulk input and output capacitors are

    needed to finish the design. The output voltage can be

    precisely regulated to as low as 0.6V with 1% output voltage

    regulation over line, load, and temperature variations.

    The ZL9101M features internal compensation, internal

    soft-start, auto-recovery overcurrent protection, an enable

    option, and pre-biased output start-up capabilities.

    The ZL9101M is packaged in a thermally enhanced, compact

    (15mmx15mm) and low profile (3.5mm) over-molded QFN

    package module suitable for automated assembly by standard

    surface mount equipment. The ZL9101M is Pb-free and RoHS

    compliant.

    Features Complete Digital Switch Mode Power Supply

    Fast Transient Response

    External Synchronization

    Output Voltage Tracking

    Current Sharing

    Programmable Soft-start Delay and Ramp

    Overcurrent/Undercurrent Protection

    PMBus Compliant

    Applications Server, Telecom, and Datacom

    Industrial and Medical Equipment

    General Purpose Point of Load

    Related Literature See AN2033, Zilker Labs PMBus Command Set - DDC

    Products

    See AN2034, Configuring Current Sharing on the ZL2004

    and ZL2006

    FIGURE 1. 12A APPLICATION CIRCUIT

    NOTE: Figure 1 represents a typical implementation of the ZL9101M. For PMBus operation, it is recommended to tie the enable pin (EN) to SGND.

    VIN

    2 x 22F

    16V

    I2C/SMBus

    1

    POWER GOOD OUTPUT

    VOUT

    RTN

    4.5V TO 13.2V

    3 x 47F3

    16V

    ENABLE

    DDC Bus2

    Notes:

    1. The I2C/SMBus requires pull-up resistors. Please refer to the I

    2C/SMBus specifications for more details.

    2. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number ofdevices connected). The 10k default value, assuming a maximum of 100pF per device, provides the necessary 1s pull-up rise time.

    Please refer to the Digital-DC Bus section for more details.3. Additional capacitance may be required to meet specific transient response targets

    4. The VR, V25, VDRV, and VDD capacitors should be placed no further than 0.5 cm from the pin.

    Ext Sync

    10F

    16V

    ZL9101M

    SYNC

    SA

    SCL

    SDA

    VSET

    VTRK

    FB+

    VDRV

    VDD

    FB-

    PG

    DDC

    VR

    V25

    SGND

    EN

    4.7F

    16V

    4.7F

    16V

    10F

    16V

    PGND(EPAD)

    VIN(EPAD)

    SW(EPAD)

    VOUT(EPAD)

    VDRV

    4.5V TO 6.5V

    April 8, 2011

    FN7669.2

    Get the Datasheet and Order Samples

    http://www.intersil.com

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