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8/6/2019 EEP 5613 Jan-June2011
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MANUFACTURING ELECTRONIC
PRODUCTS ( EEP 5613 )
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COURSE OUTLINE
Overview of electronic development (vacuum tube,solid state device)
Silicon & Semiconductor
Wafer preparation, crystal growingDesign of transistors, diodes, capacitor, IC,resistors
Front end process ( making die )
Back end process (device packaging)Type of electronics packaging
Comparison Dual in line package (DIP) & PlasticLeaded Chip Carrier (PLCC)
1. Electronic Component Technology
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COURSE OUTLINE
Design rules
Gain and lossess
Wet & dry etching minimum photoresist width
Selectivity of etchants
Failure mode : relationship with chip size
Testing & prediction failure mode ( statisticalmethod, failure mechanisms)
Wafer manufacture : effect of changing chip size,wafer size & process complexity
2. Electronic Component Design Parameter
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COURSE OUTLINE
Design & simulation
Electromagnetic Compatibility (EMC)
Benefit of Surface Mount Technology
PCB layout : ECAD, CNC drilling & routing machinesPCB manufacture : single, double & multilayer board
Safety consideration, inspection methods &equipment
Testing of PCB : burn in, automatic test equipment,boundary scanning, mean time to failure
Casing & housings : sheet metal & non metalfabrication
3. Printed Circuit Board (PCB)
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COURSE OUTLINE
Automated PCB Assembly
Component supply, packaging and form of supply
Component orientation and polarization
Automated component placementUse of Robot
Robotic assembly
Selection criteria for assembly machines & system
sequential, simultaneousAssembly performance, cost, accuracy, realibility,adhesive dispensing
Programming of machines
4. Assembling Electronic Products
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REFERENCE BOOK
1. Rao R. Tummala - Fundamental of Microsystems Packaging,(McGraw-Hill) ISBN 0-07-137169-9
2. Thomas L. Landers Electronic Packaging and InterconnectionHandbook,(McGraw-Hill) ISBN 0-07-134745-3
3. Charles Harper Electronic Assembly Fabrication, (McGraw-Hill) ISBN 0-07-137882-0
4. R S Khandpur - Printed Circuit Boards, (McGraw-Hill) ISBN 0-07-146420-4
5. David Hariss CMOS VLSI Design, (Pearson) ISBN 0-321-26977-2
6. Ronald A. Reis Electronic Project Design and Fabrication,(Prentice Hall) ISBN 0-02-399293-X
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ASSESSMENT
M1 M2 M3 D1 D2 D3
Assessment 1
( Test)Assessment 2
(Test & LabAssignment)
Assessment 3
(Practical test& Lab Assign)
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ATTENDANCE
Cases Justification
5 % 1st Reminder (student)
>5 % & 10 % Bar attend exam.