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National University of Computer & Emerging Sciences Tentative Course Outline of BS (CS) Degree Program Instructors: Nadeem Kafi, [email protected], Muhammad Nauman [email protected], Faraz Idris [email protected], Amber Khan [email protected], Mahrukh Khan [email protected] Course Title Computer Organization and Assembly Language Course Code EE 213 Pre-requisite(s) Digital Logic Design Credit Hrs 3+1 Text Books Title Computer Organization (6 th Ed. 2012) Author Carl Hamachar et. al. Publisher McGraw Hill (ISBN 9780073380650) Title Assembly Language For Intel-Based Computers (6 th Ed. 2011) Author Kip R. Irvine Publisher Pearson Education Inc. (ISBN 978-0-13-602212-1) Reference Books Title Computer Organization and Architecture (8 th Ed. 2010) Author William Stallings Publisher Prentice Hall (ISBN 978-0-13-607373-4) Title The Art of Assembly Language (2 nd Ed 2010) Author Randall Hyde Publisher No Starch Press Inc. (ISBN 978-1-59327-207-4) Softcopies of Text books are in “Resources” folder of NU Slate Objectives: The objective of the course is to enable students understand the Computer Organization (microarchitecture) and Assembly Language (programming model using instruction set architecture) of a microprocessor (uP). Upon successful completion of the course the course students will be able to: Describe instruction execution by uP during fetch-decode-execute cycle. Understand components and interfaces of a given microarchitecture. Explain datapath and controls signals of a given microarchitecture. Work with Intel’s IA-32 Instruction Set Architecture. Develop and debug assembly language programs on Intel’s IA-32 platform. Week Course Contents/Topics Chapter 01 Introduction, Type of Computers, Basic Functional Units of a Computer (Input, Memory, ALU, Output, Control) BK1-Ch 1 02 Basic operational concepts (Processor Architecture, Memory Interface and Instruction Fetch-Instruction Decode- Operand Data Fetch-Instruction Execute cycle, Performance (Parallelism), Examples 1.1, 1.2 BK1-Ch 1 03 Memory Locations and Addresses, Memory Operations, Instructions and Instruction Sequencing, Register Transfer Notation (RTL), Assembly Language Notation, RISC and CISC Instruction Sets. BK1-Ch 2 04 x86 Processor Architecture: CPU block diagram, x86 Architecture details, x86 Memory Management (Real-Mode only) . BK2-Ch 2 05 x86 Assembly Language (1): Addressing Modes (Register, Immediate, Direct, Register Indirect, Base-plus-index, Base-plus-index-offset) examples using Assembly Language Snippets and basic Assembler directives. Lecture Slides

EE 213 COAL Course Outline - Fall 2015

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Computer Organization and Assembly language Course Outline

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National University o f C o m p u t e r & E m e r g i n g S c i e n c e s

Tentative Course Outline of BS (CS) Degree Program

Instructors: Nadeem Kafi, [email protected], Muhammad Nauman [email protected], Faraz Idris

[email protected], Amber Khan [email protected], Mahrukh Khan [email protected]

Course Title Computer Organization and Assembly Language

Course

Code EE 213

Pre-requisite(s) Digital Logic Design Credit Hrs 3+1

Text Books Title Computer Organization (6th Ed. 2012)

Author Carl Hamachar et. al.

Publisher McGraw Hill (ISBN 978–0–07–338065–0)

Title Assembly Language For Intel-Based Computers (6th Ed. 2011)

Author Kip R. Irvine

Publisher Pearson Education Inc. (ISBN 978-0-13-602212-1)

Reference Books

Title Computer Organization and Architecture (8th Ed. 2010)

Author William Stallings

Publisher Prentice Hall (ISBN 978-0-13-607373-4)

Title The Art of Assembly Language (2nd Ed 2010)

Author Randall Hyde

Publisher No Starch Press Inc. (ISBN 978-1-59327-207-4)

Softcopies of Text books are in “Resources” folder of NU Slate

Objectives: The objective of the course is to enable students understand the Computer

Organization (microarchitecture) and Assembly Language (programming model

using instruction set architecture) of a microprocessor (uP). Upon successful

completion of the course the course students will be able to:

• Describe instruction execution by uP during fetch-decode-execute cycle.

• Understand components and interfaces of a given microarchitecture.

• Explain datapath and controls signals of a given microarchitecture.

• Work with Intel’s IA-32 Instruction Set Architecture.

• Develop and debug assembly language programs on Intel’s IA-32 platform.

Week Course Contents/Topics Chapter

01 Introduction, Type of Computers, Basic Functional Units of a Computer

(Input, Memory, ALU, Output, Control)

BK1-Ch 1

02 Basic operational concepts (Processor Architecture, Memory Interface and

Instruction Fetch-Instruction Decode- Operand Data Fetch-Instruction Execute

cycle, Performance (Parallelism), Examples 1.1, 1.2

BK1-Ch 1

03 Memory Locations and Addresses, Memory Operations, Instructions and

Instruction Sequencing, Register Transfer Notation (RTL), Assembly

Language Notation, RISC and CISC Instruction Sets.

BK1-Ch 2

04 x86 Processor Architecture: CPU block diagram, x86 Architecture details, x86

Memory Management (Real-Mode only) .

BK2-Ch 2

05 x86 Assembly Language (1): Addressing Modes (Register, Immediate, Direct,

Register Indirect, Base-plus-index, Base-plus-index-offset) examples using

Assembly Language Snippets and basic Assembler directives.

Lecture

Slides

06 Mid Term 1 -

07 x86 Assembly Language (2): Writing Assembly Programs, Defining Data,

Assembler directive. Assembly programming examples.

BK2-Ch 3

08 x86 Assembly Language (3): Data Transfer, Addition/Subtraction, New

Assembler directives, JMP and LOOP Instructions, Using Procedures

BK2,

Ch 4,5

09 Basic RISC microarchitecture, Steps in executing Instructions on the

microarchitecture

BK1-Ch 5

10 Conceptual design of RISC microarchitecture: Register, ALU, DATAPATH,

and Instruction Fetch Hardware.

BK1-Ch 5

11 Instruction Fetch and Execution on Conceptual RISC hardware BK1-Ch 5

12 Mid Term 2 -

13 Generation of Control Signals for Conceptual RISC hardware BK1-Ch 5

14 Hardware for generating Control Signals, CISC Processor Microarchitecture BK1-Ch 5

15 x86 Assembly Language (4): Conditional Processing and Integer Arithmetic

BK2

Ch 6,7

16 x86 Assembly Language (5): Stack Parameters, Stack Frames and Recursion

BK2

Ch 8

Pre-Requisites courses:

Basic Electronics, Introduction to Computer Science, Digital Logic Design, Computer Programming

Marks Distribution 100% (COAL Lab is a separate course):

Mid Terms (1 & 2) ……………….….……. 25% Quiz / Assignment ….…………….... 20%

Assembly Language Project …………….… 15% Final Examination …….…………… 40%

Teaching philosophy:

Student are required to take lecture notes during the class. Whiteboard contents constitute primary

topics of this course, followed by textbook chapters, handouts and PowerPoint slides.

Please note that COAL PowerPoint slides save time and improve presentation during lectures. Student

must read the relevant portions of the textbook, lecture notes, and handouts in addition to PowerPoint

slides in order to pass this course.

Course Materials (visit course home on Slate):

http://slate.nu.edu.pk/portal/site/KHIEE213FALL2015CS/page/KHIEE213FALL2015CS-home

Plagiarism:

Mark will be detected and the case shall be reported to the HOD and/or DC.

Rules & Regulation:

Learning in the classroom is possible by maintaining the classroom decorum.

Rules and regulations related to attendance, all type of exams, class work, home work and others shall

be observed as per FAST-NU policy and/or communicated by the HOD CS department or in absence

of the same as communicated by the course instructor any time during the semester.