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Page 1: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr
Page 2: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr
Page 3: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr

Edited by

Peter Ramm,

James Jian-Qiang Lu, and

Maaike M.V. Taklo

Handbook of Wafer Bonding

Page 4: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr

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Page 5: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr

Edited by Peter Ramm, James Jian-Qiang Lu, and Maaike M.V. Taklo

Handbook of Wafer Bonding

Page 6: Edited by · 2013. 7. 23. · EMFT Hansastrasse 27d 80686 Munich Germany Prof. Dr. James Jian-Qiang Lu Rensellaer Polytechnic Institute 110 8th Street Troy, NY 12180-3590 USA Dr

The Editors

Dr. Peter RammFraunhofer Research Institution for Modular Solid State Technologies EMFTHansastrasse 27d80686 MunichGermany

Prof. Dr. James Jian-Qiang LuRensellaer Polytechnic Institute110 8th StreetTroy, NY 12180-3590USA

Dr. Maaike M.V. TakloSINTEF ICTGaustadalléen 23 C0314 OsloNorway

All books published by Wiley-VCH are carefully produced. Nevertheless, authors, editors, and publisher do not warrant the information contained in these books, including this book, to be free of errors. Readers are advised to keep in mind that statements, data, illustrations, procedural details or other items may inadvertently be inaccurate.

Library of Congress Card No.: applied for

British Library Cataloguing-in-Publication DataA catalogue record for this book is available from the British Library.

Bibliographic information published by the Deutsche NationalbibliothekThe Deutsche Nationalbibliothek lists this publication in the Deutsche Nationalbibliografie; detailed bibliographic data are available on the Internet at <http://dnb.d-nb.de>.

© 2012 Wiley-VCH Verlag & Co. KGaA,Boschstr. 12, 69469 Weinheim, Germany

All rights reserved (including those of translation into other languages). No part of this book may be reproduced in any form – by photoprinting, microfilm, or any other means – nor transmitted or translated into a machine language without written permission from the publishers. Registered names, trademarks, etc. used in this book, even when not specifically marked as such, are not to be considered unprotected by law.

Cover Design Adam-Design, WeinheimTypesetting Toppan Best-set Premedia Limited, Hong KongPrintingBinding

Printed inPrinted on acid-free paper

Print ISBN: 978-3-527-32646-4ePDF ISBN: 978-3-527-64424-7oBook ISBN: 978-3-527-64422-3ePub ISBN: 978-3-527-64423-0Mobi ISBN: 978-3-527-64425-4

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V

Contents

Preface XV Obituary XVII ListofContributors XXI Introduction XXV

PartOne Technologies 1

A. AdhesiveandAnodicBonding 3

1 GlassFritWaferBonding 3 RoyKnechtel1.1 PrincipleofGlassFritBonding 31.2 GlassFritMaterials 41.3 ScreenPrinting:ProcessforBringingGlassFritMaterialonto

Wafers 51.4 ThermalConditioning:ProcessforTransformingPrintedPasteinto

GlassforBonding 81.5 WaferBondProcess:EssentialWafer-to-WaferMountingbyaGlass

FritInterlayer 111.6 CharacterizationofGlassFritBonds 141.7 ApplicationsofGlassFritWaferBonding 151.8 Conclusions 16 References 17

2 WaferBondingUsingSpin-OnGlassasBondingMaterial 19 ViorelDragoi2.1 Spin-OnGlassMaterials 192.2 WaferBondingwithSOGLayers 212.2.1 Experimental 212.2.2 WaferBondingwithSilicateSOGLayers 222.2.3 WaferBondingwithPlanarizationSOG 28

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VI Contents

2.2.4 ApplicationsofAdhesiveWaferBondingwithSOGLayers 29

2.2.5 Conclusion 30 References 31

3 PolymerAdhesiveWaferBonding 33 FrankNiklausandJian-QiangLu3.1 Introduction 333.2 PolymerAdhesives 343.2.1 PolymerAdhesionMechanisms 343.2.2 PropertiesofPolymerAdhesives 363.2.3 PolymerAdhesivesforWaferBonding 383.3 PolymerAdhesiveWaferBondingTechnology 423.3.1 PolymerAdhesiveWaferBondingProcess 433.3.2 LocalizedPolymerAdhesiveWaferBonding 503.4 Wafer-to-WaferAlignmentinPolymerAdhesiveWafer

Bonding 523.5 ExamplesforPolymerAdhesiveWaferBondingProcessesand

Programs 543.5.1 BondingwithThermosettingPolymersforPermanent

WaferBonds(BCB)orforTemporaryWaferBonds(mr-I9000) 54

3.5.2 BondingwithThermoplasticPolymer(HD-3007)forTemporaryandPermanentWaferBonds 56

3.6 SummaryandConclusions 57 References 58

4 AnodicBonding 63 AdrianaCozmaLapadatuandKariSchjølberg-Henriksen4.1 Introduction 634.2 MechanismofAnodicBonding 644.2.1 GlassPolarization 644.2.2 AchievingIntimateContact 654.2.3 InterfaceReactions 664.3 BondingCurrent 674.4 GlassesforAnodicBonding 684.5 CharacterizationofBondQuality 694.6 PressureInsideVacuum-SealedCavities 704.7 EffectofAnodicBondingonFlexibleStructures 714.8 ElectricalDegradationofDevicesduringAnodic

Bonding 714.8.1 DegradationbySodiumContamination 724.8.2 DegradationbyHighElectricFields 734.9 BondingwithThinFilms 754.10 Conclusions 76 References 77

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Contents VII

B. DirectWaferBonding 81

5 DirectWaferBonding 81 ManfredReicheandUlrichGösele5.1 Introduction 815.2 SurfaceChemistryandPhysics 825.3 WaferBondingTechniques 845.3.1 HydrophilicWaferBonding 845.3.2 HydrophobicWaferBonding 865.3.3 Low-TemperatureWaferBonding 885.3.4 WaferBondinginUltrahighVacuum 895.4 PropertiesofBondedInterfaces 905.5 ApplicationsofWaferBonding 935.5.1 AdvancedSubstratesforMicroelectronics 935.5.2 MEMSandNanoelectromechanicalSystems 955.6 Conclusions 95 References 96

6 Plasma-ActivatedBonding 101 MaikWiemer,DirkWuensch,JoergBraeuer,andThomasGessner6.1 Introduction 1016.2 Theory 1026.2.1 (Silicon)DirectBonding 1026.2.2 MechanismsofPlasmaonSiliconSurfaces 1036.2.3 PhysicalDefinitionofaPlasma 1046.3 ClassificationofPAB 1046.3.1 Low-PressurePAB 1056.3.2 Atmospheric-PressurePAB 1066.4 ProcedureofPAB 1076.4.1 ProcessFlow 1076.4.2 CharacterizationTechniques 1086.4.3 ExperimentsandResults 1106.5 ApplicationsforPAB 1116.5.1 PressureSensor 1126.5.2 OpticalMicrosystem 1126.5.3 MicrofluidicsPackaging 1136.5.4 Backside-IlluminatedCMOSImageSensor 1136.5.5 CMOSCompatibilityofLow-PressurePAB 1146.6 Conclusion 115 References 115

C. MetalBonding 119

7 Au/SnSolder 119 HermannOppermannandMatthiasHutter7.1 Introduction 119

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VIII Contents

7.2 Au/SnSolderAlloy 1207.3 ReflowSoldering 1277.4 ThermodeSoldering 1307.5 AspectsofThree-DimensionalIntegrationandWafer-Level

Assembly 1327.6 SummaryandConclusions 135 References 136

8 EutecticAu–InBonding 139 MitsumasaKoyanagiandMakotoMotoyoshi8.1 Introduction 1398.2 Organic/MetalHybridBonding 1408.3 Organic/In–AuHybridBonding 1428.3.1 In–AuPhaseDiagramandBondingPrinciple 1428.3.2 FormationofIn–AuMicrobumpsbyaPlanarizedLiftoff

Method 1448.3.3 EutecticIn–AuBondingandEpoxyAdhesiveInjection 1468.3.4 ElectricalCharacteristicsofIn–AuMicrobumps 1488.4 Three-DimensionalLSITestChipsFabricatedbyEutecticIn–Au

Bonding 1498.5 High-DensityandNarrow-PitchMircobumpTechnology 1528.6 Conclusion 157 Acknowledgment 157 References 157

9 ThermocompressionCu–CuBondingofBlanketandPatternedWafers 161

Kuan-NengChenandChuanSengTan9.1 Introduction 1619.2 ClassificationoftheCuBondingTechnique 1629.2.1 ThermocompressionCuBonding 1629.2.2 Surface-ActivatedCuBonding 1629.3 FundamentalPropertiesofCuBonding 1639.3.1 MorphologyandOxideExaminationofCuBondedLayer 1639.3.2 MicrostructureEvolutionduringCuBonding 1649.3.3 OrientationEvolutionduringCuBonding 1659.4 DevelopmentofCuBonding 1669.4.1 FabricationandSurfacePreparationofCuBondPads 1669.4.2 ParametersofCuBonding 1679.4.3 StructuralDesign 1689.5 CharacterizationofCuBondingQuality 1699.5.1 MechanicalTests 1699.5.2 ImageAnalysis 1709.5.3 ElectricalCharacterization 1719.5.4 ThermalReliability 171

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Contents IX

9.6 AlignmentAccuracyofCu–CuBonding 1719.7 ReliableCuBondingandMultilayerStacking 1729.8 NonblanketCu–CuBonding 1749.9 Low-Temperature(<300°C)Cu–CuBonding 1769.10 ApplicationsofCuWaferBonding 1789.11 Summary 178 References 179

10 Wafer-LevelSolid–LiquidInterdiffusionBonding 181 NilsHoivikandKnutAasmundtveit10.1 Background 18110.1.1 Solid–LiquidInterdiffusionBondingProcess 18110.1.2 SLIDBondingComparedwithSoldering 18210.1.3 MaterialSystemsforSLIDBonding 18310.2 Cu–SnSLIDBonding 18910.2.1 Cu–SnMaterialPropertiesandRequiredMetal

Thicknesses 19010.2.2 BondingProcesses 19110.2.3 PretreatmentRequirementsforSLIDBonding 19510.2.4 FluxlessBonding 19610.3 Au–SnSLIDBonding 19910.3.1 Au–SnMaterialPropertiesandRequiredMetal

Thicknesses 19910.3.2 BondingProcesses 19910.4 ApplicationofSLIDBonding 20110.4.1 Cu–SnBonding 20110.4.2 Au–SnBonding 20410.5 IntegrityofSLIDBonding 20710.5.1 ElectricalReliabilityandElectromigrationTesting 20710.5.2 MechanicalStrengthofSLIDBonds 20710.6 Summary 210 References 212

D. HybridMetal/DielectricBonding 215

11 HybridMetal/PolymerWaferBondingPlatform 215 Jian-QiangLu,J.JayMcMahon,andRonaldJ.Gutmann11.1 Introduction 21511.2 Three-DimensionalPlatformUsingHybridCu/BCB

Bonding 21711.3 BaselineBondingProcessforHybridCu/BCBBonding

Platform 22011.4 EvaluationofCu/BCBHybridBondingProcessingIssues 22211.4.1 CMPandBondingofPartiallyCuredBCB 22211.4.2 Cu/BCBCMPSurfaceProfile 223

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X Contents

11.4.3 HybridCu/BCBBondingInterfaces 22411.4.4 TopographyAccommodationCapabilityofPartiallyCured

BCB 22711.4.5 ElectricalCharacterizationofHybridCu/BCBBonding 23111.5 SummaryandConclusions 232 Acknowledgments 233 References 233

12 Cu/SiO2HybridBonding 237 LéaDiCioccio12.1 Introduction 23712.2 BlanketCu/SiO2DirectBondingPrinciple 23912.2.1 ChemicalMechanicalPolishingParameters 23912.2.2 BondingQualityandAlignment 24312.3 BlanketCopperDirectBondingPrinciple 24512.4 ElectricalCharacterization 25112.5 Die-to-WaferBonding 25512.5.1 DaisyChainStructures 25612.6 Conclusion 257 Acknowledgment 257 References 258

13 Metal/SiliconOxideHybridBonding 261 PaulEnquist13.1 Introduction 26113.2 Metal/Non-adhesiveHybridBonding–MetalDBI® 26113.3 Metal/SiliconOxideDBI® 26213.3.1 Metal/SiliconOxideDBI®SurfaceFabrication 26313.3.2 Metal/SiliconOxideDBI®SurfacePatterning 26413.3.3 Metal/SiliconOxideDBI®SurfaceTopography 26413.3.4 Metal/SiliconOxideDBI®SurfaceRoughness 26413.3.5 Metal/SiliconOxideDBI®SurfaceActivation

andTermination 26513.3.6 Metal/SiliconOxideDBI®AlignmentandHybridSurface

Contact 26513.3.7 MetalParametersRelevanttoDBI®SurfaceFabricationandElectrical

Interconnection 26813.3.8 DBI®Metal/SiliconOxideStateoftheArt 27013.4 Metal/SiliconNitrideDBI® 27113.5 Metal/SiliconOxideDBI®HybridBondingApplications 27313.5.1 Pixelated3DICs 27313.5.2 Three-DimensionalHeterogeneousIntegration 27513.5.3 CMOS(Ultra)Low-k3DIntegration 27613.6 Summary 276 References 277

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Contents XI

PartTwo Applications 279

14 MicroelectromechanicalSystems 281 MaaikeM.V.Taklo14.1 Introduction 28114.2 WaferBondingforEncapsulationofMEMS 28214.2.1 ProtectionduringWaferDicing 28214.2.2 RoutingofElectricalSignalLines 28214.3 WaferBondingtoBuildAdvancedMEMSStructures 28414.3.1 StackingofSeveralWafers 28414.3.2 Post-processingofBondedWafers 28514.4 ExamplesofMEMSandTheirRequirementsfortheBonding

Process 28614.5 IntegrationofSomeCommonWaferBondingProcesses 28714.5.1 FusionBondingofPatternedWafers 28714.5.2 AnodicBondingofPatternedWafers 29014.5.3 EutecticBondingofPatternedWafers:AuSn 29314.6 Summary 297 References 297

15 Three-DimensionalIntegration 301 PhilipGarrou,JamesJian-QiangLu,andPeterRamm15.1 Definitions 30115.2 ApplicationofWaferBondingfor3DIntegrationTechnology 30315.3 MotivationsforMovingto3DIntegration 30515.4 Applicationsof3DIntegrationTechnology 30715.4.1 Three-DimensionalApplicationsbyEvolutionNot

Revolution 30715.4.2 MicrobumpBonding/NoTSV 30815.4.3 TSVFormation/NoStacking 31015.4.4 Memory 31215.4.5 MemoryonLogic 32115.4.6 RepartitioningLogic 32215.4.7 FoundryandOSATActivity 32315.4.8 Other3DApplications 32315.5 Conclusions 325 References 325

16 TemporaryBondingforEnablingThree-DimensionalIntegrationandPackaging 329

RamaPuligadda16.1 Introduction 32916.2 TemporaryBondingTechnologyOptions 33016.2.1 KeyRequirements 33116.2.2 ForemostTemporaryWaferBondingTechnologies 332

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XII Contents

16.3 BoundaryConditionsforSuccessfulProcessing 33716.3.1 UniformandVoid-FreeBonding 33716.3.2 ProtectionofWaferEdgesduringThinningandSubsequent

Processing 33716.4 Three-DimensionalIntegrationProcessesDemonstratedwith

ThermomechanicalDebondingApproach 33816.4.1 Via-LastProcessonCMOSImageSensorDevice

Wafers 33816.4.2 Via-LastProcesswithAspectRatioof2:1 34116.4.3 Via-LastProcesswith50µmDepthUsingHigh-TemperatureTEOS

Process 34116.4.4 Die-to-WaferStackingUsingInterconnectViaSolid–Liquid

InterdiffusionProcess 34216.5 ConcludingRemarks 343 Acknowledgments 344 References 344

17 TemporaryAdhesiveBondingwithReconfigurationofKnownGoodDiesforThree-DimensionalIntegratedSystems 347

ArminKlumppandPeterRamm17.1 DieAssemblywithSLIDBonding 34717.2 Reconfiguration 34817.3 Wafer-to-WaferAssemblybySLIDBonding 34917.4 ReconfigurationwithUltrathinChips 35117.5 Conclusion 352 Acknowledgments 353 References 354

18 ThinWaferSupportSystemforabove250°CProcessingandColdDe-bonding 355

WernerPamlerandFranzRichter18.1 Introduction 35518.2 ProcessFlow 35618.2.1 ReleaseLayerProcessing 35718.2.2 CarrierWaferProcessing 35718.2.3 BondingProcess 35718.2.4 Thinning 35918.2.5 De-bondingProcess 36018.2.6 Equipment 36118.3 Properties 36118.3.1 DeviceWaferThickness 36118.3.2 ThicknessUniformity 36118.3.3 Stability 36218.4 Applications 36218.4.1 BondingofBumpedWafers 363

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Contents XIII

18.4.2 PackagingofUltrathinDies 36318.4.3 TSVProcessing 36418.4.4 Re-usingtheCarrier 36418.5 Conclusions 364 Acknowledgments 365 References 365

19 TemporaryBonding:Electrostatic 367 ChristofLandesberger,ArminKlumpp,andKarlheinzBock19.1 BasicPrinciples:ElectrostaticForcesbetweenParallelPlates 36719.1.1 ElectricFieldsandElectrostaticForcesinaPlateCapacitor 36819.1.2 ElectrostaticAttractioninaBipolarConfiguration 36919.1.3 Johnsen–RahbekEffect 37019.2 TechnologicalConceptforManufactureofMobileElectrostatic

Carriers 37119.2.1 SelectionofSubstrateMaterial 37119.2.2 SelectionofThin-FilmDielectricLayers 37219.2.3 ElectrodePatterns:MaterialsandGeometry 37419.2.4 ExamplesofMobileElectrostaticCarriers 37519.3 CharacterizationofElectrostaticCarriers 37619.3.1 ElectricalandThermalProperties,LeakageCurrents 37619.3.2 PossibleInfluenceofElectrostaticFieldsonCMOSDevices 37819.4 ElectrostaticCarriersforProcessingofThinandFlexible

Substrates 37919.4.1 HandlingandTransferofThinSemiconductorWafers 37919.4.2 WaferThinningandBacksideMetallization 38019.4.3 ElectrostaticCarriersinPlasmaProcessing 38019.4.4 ElectrostaticCarriersEnableBumpingofThinWafers 38019.4.5 ElectrostaticCarriersinWet-ChemicalEnvironments 38119.4.6 ElectrostaticHandlingofSingleDies 38119.4.7 ProcessingofFoilsandInsulatingSubstrates 38119.5 SummaryandOutlook 382 References 383

Index 385

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XV

Preface

One may ask if we need another book on wafer bonding. The answer is a clear yes. The research and development on wafer bonding has truly sped up in the last few years, motivated by the extended use of wafer bonding in new technology areas with a variety of materials. It is very desirable to summarize the recent advances in wafer bonding fundamentals, materials, technologies, and applications in a handbook format, rather than just focusing on scientific fundamentals and/or applications.

So far there have been several books and review articles on wafer bonding, such as

• Tong, Q.-Y. and Gösele, U. (1999) Semiconductor Wafer Bonding: Science and Technology, John Wiley & Sons, Inc.;

• Alexe, M. and Gösele, U. (eds) (2004) Wafer Bonding: Applications and Technol-ogy, Springer;

• Plößl, A. and Kräuter, G. (1999) Wafer direct bonding: tailoring adhesion between brittle materials. Materials Science and Engineering, R25, 1–88.

We do need an update. The change is mainly due to the fast pace of research and development in three-dimensional (3D) integration, temporary bonding, and microelectromechanical systems (MEMS) with new functional layers.

Formerly, wafer bonding was applied for manufacturing silicon-on-insulator wafers, for fabrication of sensors and actuators, and for various fluidic systems. Today, manufacturers of IC wafers have also learnt the terminologies related to wafer bonding. As Moore’s law seems to come to an end, or at least to meet some resistance, memory and logic devices are being stacked in the third dimension to increase the density of transistors and improve performance and functionality. IC manufacturers work on larger wafers and produce wafers in huge quantities, so they have truly challenged lately the vendors of wafer bonding tools. Their interest in wafer stacking has resulted in increased alignment precision, tools for larger wafers, an increased focus on new materials, lower cost and higher through-put, etc.

Based on the tremendous progress in wafer bonding in recent years, we invited world experts to contribute chapters to this wafer bonding handbook, covering a

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XVI Preface

variety of technologies and applications. The wafer bonding technologies are pre-sented in Part One. We have grouped them into (i) adhesive and anodic bonding, (ii) direct wafer bonding, (iii) metal bonding, and (iv) hybrid metal/dielectric bonding. Several other possible ways of sorting the technologies are possible, but the sorting approach taken here distinguishes the materials, the approaches, and their possible applications. In Part Two, some key wafer bonding applications are summarized, that is, 3D integration, MEMS, and temporary bonding, to give readers a flavor for where the wafer bonding technologies are significantly applied.

This handbook focuses on wafer-level bonding technologies including chip-to-wafer bonding. However, some of the technologies can also apply to chip-to-chip bonding, probably with some modifications.

Peter RammJames Jian-Qiang LuMaaike M.V. Taklo

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XVII

ObituaryInHonorofUlrichGösele(1949–2009)

The editors would like to honor Professor Ulrich Gösele for his great contributions to wafer bonding, and are proud to have his chapter on “Direct Wafer Bonding” – his last authored article – in this book.

Ulrich M. Gösele25 January 1949–8 November 2009The photo was taken in July 2009 (source: MPI Halle)

Professor Ulrich Gösele passed away on 8 November 2009. His death was unex-pected and is a great loss for his family and his many friends and colleagues all over the world.

His research interests covered different areas and were of impact for the science and technology of wafer bonding, diffusion and defects in semiconductors, semi-conductor nanoparticles and nanowires, complex oxide films on semiconductors, silicon photonics, photonic crystals, and self-organized nanoscale structures.

Ulrich M. Gösele was born on 25 January 1949, in southern Germany in the city of Stuttgart. He studied physics at the University of Stuttgart and at the Tech-nical University of Berlin and obtained his diploma in 1973. His PhD work was carried out at the University of Stuttgart and at the Max Planck Institute for Metals Research. In 1975 he completed his PhD thesis and was afterwards a scientific

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XVIII Obituary

staff member of the Max Planck Institute for Metals Research until 1984. During this time he was also a visiting scientist at the Atomic Energy Board, Pretoria (South Africa) in 1976–77 and at the IBM Watson Research Center, Yorktown Heights (NY, USA) in 1980–81. He finished his Habilitation in 1983 at the Uni-versity of Stuttgart. From 1984 to 1985 he was with Siemens Corporation, Munich, before he accepted a professorship of materials science in 1985 at Duke University, Durham (NC, USA). In 1991 he was a visiting scientist at the NTT LSI Laborato-ries, Atsugi (Japan). From 1993 he was a Director and Scientific Member at the Max Planck Institute of Microstructure Physics, Halle (Germany). He was also an Adjunct Professor at the Martin-Luther University, Halle-Wittenberg (from 1994) and at Duke University (from 1998).

He started his career as a theoretician, working on topics like diffusion-control-led reaction kinetics, radiation damage in metals, and transfer of electron excita-tion energy in liquids and solids. In 1975 he became interested in point defects and diffusion in silicon. His first paper in this area was published together with H. Föll and B.O. Kolbesen on agglomerates of intrinsic point defects, the so-called swirl defects [1]. Especially, his time at the IBM Watson Research Center and the intensive cooperation with T.Y. Tan resulted in numerous publications about point defects and diffusion in silicon.

His theoretical education and an evolving deep understanding and appreciation of experimental work may be a reason that he started research in the field of wafer bonding in the late 1980s at Duke University. Especially, the support by Dr. Takao Abe from Shin-Etsu Handotai Co., Isobe (Japan) enabled such experiments. A first result was the construction and application of a micro-cleanroom setup in 1988 allowing the bonding of wafers in a particle-free ambient under environmental conditions [2]. The principle of the micro-cleanroom setup was the basis of one of his most important patents [3] and was transferred to Karl Süss GmbH, a manu-facturer of semiconductor equipment in the city of Garching close to Munich (Germany) resulting in one of the first commercially available wafer bonding tools in the early 1990s.

The increasing number of new students in his group allowed him to study dif-ferent aspects of wafer bonding. First experiments on the wafer bonding of silicon to glass or to sapphire were carried out. Furthermore, aspects of wafer thinning processes by applying etch stop layers (carbon ion-implantation, etc.) were inves-tigated. One of the most remarkable studies at this time was the analysis of defects formed in the interface of bonded wafer pairs [4]. All these investigations resulted in a first model of (hydrophilic) silicon wafer bonding by him together with Stengl and Tan [5]. In the early 1990s his research was focused on the preparation of silicon-on-insulator wafers by wafer bonding techniques. Besides numerous pub-lications, another important patent concerns hydrogen-induced layer transfer [6].

Gösele continued his research activities after joining the newly founded Max Planck Institute of Microstructure Physics in 1993. Based on the support given by the Max Planck Society additional activities were undertaken in the research of wafer bonding. One example was the installation of an ultrahigh-vacuum tool allowing the wafer bonding under ultrahigh-vacuum conditions. Combined with

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Obituary XIX

computer simulations, molecular dynamic models of interface processes during wafer bonding were developed. Furthermore, the installation of various pieces of equipment such as cleanroom facilities resulted in numerous other research activi-ties in the field of wafer bonding. These activities included, for instance, wafer bonding via designed monolayers, the bonding of different III–V compounds, and the development of methods for low-temperature wafer bonding.

His enormous range of research activities resulted in the publication of more than 700 articles in refereed journals, and the granting of numerous patents. He was one of the organizers of the first Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications held during the Autumn Meeting of the Electrochemical Society in October 1991 in Phoenix, AZ, USA. In addition to C.E. Hunt, H. Baumgart, S.S. Iyer, and T. Abe, he was an organizer of the 3rd Symposium on Semiconductor Wafer Bonding held during the Spring Meeting of the Electrochemical Society in 1995 in Reno, NV, USA. He was coauthor and coeditor, respectively, of the famous monographs Semiconductor Wafer Bonding: Science and Technology [7] and Wafer Bonding: Applications and Technology [8].

Ulrich Gösele’s work and personality were appreciated all over the world and recognized by many honors and awards. For instance, he obtained the Electronics Division Award of the Electrochemical Society (1999), he was on the Board of Directors of the Materials Research Society (USA), and was a Fellow of the Ameri-can Physical Society and a Fellow of the Institute of Physics (UK).

References

1 Föll, H., Gösele, U., and Kolbesen, B.O. (1977) The formation of swirl defects in silicon by agglomeration of self-interstitials. J. Cryst. Growth, 40, 90.

2 Stengl, R., Ahn, K.-Y., and Gösele, U. (1988) Bubble-free silicon wafer bonding in a non-cleanroom environment. Jpn. J. Appl. Phys., 27, L2364.

3 Gösele, U. and Stengl, R. (1988) Method for bubble-free bonding of silicon wafers. US Patent 4,883,215, filed 19 December 1988, issued 28 November 1989.

4 Mitani, K., Lehmann, V., Stengl, R., Feijoo, D., Gösele, U., and Massoud, H. (1991) Causes and prevention of temperature-dependent bubbles in silicon wafer bonding. Jpn. J. Appl. Phys., 30, 615.

5 Stengl, R., Tan, T., and Gösele, U. (1989) A model for the silicon wafer bonding process. Jpn. J. Appl. Phys., 28, 1735.

6 Gösele, U. and Tong, Q.-Y. (1997) Method for the transfer of thin layers of monocrystalline material to a desirable substrate. US Patent 5,877,070, filed 31 May 1997, issued 2 March 1999.

7 Tong, Q.-Y. and Gösele, U. (1999) Semiconductor Wafer Bonding: Science and Technology, John Wiley & Sons, Inc., New York.

8 Alexe, M. and Gösele, U. (eds) (2004) Wafer Bonding: Applications and Technology, Springer Verlag, Heidelberg.

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XXI

ListofContributors

Knut AasmundtveitVestfold University CollegeDepartment of Micro and Nano Systems TechnologyFaculty of Science and EngineeringPO Box 22433103 TønsbergNorway

Karlheinz BockFraunhofer Research Institution for Modular Solid State Technologies EMFTHansastrasse 27d80686 MunichGermany

Joerg BraeuerFraunhofer ENASDepartment of System Packaging09126 ChemnitzGermany

Kuan-Neng ChenNational Chiao Tung UniversityDepartment of Electronics EngineeringHsinchu 300Taiwan

Léa Di CioccioCEA-Leti, MINATECDépartement Intégration Hétérogène Silicium17 rue des Martyrs38054 Grenoble Cedex 9France

Viorel DragoiEV GroupE. Thallner Straße 14782 St FlorianAustria

Paul EnquistZiptronix, Inc.800 Perimeter ParkMorrisville, NC 27560USA

Philip GarrouMicroelectronic Consultants of NC3021 Cornwallis RoadResearch Triangle ParkNC 27709-2889USA

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XXII ListofContributors

Thomas GessnerFraunhofer ENASDepartment of System Packaging09126 ChemnitzGermanyandTU ChemnitzCenter for Microtechnologies09126 ChemnitzGermany

Ulrich GöseleMax Planck Institute of Microstructure PhysicsWeinberg 206120 HalleGermany

Ronald J. GutmannRensselaer Polytechnic InstituteDepartment of Electrical, Computer, and Systems EngineeringCII-6015, 110 8th StreetTroy, NY 12180USA

Nils HoivikVestfold University CollegeDepartment of Micro and Nano Systems TechnologyFaculty of Science and EngineeringPO Box 22433103 TønsbergNorway

Matthias HutterFraunhofer IZMGustav-Meyer-Allee 2513355 BerlinGermany

Armin KlumppFraunhofer Research Institution for Modular Solid State Technologies EMFTHansastrasse 27d80686 MunichGermany

Roy KnechtelX-FAB Semiconductor Foundries AGHaarbergstraße 6799097 ErfurtGermany

Mitsumasa KoyanagiTohoku UniversityGraduate School of Engineering6-6-04 Aramaki Aza, Aoba KuSendai 808578Japan

Christof LandesbergerFraunhofer Research Institution for Modular Solid State Technologies EMFTHansastrasse 27d80686 MunichGermany

Adriana Cozma LapadatuSensoNor Technologies ASKnudsrødveien 73192 HortenNorway

James Jian-Qiang LuRensselaer Polytechnic Institute110 8th StreetTroy, NY 12180-3590USA

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ListofContributors XXIII

Jian-Qiang LuRensselaer Polytechnic InstituteDepartment of Electrical, Computer, and Systems EngineeringCII-6015, 110 8th StreetTroy, NY 12180USA

J. Jay McMahonRensselaer Polytechnic InstituteDepartment of Electrical, Computer, and Systems EngineeringCII-6015, 110 8th StreetTroy, NY 12180USA

Makoto MotoyoshiZyCube Co. Ltd4259-3 Nagatsuta-cho, Midori-kuYokohama 226-8510Japan

Frank NiklausKTH – Royal Institute of TechnologyMicrosystem Technology (MST)School of Electrical Engineering100 44 StockholmSweden

Hermann OppermannFraunhofer IZMGustav-Meyer-Allee 2513355 BerlinGermany

Werner PamlerThin Materials AGHansastraße 27d80686 MunichGermany

Rama PuligaddaBrewer Science Inc.Brewer DriveRolla, MO 65401USA

Peter RammFraunhofer Research Institution for Modular Solid State Technologies EMFTHansastrasse 27d80686 MunichGermany

Manfred ReicheMax Planck Institute of Microstructure PhysicsWeinberg 206120 HalleGermany

Franz RichterThin Materials AGHansastraße 27d80686 MunichGermany

Kari Schjølberg-HenriksenSINTEFDepartment of Microsystems and Nanotechnology0314 OsloNorway

Maaike M.V. TakloSINTEF ICTInstrumentationPO Box 124 Blindern0314 OsloNorway

Chuan Seng TanNanyang Technological University50 Nanyang AvenueSingapore 639798Singapore

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XXIV ListofContributors

Maik WiemerFraunhofer ENASDepartment of System Packaging09126 ChemnitzGermany

Dirk WuenschTU ChemnitzCenter for Microtechnologies09126 ChemnitzGermany

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XXV

IntroductionPeterRamm,JamesJian-QiangLu,andMaaikeM.V.Taklo

As editors of this book, we consider that there is a strong need to update the state of the art on wafer bonding [1–3]. The major reason is that corresponding develop-ment has truly sped up in recent years, motivated by the extended use of wafer bonding in new technology areas, such as three-dimensional (3D) integration, temporary bonding, and microelectromechanical systems (MEMS) with new func-tional layers. With novel areas of application, new objectives for wafer bonding technologies arise. For IC fabrication the traditionally much finer pitch used – com-pared to MEMS applications – has demanded sophisticated wafer bonding solu-tions. Metals, such as copper that has been used widely in the IC world, have also received a lot more attention for wafer bonding after wafer bonding became of interest for the IC community. For true 3D vertical integration where the IC wafers contain through-silicon vias (TSVs), electrical interconnects are needed between the wafers at their interfaces and can be realized by metal bonding. The interface interconnects and the TSVs can be formed either before or after bonding. This handbook covers a variety of wafer bonding technologies and applications and is structured according to these two aspects.

Technologies

In Part One, the technologies are sorted into four categories:

A) adhesive and anodic bonding;B) direct wafer bonding;C) metal bonding;D) hybrid metal/dielectric bonding.

Other ways of sorting the technologies are possible, but the sorting taken here distinguishes the materials, approaches, and applications. We have attempted to include all bonding technologies that have received a reasonable level of attention from both the research and commercial communities. We are fully aware that some variants have been left out. These are not forgotten or excluded, but some level of standardization is believed to be beneficial for most of the communities.

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XXVI Introduction

This being said, it can be a hard decision whether to further optimize existing bonding technologies or to move to a new bonding regime. To move from one bonding technology to another can take years, something companies have pain-fully learned. Take MEMS as an example: it seems that the MEMS manufacturers are gradually moving from glass-based methods to metal-based methods. A product can benefit from a reduced bond frame width in the case of metal bonding, but the inclusion of metal as a bond frame material may have consequences for the complete process flow of the product. For yet other products in the same manufacturer’s portfolio, the former glass-based solution may still be a better solution. The result is that a manufacturer has to deal with two bonding technolo-gies rather than only one; this normally increases the manufacturing cost since it always takes more engineering effort to keep two processes up and running. Some choices have to be made: whether to always keep changing or upgrading the bonding technology for a given product, or to have one robust and flexible bonding technology and to modify all products accordingly. In this handbook the reader will find an overview of the most commonly used bonding solutions, and the arguments for these choices, as of today.

In Part One (A) we consider adhesive, anodic, glass frit, and spin-on glass (SOG) bonding. A glass material is common for anodic, glass frit, and SOG bonding. Commonly, the bonding material is spun or otherwise coated for adhesive, glass frit, and SOG bonding. Part One (A) focuses on these materials.

Adhesive bonding has in some cases been referred to as “simply” gluing wafers. The associations with glue seem something less advanced than other bonding methods; however, this is not true, and the reader will get a clear understanding from Chapter 3. Even though a finally optimized adhesive bonding process may appear straightforward as the surface topography can be compensated to a large extent and the bonding material appears homogeneous, one should not be fooled; a successful adhesive bonding is typically a result of combined advanced material development and careful bonding process optimization. Applications of adhesive bonding range from bonding of delicate logic wafers to bonding of low-cost wafers with large line widths for fluidic systems. In addition, temporary bonding is to a large extent based on the knowledge of adhesive bonding. However, some new materials have been developed for temporary bonding, in particular as the need for debonding was introduced. Some alternative process modification techniques were presented by SOITEC/LETI some years ago for debonding (the roughness could be tuned with a precision of nanometers), but wax seems to dominate this field at the present time.

The history of anodic bonding is long – normally considered to start with the article of Wallis and Pomerantz back in 1969. The robustness of the process is probably what has kept the technology in use. It is a popular bonding technique especially for MEMS manufacturing, and the technology is described in this book in Chapter 4, the authors of which have decades of experience using anodic bonding for industrial applications. This bonding technology is demanding with regard to surface topography, but to a level acceptable for most MEMS manufac-turers. Smart designs of horizontal conductors have allowed cavities to be hermeti-cally sealed using anodic bonding despite the demands of a low surface roughness.

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Introduction XXVII

The challenge of sealing cavities with crossing conductor lines has come up repeat-edly. Glass frit bonding, here described in Chapter 1, has offered a way around this since more surface roughness is tolerable. Since the final bond is glass in both cases, the two technologies have several common issues with regard to reliability (leak rates, fracture mechanics, etc.) and can be considered as competing technolo-gies. However, today we see several glass wafer manufacturers offering wafers with silicon or metal vertical vias. When the conductors are no longer crossing the bond line, there is a possibility that anodic bonding will actually gain some new interest. Spin-on glass is not as widely used as the other techniques mentioned, but there are some advantages with this technique, which justify a separate chapter (Chapter 2).

In Part One (B) we have gathered direct wafer bonding (DWB) methods. We have limited this to techniques where the wafers, either bare or oxidized, are contacted directly. We consider fusion bonding and plasma-activated bonding (PAB) to be subgroups of DWB, and the topics are thoroughly described in this book in Chapters 5 and 6, respectively. In both cases, the wafers are pre-bonded at room temperature and post-bond annealing is performed in a furnace or hot chamber depending on required temperatures. The pretreatment of the wafers differs in the two cases, but typically the surfaces are rendered either extremely hydrophilic or hydrophobic by wet or dry processing. The post-bond treatment temperature ranges from low temperature (or no heating) for PAB to heating above 1000 °C for fusion bonding. Obviously, the temperature treatment sets the limit for how a process sequence can be organized, but also the extreme demands of DWB with regard to surface roughness set strong limitations on how wafers can be treated before bonding. These issues are discussed in both the technology and the application chapters dealing with DWB.

In Part One (C) we have grouped four chapters on metal bonding methods. There is a wide range of metals that have been demonstrated to be applicable for wafer-level bonding within the semiconductor industry. It is certainly a benefit when metals that are already part of the CMOS industry can be used for bonding, but this has not been an absolute limitation for the choice of metals. When bonding is performed as one of the last process steps, compatibility issues with existing materials are less of a concern – as long as a satisfactory diffusion barrier is incorporated. But for bonding as an intermediate process step, the choice of metal is crucial. The application of copper as a bonding material has lately become popular for compatibility issues among other reasons. Copper is a demanding material with regard to wafer bonding; a high bonding pressure and/or extreme surface control may be required. However, these obstacles have been overcome as described, for example, in Chapter 9. Other metals or metal systems that are of interest are combinations of tin, copper, gold, and indium. Important knowledge about the complexity of the corresponding phase diagrams of these systems has, to a large extent, come from the knowledge of researchers working in the field of electronic packaging. Chapters 7, 8, and 10 describe how this knowledge has been applied to “tame” the devils in the detailed diagrams.

The idea of hybrid bonding, as described in Part One (D), is basically to take the best of two worlds and combine them into a wafer bonding method, resulting in

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XXVIII Introduction

mechanical and electrical connection between wafers at one step. The challenge necessarily is to find process parameters that fit the two combined bonding methods at once. As more than one solution to this challenge has been presented, several chapters are dedicated to this topic. Chapters 12 and 13 both describe how metals like copper or nickel can be combined with inorganic dielectrics like oxides; copper combined with a polymer is presented in Chapter 11. A core part of these discussions is how to tune the polishing processes to two materials at the same time to achieve the required surface smoothness for high-quality bonding.

Applications

In Part Two, recent applications of wafer bonding are described.In general, wafer bonding technologies are applied over a wide range, such as:

• silicon-on-insulator wafers or variations for semiconductor applications;

• MEMS for nonhermetic, hermetic, and extremely hermetic attachment of parts, and combined possibilities;

• fluidic systems for a variety of applications in thermal management or bio-medical devices;

• handling of thin wafers/chips for further processing in semiconductor proc-esses and packaging;

• 3D ICs for stacking memories or memories/microprocessors for computation and communication systems;

• 3D heterogeneous integration and packaging to integrate a variety of compo-nents (such as CMOS image sensors and readout circuits) into one compact system.

This handbook is not intended to give a comprehensive summary of wafer bonding applications because many applications are described in other books and more applications are still emerging. Besides the applications discussed in the chapters in Part One, chapters in Part Two summarize the key wafer bonding applications developed recently, that is, 3D integration, MEMS, and temporary bonding, to give readers a taste of where the wafer bonding technologies are applied significantly.

Definitions

Many terminologies are defined in individual chapters in this handbook. Here we focus only on a few terminologies, which we thought should be further clarified.

Several chapters in this handbook deal with wafer bonding by use of metal systems. Besides direct metal bonding (Chapters 6 and 9), there are two bonding