Ecs File.pdf

8/18/2019 Ecs File.pdf

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EXPERIMENT – 1

Objective:- Familiarisation with EDA tools.

Theory:-

What are EDA tools

EDA stands for Electronic Design Tools, which is a category of software tools

for designing electronic systems, such as- printed circuit board, integrated

circuit. The tools work together in design flow that chip designers use to design

and analyse entire semiconductor chip. EDA is often known as CAEComputer

Aided Engineering! and ECADElectronic Computer Aided Designing!,

acknowledging the crucial role EDA plays in the design phase.

"hile the consumers mostly focus on the end products and is mostly unaware

of the chips and circuits inside. #o, without EDA , there would be no electronic

designers in the market. The unrelenting dri$e to produce e$en smaller and more

comple% electronic components and microprocessors for use in computers,

automobiles, household de$ices and in thousands of areas of modern life has

fuelled the need of ultra powerful EDA platform to design these systems .

Ty!es o" EDA tools-

To design different electronic de$ices and &C's, we need different types of EDA

tools. #ome of the EDA tools are-

1. Allia#ce: &t is a complete set of free CAD tools portable libraries for ()#&

design. &t includes a (*D) compiler and simulator, logic synthesis tools and

automatic place and route tools. Ad$anced $erification tools for functional

abstraction and static timing analysis are part of the system. Complete set of

portable C+# libraries is pro$ided, including a A+ generator, a +

generator and a data path pro$ider.

2. $tate %AD: &t automates state machine de$elopment in (*D) and (erilog.

sing the F#+ wi/ard, comple%, concurrent state machines are specified.

Fandom logic and +ealy0+oore outputs are added to complete the design. To

meet tough product re1uirements, #tate CAD optimises the code it generates for

speed, area , loading and more. (endor specific generation code guarantees the

design will function, with your tools, as you aspect. #tate CAD has code

generators for all top name products from #ynopsis, $iew )2&C, Altera and

more.


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&'Art ()il*er: It generates fully synthesizable RT- level (*D) and(erilog *D) from a large subset of A3#&-C. AT designer 4.5 lets you

interacti$ely dri$e and e%plore multiple dedicated hardware architectures from

softwares, using only A3#&-C or systems C programs. "hen the design is

optimi/ed, the tool automatically generates a fully synthesi/able (erilog or

(*D) description. This latest $ersion of the tool has enhancements gearedspecifically to F62A architectures from Altera and 7ilin%.

+'Active ,D: &t is a completely integrated, powerful *D) design and

simulation en$ironment. Acti$e 8*D) is offered in three product configurations

to adapt to all the design styles.

9.TE$T (EN%,ER PRO: &t generates reacti$e (*D) and (erilog test

benches bus functional modes from language independent timing diagrams.

APPI%ATION$ O. EDA TOO$:• EDA tools help the system designer to use the latest technology and

e%plore different design approaches.

• EDA programs allow the designer to model the system's performance

and estimate its power needs.

• &t helps the A#&C logic designers put their logic design ideas into

computer form.

• The high comple%ity of integrated circuits: EDA helps the layout

designer place and route millions of components on the &Cs. • &t helps check hundreds of physical and electrical design rules.

EDA helps product companies achie$e more comple% chips with lower cost,

shorter time in the market.

• &t helps all of us, where$er we ha$e electronic systems-like in cell

phones and satellite communications.

• T( and personal entertainment products ,smarter cars and e$en in

military systems.

W,ERE ARE EDA TOO$ /$ED

Engineers use EDA tools to design electronic products. Electronic products

include ;ust about anything that plugs into the walls or uses the batteries for

electric power, such as computers, cell phones, digital cameras and

communication e1uipment. Electronic products are used in houses ,

automobiles, aerospace products, and all kinds of industrial products.


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EXPERIMENT- 0

Objective: )earning to capture schematic and use simulation commands.

Theory:-

#imulationFunctional $erification tool confirms that the functionality of a model of a circuit

conforms to the intended or specified beha$iour, by simulation or by formal

$erification methods. These tools are must ha$e tools. There are two ma;or tool sets

for simulation: Functional )ogic! simulation tools and Timing simulation tools.

Functional simulators $erify the logical beha$iour of a design based on design entry.

The design primiti$es used in this stage must be characteri/ed completely. Timing

simulators on the other hand perform timing $erifications at multiple stages of the

design. &n this simulation the real beha$iour of the system is $erified when

encountering the circuit delays and circuit elements in actual de$ice. &n general, the

simulation information reflects the actual length of the de$ice interconnects. This

information is


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Placing and editing partsAdd library: Display a standard open dialog box that you can useto locate a library and add it to the libraries.

Remove libraries: Remove the selected libraries from the list.Part search: Open the part search dialog box so you can search fora part in all the libraries listed in a particular directory.To fnd a part!. In the schematic page editor choose part from the place menu.". #lic$ the part search button . The box is appear.%. &nter the part name you 'ant to locate.(. #lic$ bro'se to locate the directory 'here your libraries arelocated.

). #lic$ begin search. #apture returns the names of all the librariesin the speci*ed directory that contain your part. RE$/T: *ence learned how to capture schematic and use simulation commands.


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EXPERIMENT-&

Objective:- To simulate a circuit containing $arious gates.

Tool /se*:- rCAD Capture

Theory: A Digital )ogic 2ate is an electronic de$ice that makes logicaldecisions based on the different combinations of digital signals present on itsinputs. Digital logic gates may ha$e more than one input but generally onlyha$e one digital output. &ndi$idual logic gates can be connected together toform combinational or se1uential circuits, or larger logic gate functions.

&n electronics, a "li!-"lo! or latch is a circuit that has two stable states and can be used to store state information. A "li!-"lo! is a bistable multi$ibrator. Thecircuit can be made to change state by signals applied to one or more control

inputs and will ha$e one or two outputs.

i2 Di3ital 3ates I%-4+5+

I%-4+561- NOT 3ate: A 3T gate has only > input and > output. &t simply

complements the binary input applied to it. i.e. when the input is ?, output

is >.

0-AND 3ate: An A3D gate has 4 inputs and >output. &ts output is > only when

both of the inputs is >, else it is ?.

&-OR 3ate: An gate has 4 inputs and > output. &ts output is >when either of

the 4 inputs is >, else it is ?.


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I%-4+&0 I%-

4+55 I%-4+50

+-NAND 3ate: A 3A3D gate is also a 4 input, > output de$ice whose ouput is >

when either of the two inputs is ?, else it is >.

7-NOR 3ate: A 3 gate is a 4 input, > output de$ice whose output is > when

both the inputs are ?, else it is ?.


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$che8atic:-

>. 3T 2ATE

4. A3D 2ATE

5. 2ATE

@. 3A3D 2ATE

9. 3 2ATE


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O)t!)t:-

>.T6T F 3T 2ATE

4. T6T F A3D 2ATE

5. T6T F 2ATE

@. T6T F 3A3D 2ATE

9. T6T F 3 2ATE


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EXPERIMENT – +

Objective:- To simulate #- and -B flip-flop.


Theory:-

ii2

.li!

"lo!s 1- $-R "li!

"lo!:

0-9- "li! "lo!:


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$che8atic:-

>. #- F)&6-F)6

4. +A#TE-#)A(E -B F)&6-F)6


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O)t!)t:-

>. T6T F #- F)&6-F)6

4. T6T F +A#TE-#)A(E -B F)&6-F)6


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EXPERIMENT – 7

Objective:- To simulate a circuit of @:> multiple%er and >:@ demultiple%er.


Theory:-A multiple%er is a combinational circuit that selects binary information from one

of the many input lines and directs it to a single output line. The selection of a

particular input line is controlled by a set of selection lines. 3ormally there are

4n input lines and n selection lines whose bit combinations determine which

input is selected.

A demutiple%er is a combinational circuit which takes a single input signal and

transmits it to the multiple output lines connected to it. *ere also, the output line

to which the input signal is transmitted is determined by the bits combination of

the selection lines.

$che8atic:-

>! >:@-+)T&6)E7E


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4! @:>-DE+)T&6)E7E

O)t!)t:-

>! T6T F >:@-+)T&6)E7E


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4! T6T F>:@-DE+)T&6)E7E


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EXPERIMENT-;

Objective:- To design and simulate a 4- digit CD adder0subtractor.


Theory:- A CD adder is a @-bit binary a**er that is capable of adding two @- bit words ha$ing a CD binary-coded decimal! format. The result of theaddition is a CD-format @-bit output word, representing the decimal sum of theaddend and augend, and a carry that is generated if this sum e%ceeds a decimal$alue of .

A CD adder re1uires two parallel binary adders. The first adder adds thecorresponding bits of the two input CD numbers. &t has an inbuilt circuitrywhich checks the carry generated after the addition of the two numbers. &f anycarry is generated, the CD number is in$alid. #o, the second circuit adds

?>>?! to the CD number to make it a $alid CD number which is the finaloutput of the adder.

$che8atic:-


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O/TP/T:


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EXPERIMENT – 4

Objective:- To simulate a class A amplifier.


$che8atic:-

O)t!)t:-


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EXPERIMENT - 6

Objective:- To design and simulate)ow-pass filter, *igh-pass filter and and-passfilter '


T,EOR


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OW-PA$$ .ITER O/TP/T


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,I=,-PA$$ .ITER

A high-pass filter is an electronic filter that passes signals with a fre1uency higher

than a certain cutoff fre1uency and attenuates signals with fre1uencies lower than the

cutoff fre1uency. The amount of attenuation for each fre1uency depends on the filter

design. A high-pass filter is usually modeled as a linear time in$ariant system. *igh-

pass filters ha$e many uses, such as blocking DC from circuitry sensiti$e to non-/ero

a$erage $oltages or radio fre1uency de$ices.

The gi$en circuit shows an acti$e electronic implementation of a first order high pass

filter using an operational amplifier. &n this case, the filter has a passband gain of - R3

R2 and has a cutoff fre1uency of

f c1

2 πR2C 1

1

(2π 25 K 0.01 μ)

5.4 */

,I=,-PA$$ .ITER %IR%/IT

,I=,-PA$$ .ITER O/TP/T


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(AND-PA$$ .ITER

A band-pass filter is an electronic filter that passes signals with fre1uencies contained

in a bandwidth of certain fre1uencies and attenuates all other signals with fre1uencies

higher than and lower than bandwidth. The gi$en circuit shows an electronic

implementation of band-pass filter using op amp. The cutoff fre1uencies are gi$en by

lower cutoff fre1uency f c> and higher cutoff fre1uency f c4 . The lower cutoff fre1uency

is gi$en by

f c>1

2 πR5C 2

1

(2π 75 K 0.01 μ)

4>4.4> */

The higher cutoff fre1uency is gi$en by

f c41

2 πR4C 1

1

(2π 10 K 0.01 μ)

>. B*/

(AND-PA$$ .ITER %IR%/IT


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(AND-PA$$ .ITER O/TP/T

RE$/T: )ow-pass filter, high-pass filter and band-pass filter are $erified using op-

amps, resistors and capacitors.


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EXPERIMENT- >

Objective:- To design and #imulateof 4-stage class A amplifier.


T,EOR


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0-$TA=E %A$$ A AMPI.ER O/TP/T

RE$/T: The amplification of 4-#tage classA amplifier is performed usingtransistors, resistors and capacitors. The input signal is amplified.

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Ecs File.pdf