EC6411 CIRCUITS AND SIMULATION INTEGRATED · PDF fileshunt feedback amplifier, consider a common emitter stage with a resistance R’ ... EC 6411-CIRCUIT AND SIMULATION INTEGRATED

EC 6411-CIRCUIT AND SIMULATION INTEGRATED LABORATORY

DEPT.OF ECE CHENNAI INSTITUTE OF TECHNOLOGY

1

CHENNAI INSTITUTE OF TECHNOLOGY

DEPARTMENT OF ELECTRONICS COMMUNICATION AND

ENGINEERING

EC6411 CIRCUITS AND SIMULATION

INTEGRATED LABORATORY



2

EC6411 CIRCUITS AND SIMULATION INTEGRATED LABORATORY

CYCLE – I

DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS

1. Series and Shunt fedback amplifiers-Frequency response, Input and output impedance

Calculation

2. RC Phase shift oscilator and Wien Bridge Oscillator

3. Hartley Oscillator and Colpits Oscillator

4. Single Tuned Amplifier

5. RC Integrator and Diferentiator circuits

6. Astable and Monostable multivibrators

7. Clipers and Clampers

8. Fre runing Blocking Oscilators

CYCLE-II

SIMULATION USING SPICE (Using Transistor):

1. Tuned Colector Oscillator

2. Twin -T Oscilator /Wein Bridge Oscillator

3. Double and Stager tuned Amplifiers

4. Bistable Multivibrator

5. Schmit Triger circuit with Predictable hysteresis

6. Monostable multivibrator with emiter timing and base timing

7. Voltage and Curent Time base circuits



3

CIRCUIT DIAGRAM:

1. POSITIVE CLIPPER:

FIG.1.1

MODEL GRAPH:

FIG.1.2



4

1. CLIPPER AND CLAMPER CIRCUITS 1.1 AIM:

To construct and design the clipper and clamper circuits using diodes.

1.2 APPARATUS REQUIRED:

S.No APPARATUS RANGE QUANTITY

1 Resistors 1 k

1

2 RPS (0-30)V 1

3 Diode IN4007 1

4 CRO (0-

30)MHz

1

6 Function

generator

(0-

10)MHz

1

7 Capacitor 2.5 uf 2

8 Bread board - 1

1.3. DESIGN:

Given f=1 kHz,

T=t=1/f=1x10-3

sec=RC

Assume, C=1uF

Then, R=1K



5

2. NEGATIVE CLIPPER:

FIG.1.3

MODEL GRAPH:

FIG.1.4



6

1.4 THEORY

CLIPPER:

A Clipper is a circuit that removes either the positive or negative part of a

waveform. For a positive clipper only the negative half cycle will appear as output.

CLAMPER:

A Clamper circuit is a circuit that adds a dc voltage to the signal. A positive clamper

shifts the ac reference level upto a dc level.

WORKING:

During the positive half cycle, the diode turns on and looks like a short circuit

across the output terminals. Ideally, the output voltage is zero. But practically, the diode

voltage is 0.7 V while conducting.

On the negative half cycle, the diode is open and hence the negative half cycle

appear across the output.

APPLICATION:

Used for wave shaping

To protect sensitive circuits

1.5 PROCEDURE:

1. Connect as per the circuit diagram.

2. Set the signal voltage (say 5V, 1 KHz) using signal generator.

3. Observe the output waveform using CRO.

4. Sketch the output waveform.

.



7

CIRCUIT DIAGRAM:

1. CLAMPER CIRCUIT:

Positive clamper

FIG.1.5

MODEL GRAPH:

FIG.1.6



8

QUESTIONS:

1. What are the other names of clipper circuits?

2. What is combinational clipper?

3. Why clippers are used in TV receivers.

4. Give one application of clamper.

5. What are biased clipper and clamper?



9

CIRCUIT DIAGRAM:

2. Negative clamper:

FIG.1.7

MODEL GRAPH

FIG.1.8



10

1.6RESULT:

Thus the output waveform for Clipper and clamper was observed



11

CIRCUIT DIAGRAM:

1. INTEGRATOR:

FIG.2.1

MODEL GRAPH:

FIG.2.2



12

2. INTEGRATOR AND DIFFERENTIATOR

2.1 AIM:

To design and construct a differentiator and integrator circuit.


2.3 THEORY:

Differentiator:

Differentiator is a circuit which differentiates the input signal, it

allows high order frequency and blocks low order frequency. If time constant is

very low it acts as a differentiator. In this circuit input is continuous pulse with

high and low value.

Integrator:

In a low pass filter when the time constant is very large it acts as an

integrator. In this the voltage drop across C will be very small in comparison with

the drop across resistor R. So total input appears across the R.

2.4 PROCEDURE:

1. Connections are given as per the circuit diagram.

2. Set the signal voltage.

3. Observe the output waveform.

4. Sketch the output waveform.

S.No. APPARATUS RANGE QUANTITY

1. Function generator (0-30)MHz 1

2. CRO (0-30)MHz 1

3. Capacitor 1μf 1

4. Resistor 1KΩ 1

5. Bread board - 1



13

CIRCUIT DIAGRAM:

2. DIFFERENTIATOR:

FIG.2.3

MODEL GRAPH:

FIG.2.4



14

QUESTIONS:

1. What is wave shaping circuit?

2. What are the components used in wave shaping circuits.

3. When HPF acts as a differentiator

4. When LPF acts as an integrator.

5. How triangular waveform is obtained using integrator.

2.5 RESULT:

Thus the integrator and differentiator is constructed and output

waveform is observed.



15

CIRCUIT DIAGRAM:

1. Without feed back:

C1

1n

RC 3K

R5

1k

+10V

Rs

1k

VCC

CE

58uf

Vi5V

Q1Ci

66uf

R1

5K

R2

1.1K

FIG.3.1

TABULATION:

(Without feedback)

FREQUENCY OUTPUT

VO(V)

Vin(V) Gain

20log(Vo/Vin)

dB

TAB.3.1



16

3. VOLTAGE SHUNT FEEDBAK AMPLIFIER

3.1 AIM: To design and study frequency response of voltage shunt feedback amplifier.



1 AFO (0-1)MHz 1

2 CRO (0-20)V 1

3 Resistors 3k, 1.1 k,5k

2.5 k,1k,

1

4 Power supply (0-30)V 1

5 Transistors BC 107 1

6 Capacitors 66F, 30F,58 µf 1

3.3 Design example:

Given specifications:

VCC= 10V, IC=1.2mA, AV= 30, fI = 1 kHz, S=2, hFE= 150, β=0.4

The feedback factor, β= - 1/RF= +1/0.4=2.5KΏ

(i) To calculate RC:

The voltage gain is given by,

AV= -hfe (RC|| RF) / hie

h ie = β re

re = 26mV / IE = 26mV / 1.2mA = 21.6

hie = 150 x 21.6 =3.2K

Apply KVL to output loop,

VCC= IC RC + VCE+ IE RE ----- (1)

Where VE = IE RE (IC= IE)

VE= VCC / 10= 1V

Therefore RE= 1/1.2x10-3=0.8K= 1KΏ

VCE= VCC/2= 5V

From equation (1), RC= 3 KΏ

(ii) To calculate R1&R2:

S=1+ (RB/RE)

RB= (S-1) RE= R1 || R2 =1KΏ

RB= R 1R2 / R1+ R2------- (2)

VB= VBE + VE = 0.7+ 1= 1.7V

VB= VCC R2 / R1+ R2 ------- (3)

Solving equation (2) & (3),

R1= 5 KΏ & R2= 1.1KΏ



17

WITH FEEDBACK:

FIE.3.2

TABULATION:

(With feedback)

FREQUENCY OUTPUT

VO(V)

Vin(V) Gain

20log(Vo/Vin)

dB

TAB.3.2



18

(iii) To calculate Resistance:

Output resistance is given by,

RO= RC || RF

RO= 1.3KΏ

input impedance is given by,

Ri = (RB|| RF) || hie = 0.6KΏ

Trans-resistance is given by,

Rm= -hfe (RB|| RF)( RC || RF) / (RB|| RF)+ hie

Rm= 0.06KΏ

AC parameter with feedback network:

(i) Input Impedance:

Rif = Ri /D (where D= 1+β Rm)

Therefore D = 25

Rif= 24

Input coupling capacitor is given by,

Xci= Rif / 10= 2.4 (since XCi << Rif)

Ci = 1/ 2пfXCi =66µf

(ii) Output impedance:

ROf= RO/ D = 52

Output coupling capacitor:

XCO= Rof /10= 5.2

CO = 1/ 2пfXCO= 30µf

(iii) Emitter capacitor:

XCE << R’E = R’/10

R’E= RE|| ( hie +RB) / (1+hfe)

XCE= 2.7

Therefore CE= 58µf



19

MODEL GRAPH:

FIG.3.3



20

3.4 THEORY:

Negative feedback in general increases the bandwidth of the transfer

function stabilized by the specific type of feedback used in a circuit. In Voltage

shunt feedback amplifier, consider a common emitter stage with a resistance R’

connected from collector to base. This is a case of voltage shunt feedback and

we expect the bandwidth of the Trans resistance to be improved due to the

feedback through R’. The voltage source is represented by its Norton’s

equivalent current source Is=Vs/Rs.

3.5 PROCEDURE:

1. Connect the circuit as per the circuit diagram.

2. Set VCC = 10V; set input voltage using audio frequency oscillator.

3. By varying audio frequency oscillator take down output frequency oscillator

voltage for difference in frequency.

4. Calculate the gain in dB

5. Plot gain Vs frequency curve in semi-log sheet.



8. By varying audio frequency oscillator take down output frequency oscillator

voltage for difference in frequency.



11. Compare this response with respect to the amplifier without feedback.



21

QUESTIONS:

1. Compare the bandwidth of feedback amplifier.

2. Give the stability of gain with feedback.

3. Which sampling and mixing network is used in Voltage shunt feed back

amplifier,

4. Calculate the input impedance for with feed back.

5. What type of feedback is used in amplifier?



22

3.6 RESULT:

Thus voltage shunt feedback amplifier is designed and studied its

performance.



23

CIRCUIT DIAGRAM: 1. without feed back:

FIG.4.1

TABULATION :( Without feedback)

Vin = ----- (V)

TAB.4.1

FREQUENCY OUTPUT

VO(V) Gain

20log(Vo/Vin) dB



24

4. CURRENT SERIES FEEDBACK AMPLIFER

4.1 AIM:

To design a negative feedback amplifier, and to draw its frequency response.



1 AFO (0-1)MHz 1

2 CRO (0-20)MHz 1

3 Resistors 1.5 K,6KΏ,2K,

14k,2.3K,10K

Each one

4 Power supply (0-30V) 1

5 Transistors BC 107 1

6 Capacitors 28F, 10F,720F 1

4.3 Design examples:

VCC= 15V, IC=1mA, AV= 30, fL= 50Hz, S=3, hFE= 100, hie= 1.1KΏ

Gain formula is,

AV= - hFE RLeff / hie

Assume, VCE = VCC / 2 (transistor in active region)

VCE = 15 /2=7.5V

VE = VCC / 10= 15/10=1.5V

Emitter resistance is given by, re =26mV/ IE

Therefore re =26 Ώ

hie= hfe re

hie =2.6KΏ

(i) To calculate RC:

Applying KVL to output loop,

VCC= IC RC + VCE+ IE RE ----- (1)

Where RE = VE / IE (IC= IE)

RE = 1.5 / 1x10-3= 1.5KΏ

From equation (1),

RC= 6KΏ

(ii) To calculate RB1&RB2:

Since IB is small when compared with IC,

IC ~ IE

VB= VBE + VE= 0.7 + 1.5=2.2V

VB= VCC (RB2 / RB1+ RB2) ----- (2)

S=1+ (RB / RE)



25

WITH FEEDBACK:

Fig.4.2

TABULATION:

Vin = ----- (V)

TAB.4.2

RB= 2KΏ

FREQUENCY OUTPUT

VO(V) Gain

20log(Vo/Vin) dB



26

We know that RB= RB1|| RB2

RB= R B1RB2/ RB1+RB2--------- (3)

Solving equation (2) & (3),

Therefore,

RB1 = 14KΏ

From equation (3), RB2= 2.3KΏ

(iii) To find input coupling capacitor (Ci):

XCi = (hie|| RB) / 10

XCi = 113

XCi= 1/ 2пf Ci

Ci = 1 / 2пf XCi

Ci = 1/ 2X3.14X 50 X 113=28µf

(iv)To find output coupling capacitor (CO):

XCO= (RC || RL) / 10, (Assume RL= 10KΏ)

XCO= 375

XCO= 1/ 2пf CO

CO = 1/ 2x 3.14x 50 x 375=8µf =10 µf

(v) To find Bypass capacitor (CE):

(Without feedback)

XCE = (RB+hie / 1+ hfe) || RE/ 10

XCE = 4.416

CE= 1 / 2пf XCE

CE = 720 µf

Design with feedback:

To design with feedback remove the bypass capacitor (CE).

Assume RE = 10KΏ

4.4 THEORY

Negative feedback in general increases the bandwidth of the transfer

function stabilized by the specific type of feedback used in a circuit. In

Voltage series feedback amplifier, consider a common emitter stage

with a resistance R’ connected from emitter to ground. This is a case

of voltage series feedback and we expect the bandwidth of the trans

resistance to be improved due to the feedback through R’.The voltage

source is represented by its Norton’s equivalent current source

Is=Vs/Rs.



27

MODEL GRAPH:

FIG.4.3



28

4.5 PROCEDURE:



3. By varying audio frequency oscillator take down output frequency

oscillator voltage for difference in frequency.



QUESTIONS:

1. What is feedback?

2. what are the parameters used to design the amplifier.

3. Compare the input impedance for with and without feedback?

4. Compare the theorical and practical bandwidth for with feedback.

5. Calculate the value of output impedance with and without feed back.



29

4.6.RESULT:

Thus current series feedback amplifier is designed and studied its

performance.



30

BI-POLAR JUNCTION TRANSISTOR

CIRCUIT DIAGRAM:

FIG.5.1

MODEL GRAPH:

FIG.5.2

Amplitude (V)

Time (sec)



31

. RC PHASE SHIFT OSCILLATOR 5.1 AIM:

To design a RC phase shift oscillator and to find the frequency of

oscillation.


S.

No

APPARATUS

REQUIRED

RANGE QUA

NTIT

Y

1 Resistors 7.5k

1.4 k

4.8 k

1.2 k,19K,

6.5K

1

1

1

1

3

2 Power supply (0-30)V 1

3 Transistor BC107 1

4 Capacitors 1.3f

,2.1f,1.3f

0.01F

1

1

3

5 CRO (0-30)MHz 1

6 Bread board - 1

5.3 Design Example:

Specifications:

VCC = 12V, ICq =1mA, =100, Vceq = 5V, f=1 KHz, S=10, C=0.01 µf,

hfe= 330, AV= 29

Design:

(i)To find R:

Assume f=1 KHz, C=0.01µf

f=1/2∏ RC 6

R=1/2x3.14 6 x1x103x0.01x10

-6=6.5KΩ

Therefore R=6.5KΩ

(ii)To find RE & RC:

VCE = VCC /2 = 6V

re= 26mV / IE= 26

hie = hfe re= 330 x 26= 8580

On applying KVL to output loop,

VCC=ICRC + VCE + IERE ----- (1)

VE = IE RE



32

TABULATION:

TAB.5.1

RE = VE / IE =1.2/ 10-3

=1.2K

From equation (1), 12= 10-3

(RC+ 1200) +6= RC= 4800=4.8K

(iii)To calculate R1 & R2:

VBB= VCC R2 / R1+ R2 ------ (2)

VB= VBE +VE = 0.7+12 =1.9V

From equation (2), 1.9= 12 R2 / R1+ R2

R2 / R1+ R2= 0.158 -------- (3)

S = 1+ RB / RE= RB = 1.2K

RB =R1 || R2

0.15R1= 1.2x10-3

=7.5K

R2 =0.158 R1 + 0.158 R2, R2= 1.425K

(iv)To calculate Coupling capacitors:

(i) XCi= [hie + (1+hfe) RE] || RB / 10 = 0.12K XCi= 1 / 2∏ f Ci == 1.3f

(ii) XCO= RLeff / 10 [ AV = - hfe RLeff / hie]

RLeff = 0.74K, XCO=0.075 K

XCO= 1 / 2∏ f CO , CO = 2.1f

(iii) XCE= RE / 10 = 1.326 f

XCE = 1 / 2∏ f CE=49.27f

(iv) Feed back capacitor, XCF = Rf / 10

Cf = 0.636f = 0.01f

Amplitude

(V)

Time period

(msec)

Frequenc

y (Hz)



33

5.4 THEORY:

The low frequencies RC oscillators are more suitable. Tuned

circuit is not an essential requirement for oscillation. The essential

requirement is that there must be a 180o

phase shift around the feedback

network and loop gain should be greater than unity. The 180o

phase shift in feedback signal can be achieved by suitable RC network.

5.5 PROCEDURE:


2. Set VCC = 15V.

3. For the given supply the amplitude and time period is measured

from CRO.

4. Frequency of oscillation is calculated by the formula f=1/T

5. Amplitude Vs time graph is drawn.

REVIEW QUESTIONS:

1. What is an oscillator?

2. What is barkhausen criterion for oscillation?

3. Which feedback is used in oscillators?

4. Give the frequency of oscillation for RC-phase shift oscillator?

5. Give the disadvantages of phase shift oscillator.



34

5.6 RESULT:

Thus the RC-phase shift oscillator is designed and constructed for

the given frequency.

Theoretical frequency :

Practical frequency :



35

CIRCUIT DIAGRAM:

FIG.6.1

MODEL GRAPH:

Amplitude (V)

Time (msec)

FIG.6.2



36

6. HARTLEY OSCILLATOR

6.1 AIM:

To design and construct a Hartley oscillator at the given operating

frequency



1 Resistors 2k

1K

100 k

22k

1

1

1

1

2 RPS (0-30)V 1


4 Capacitors 3.2nf

0.1F

0.01F

1

1

2

5 Inductor 10mH 2

6 CRO 30MHz 1

7 Bread board - 1

6.3Design Example:

Design of feed back Network:

Given L1= L2=10mH, f=20 KHz, VCC=12V, IC=3mA, S=12

f = 1/2∏ CLL )21(

C= 3.2nf

Amplifier design:

(i) Selection of RC:

Gain formula is,

AV= - hfe RLeff / hie

Assume VCE=VCC/2 (Transistor active)

VCE= 12/2= 6V

VE=IERE= VCC/10=1.2V

VCC=ICRC + VCE + IERE

RC= (VCC- VCE -IERE) / IC

Therefore RC = 1.6K=2 K



37

TABULATION:

Amplitude(V) Time(msec) Frequency(Hz)

TAB.6.1

(ii) Selection of RE:

IC= IE=3mA

RE= VE/IE

RE= 1.2 / 3x10-3

=400 =1K

(iii) Selection of R1 & R2:

Stability factor S=12

S=1+ (RB/ RE)

12=1+ (RB/1x103)

RB=11K

Using potential divider rule,

RB=R1R2 / R1+R2 & VB= (R2/ R1+R2) VCC

RB /R1= R2/ R1+R2

Therefore RB/R1= VB/VCC

VB=VBE+ VE= 0.7+1.2=1.9V=2V

R1= (VCC/ VB )RB

R1= (12/2)x 11x103=66K=100K

VB/VCC =R2 / R1+R2

2/ 12=R2 / 100x103+R2

(100x103)+R2=R2/0.16=19K

R2=19K=22 K



38

(iv)Output capacitance (CO):

XCO=RC/10=2x103/10=200

1/2∏fCO=200

CO=1/2x3.14x20x103x200

CO=0.039=0.01µf

(v) Input capacitance (Ci):

XCin= RB/10=11x103/10=1.1x10

3

1/2∏fCin=1.1x10

3

Cin=1/2x3.14x20x103x1.1x10

3

Cin= 0.007=0.01µf

(vi) By pass Capacitance (CE):

XCE=RE/10=1x103/10=100

1/2∏fCE=100

CE= 1/2x3.14x20x103x100

CE = 0.079µf = 0.1µf

6.4 THEORY:

Hartley oscillator is very popular and is commonly used as

local oscillator in radio receivers. The collector voltage is applied to

the collector through inductor L whose reactance is high compared

with X2 and may therefore be omitted from equivalent circuit, at zero

frequency, however capacitor Cb acts as an open circuit.

QUESTIONS: 1. How does an oscillator differ from an amplifier?

2. What is the approximate value of hfe in a Hartley oscillator using BJT?

3. Mention the expression for frequency of oscillation?



39

4. Mention the reasons why LC oscillator is preferred over RC oscillator at

radio frequency?

5. How the Hartley oscillator satisfy the barkhausen criterion

6.5 PROCEDURE:


2. Set VCC = 12V.


from CRO.


5. Verify it with theoretical frequency, f= 1/2∏ ( CLL )21( )


6.6 RESULT:

Thus the Hartley oscillator is designed and constructed for the

given frequency.





40

CIRCUIT DIAGRAM:

FIG.7.1

MODEL GRAPH:

Amplitude (V)

Time (msec)

FIG.7.2



41

7. COLPITT’S OSCILLTOR 7.1 AIM:

To design and construct a Colpitt’s oscillator at the given operating

frequency.



1 Resistors 2k

1K

100 k

22k

1

1

1

1

2 RPS (0-30)V 1


4 Capacitors 0.1F

0.01F

1

1

5 Inductor 10mH 1

6 CRO 30MHz 1

7 Bread board - 1

7.3 Design of feed back Network:

Given C1= 0.1 F, L=10mH, f=20 KHz, VCC=12V,IC=3mA, S=12

f = 1/2∏21

21

CLC

CC , C2= 0.01F

Amplifier design:

(i)Selection of RC:

Gain formula is,

AV= - hfe RLeff / hie

Assume VCE=VCC/2 (Transistor active)

VCE= 12/2= 6V

VE=IERE= VCC/10=1.2V

VCC=ICRC + VCE + IERE

RC= (VCC- VCE -IERE) / IC

Therefore RC= 1.6K=2 K

(ii) Selection of RE:

IC= IE=3mA

RE= VE/IE= 1K



42

TABULATION:

Amplitude(V) Time( msec ) Frequency(Hz)

TAB.7.1



43

(iii) Selection of R1 & R2:

Stability factor S=12

S=1+(RB/ RE)

12=1+ (RB/1x103)=11k

Using potential divider rule,

RB=R1R2 / R1+R2 & VB= (R2/ R1+R2) VCC

RB /R1= R2/ R1+R2

Therefore RB/R1= VB/VCC

VB=VBE+ VE= 0.7+1.2=1.9V=2V

R1= (VCC/ VB ) RB=66K=100K

VB/VCC =R2 / R1+R2

2/ 12=R2 / 100x103+R2

R2=19K=22 K

(iv) Output capacitance (CO):

XCO=RC/10=2x103/10=200

1/2∏fCO=200

CO=1/2x3.14x20x103x200=0.039=0.01µf

(v) Input capacitance (Ci):

XCin= RB/10=11x103/10=1.1x10

3

1/2∏fCin=1.1x10

3

Cin=1/2x3.14x20x103x1.1x10

3=0.0101µf

(vi) By pass Capacitance (CE):

XCE=RE/10=1x103/10=100

1/2∏fCE=100

CE= 1/2x3.14x20x103x100=0.079µf = 0.1µf

7.4 THEORY:

Colpitt’s oscillator is very popular and is commonly used as

local oscillator in radio receivers. The collector voltage is applied to the

collector through inductor L whose reactance is high compared with X2

and may therefore be omitted from equivalent circuit, at zero frequency;

The circuit operates as Class C. the tuned circuit determines basically the

frequency of oscillation.



44

QUESTIONS:

1. What is the approximate value of hfe in a colpitt’s oscillator using BJT for

sustained oscillation?

2. What is Tank circuit?

3. Mention the expression for frequency of oscillation?

4. What are the essential parts of an oscillator?

5. Name two high frequency oscillators?



45

7.5 PROCEDURE:


2. Set VCC = 12V.


from CRO.


5 .Amplitude Vs time graph is drawn.

7.6 RESULT:

Thus the colpitt’s oscillator is designed and constructed for

the given frequency.





46

CIRCUIT DIAGRAM:

FIG.8.1

TABULATION:

TAB.8.1

Amplitude(V) Time

period(msec)



47

8. EMITTER COUPLED ASTABLE MULTIVIBRATOR

8.1 AIM:

To design an Emitter coupled Astable multivibrator and study the

output waveform.



1 Resistors 4.7k

470k

2

2

2 RPS (0-30)V 1


4 Capacitors 0.01F

2

5 CRO (0-30)MHz 1

6 Bread board - 1

8.3 Design example:


VCC= 10V; hfe = 100; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v;

To design RC:

R ≤ hFE RC

RC= VCC- VC2 (Sat) / IC= 4.9 k

Since R ≤ hFE RC

Therefore R≤ 100 x 4.7 x103=490 k 470 k

To Design C:

Since T= 1.38RC

1x10-3

=1.38x 490x103x C

Therefore C=0.01F



48

MODEL GRAPH:

FIG.8.2



49

8.4. THEORY:

The astable multivibrator generates square wave without any

external triggering pulse. It has no stable state, i.e., it has two quasi-

stable states. It switches back and forth from one stable state to other,

remaining in each state for a time depending upon the discharging of a

capacitive circuit.

When supply voltage + Vcc is applied, one transistor will

conduct more than the other due to some circuit imbalance.

8.5 PROCEDURE:


2. Set VCC = 5V.


from CRO.



QUESTIONS:

1. What is meant by multivibrator?

2. What is the frequency of oscillation of astable multivibrator?

3. Distinguish oscillator and multivibrator?



50

4. List the applications of astable multivibrator.

5. Why it is called as free running multivibrator.

8.6 RESULT:

Thus the astable multivibrator is designed and output waveform is plotted.



51

CIRCUIT DIAGRAM:

FIG.9.1

TABULATION:

TAB.9.1

Amplitude(V) Time period(msec)

TON TOFF



52

9. MONOSTABLE MULTIVIBRATOR

9.1 AIM:

To design and test the performance of Monostable multivibrator

for the given frequency.



1 Resistors 5.9 k

452 k,

100 k

10K

2

1

1

1

2 RPS (0-30)V 1


4 CRO (0-30)MHz 1

5 Capacitor 3.2nf

25pf

1

1

6 Bread board - 1

9.3 Design Example:


VCC= 12V; hfe = 200; f=1 KHz; I c = 2mA; Vce (sat) = 0.2v; VBB= - 2V,

(i)To calculate RC:

RC = VCC - Vce (sat) / IC

RC = 12 – 0.2 / 2x10-3

=5.9KΩ

(ii) To calculate R:

IB2(min)=IC2 / hfe= 2x10-3

/ 200 = 10µ A

Select IB2 > IB1(min) (say 25µ A)

Then R = VCC – V BE (sat) / IB2

Therefore R= 12-0.7/25x10-6

=452KΩ

(iii) To calculate C:

T=0.69RC

1x10-3

= 0.69x452x103xC

C=3.2nf



53

MODEL GRAPH:

FIG.9.2



54

To calculate R1 & R2:

VB1= (VBB R1/ R1 +R2) + (VCE (sat) R2 / R1+R2)

Since Q1 is in off state ,VB1 ≤ 0

Then (VBB R1/ R1 +R2) = (VCE (sat) R2 / R1+R2)

VBB R1 = VCE (sat) R2

2 R1 = 0.2 R2

Assume R1=10KΩ, then R2=100 KΩ

Consider, C1= 25pf (commutative capacitor)

9.4 THEORY:

The monostable multivibrator has one stable state when an

external trigger input is applied the circuit changes its state from stable to

quasi stable state. And then automatically after some time interval the

circuit returns back to the original normal stable state. The time T is

dependent on circuit components.

The capacitor C1 is a speed-up capacitor coupled to base of Q2

through C.Thus DC coupling in bistable multivibrator is replaced by a capacitor

coupling. The resistor R at input of Q2 is returned to VCC.

The value of R2 , V BB are chosen such that transistor Q1 is off

by reverse biasing it. Q2 is on. This is possible by forward biasing Q2

with the help of VCC and resistance R. Thus Q2-ON and Q1-OFF is

normal stable state of circuit.

9.5 PROCEDURE:


2. Give a negative trigger input to Q2.

3. Note the output of transistor Q2 and Q1.

4. Find the value of Ton and Toff.



55

QUESTIONS:

1. Give the other names of monostable multivibrator?

2. What is the use of commutating capacitor?

3. What is the frequency of oscillation of monostable multivibrator?

4. Why it is called as one-shot multivibrator?

5. List the applications of mono stable multivibrator.

9.6 RESULT:

Thus the monostable multivibrator is designed and the

performance is tested.

Theoretical period :

Practical period :



56

CIRCUIT DIAGRAM:

FIG.10.1

TABULATION:

TAB.10.1

Amplitude(V) Time period(msec)



57

10. BISTABLE MULTIVIBRATOR

10.1 AIM:

To design a bi-stable multivibrator and study the output waveform



1 Resistors 5.9 k

100 k

10K

2

2

1

2 RPS (0-30)V 1


4 CRO (0-30)MHz 1

5 Capacitor 50pf 2

6 Bread board - 1

10.3 Design Example:


VCC =12V,VBB = - 12V, IC= 2mA , VC(Sat) = 0.2V, VBE(Sat)= 0.7V, hfe=200

Assume Q1 is cut off, i.e. VC1= VCC (+12V)

Q2 is saturation (ON), i.e.VC2= VC (Sat) (0.2V)

Using superposition principle,

VB1 = [VBB ( R1/ R1+R2) + VC2(R2 / R1+R2)] << 0.7

Consider VB1= -1V

-1= (-12R1 / R1+ R2) + (0.2 R2 / R1+R2) -------- (1)

To calculate RC:

IC = VCC – VC2 / RC

RC = VCC – VC2 / IC = 12-0.2 / 2x10-3

= 5.9K



58

MODEL GRAPH:

FIG.10.2



59

To calculate R1 & R2:

Assume, R1 = 10K

By using inequality, R1 < hfe RC

R2= 91.67k= 100k [Using equation (1)]

Since IB2 > IB2(min) , Q2 is ON

Choose Capacitor C1= 25pf (commutative capacitor)

10.5 PROCEDURE:

1. Connect the circuit as per the circuit diagram

2. Switch on the regulated power supply and observe the output

waveform at the collector of Q1 and Q2.

3. Sketch the waveform.

4. Apply a threshold voltage of VT (pulse voltage) and observe the

changes of states of Q1 and Q2

5. Sketch the waveform



60

QUESTIONS:

1. Define storage time of bistable multivibrator?

2. What are the different types of triggering of bistable multivibrator?

3. List the application of bistable multivibrator.

4. What is the use of triggering in bistable multivibrators?

5. Give the differences between three multivibrators.

10.6 RESULT:

Thus the bistable multivibrator is designed and the

performance is tested.



61

CIRCUIT DIAGRAM:

FIG11.1

MODEL GRAPH:

FIG.11.2



62

11. SINGLE TUNED AMPLIFIER

11.1 AIM:

To design a single tuned amplifier and to draw its frequency

response.


11.3

DESIGN EXAMPLE:

Given specifications

Vcc = 12V, β = 100, Ic = 1mA, L=1mH, f=2 KHz, S= [2-10]

Assume, VCE = VCC / 2=6V

VE = VCC / 10 =1.2V

To calculate C:

F = 1/ 2∏ LC

Therefore C=0 .6μf

To calculate RE:

VE= IE RE (IC= IE)

RE = VE / IE= 1.2 / 1x10-3

= 1.2K

Assume S= 10, S= 1+ (RB / RE)

Therefore RB= 10K

To find R1 & R2:

RB = R1 || R2

RB= R1 R2 / R1+ R2 ------------- (1)

VB= VCC x (R2 / R1+ R2) ------ (2)

S.No

APPARATUS RANGE QUANTITY

1 Resistors 10k

63 k

1.2k

10 k

1

1

1

2

2 RPS (0-30)V 1


4 Capacitors 0.1μf ,0.6μf

1 μf , 0.01 μf

Each one

5 CRO (0-30)MHz 1

6 Function generator (0-10)MHz 1

7 Bread board - 1



63

TABULATION:

V in= ------- (V)

TAB.11.1

FREQUENCY OUTPUT

VO(V)

Vin (V) Gain

20log(Vo/Vin) dB



64

From equation 1 & 2

RB / R1 = VB/ VCC --------------- (3)

VB = VBE + VE (VBE= 0.7)

VB= 0.7 + 1.2 = 1.9V

Substitute values in equation 3, R1 = 63K

From equation 2 , R2= 11K≈ 10K

To calculate coupling capacitors:

(i)Input capacitance (Ci):

XCi = [ hie + (1+ hfe)RE] || RB /10 (OR) RB /10

XCi = 100

XCi = 1/ 2∏fCi Therefore Ci = 0.7 μf ≈ 1μf

(ii) Output capacitance ( CO):

XCO = RC || RL / 10 ≈ RL / 10

XCO = 1000 [since RL= 10K]

XCO= 1/ 2∏fCO CO = 0.0796 μf ≈ 0.1 μf

(iii) Bypass capacitance (CE):

XCE = RE/ 10

XCE= 120

XCE= 1/ 2∏fCE CE = 0.06 μf≈ 0.01 μf

11.4 THEORY:

The single tuned amplifier selecting the range of frequency the

resistance load replaced by the tank circuit. Tank circuit

is nothing but inductors and capacitor in parallel with each other.

The tuned amplifier gives the response only at particular

frequency at which the output is almost zero. The resistor R1 and R2

provide potential diving biasing, Re and Ce provide the thermal

stabilization. This it fixes up the operating point.

11.5 PROCEDURE:

1. Connections are given as per the circuit diagram

2. By varying frequency, amplitude is noted down

3. Gain is calculated in dB

4. Frequency response curve is drawn.



65

QUESTIONS:

1. Define Q-factor?

2. What is tuned circuit?

3. What is coil loss?

4. Give the application of Single tuned Class-C amplifier

5. What is tank circuit?

11.6 RESULT:

Thus the class – c single tuned amplifier is designed and

frequency response is plotted.



66

CIRCUIT DIAGRAM:

FIG.12.1

TABULATION:

TAB.12.1

Amplitude(V) Time(msec)



67

12. WEIN- BRIDGE OSCILLATOR

12.1 AIM: To design a Wein-bridge oscillator using transistors and to find the frequency

of oscillation.


S.No APPARATUS REQUIRED RANGE QUANTITY

1 Resistors 33 k

1.5 k

15 k

1

1

1

1

2 Power supply 5V 1

3 Opamp IC147 1

4 Capacitors 0.1F

2

5 CRO 1

6 Bread board 1

12.3 Design Example:

Assume f=1 KHz, C=0.1µf

f = 1/ 2∏RC

R= 1/2∏fC

R =1/2x3.14x1x103x0.1x10

3

R= 1.59KΩ

To calculate R1:

R1= 10R

R1 =10x1.5K

R1 =15.9KΩ

To calculate Rf (Feed back resistor):

Rf = 2R1

Rf = 2(15.9x103)=31.8KΩ ≈ 33KΩ



68

MODEL GRAPH:

FIG.12.2

12.4 THEORY:

Generally in an oscillator, amplifier stage introduces 180o phase shift and

feedback network introduces additional 180o

phase shift, to obtain a phase shift of

360o around a loop. This is a condition for any oscillator. But Wein bridge oscillator uses

a non-inverting amplifier and hence does not provide any phase shift during amplifier

stage. As total phase shift requires is 0o

or 2n radians, in Wein bridge type no phase

shift is necessary through feedback. Thus the total phase shift around a loop is 0o.

The output of the amplifier is applied between the terminals 1 and 3, which

are the input to the feedback network. While the amplifier input is supplied from the

diagonal terminals 2 and 4, which is the output from the feedback network. Thus

amplifier supplied its own output through the Wein bridge as a feed back network.

The two arms of the bridge, namely R1, C1 in series and R2, C2 in parallel are

called frequency sensitive arms. This is because the components of these two arms

decide the frequency of the oscillator. Advantage of Wein bridge oscillator is that by

varying the two-capacitor values simultaneously, by mounting them on the common

shaft, different frequency ranges can be provided.

12.5 ROCEDURE:


2. Set VCC = 5V.

3. For the given supply the amplitude and time period is measured from CRO.



Amplitude (V)

Time (sec)



69

QUESTIONS:

1. Give the condition for maximum oscillation.

2. What is the frequency of oscillation under balanced condition?

3. In which way high gain is obtained in wein bridge oscillator.

4. How to improve the amplitude stability of output waveform.

5. What is the frequency of oscillation?

12.6 RESULT:

Thus the Wein – bridge oscillator is designed for the given frequency of

oscillation.





70

SIMULATION USING PSPICE



71

CIRCUIT DIAGRAM:

FIG.1.1

MODEL GRAPH:

FIG.1.2



72

1. ASTABLE MULTIVIBRATOR

1.1 AIM:

To simulate an astable multivibrator using PSPICE

1.2APPARATUS REQUIRED:

1. PC

2. PSPICE software

1.3 THEORY:

Astable multivibrator has two states and both states are quasi states

without giving any external trigger pulse, so this multivibrator is also

called as free running multivibrator, it is used to generate square wave

oscillations. It can be operated as an oscillator over wide range of audio

and radio frequencies. Used as voltage frequency converter and in pulse

synchronization as clock for binary logic signal.

1.4 PROCEDURE:

1. Click on the start menu and select the pspice simulation software

2. Select the parts required for the circuit from the parts menu and place

them in the work space

3. Connect the parts using wires

4. Save the file and select the appropriate analysis

5. Simulate the circuit and observe the corresponding output waveforms



73

QUESTIONS:

1. What is PSpice?

2. What is the use of Pspice?

3. What are the different types of analysis done using Spice?

4. List the limitation of Pspice

5. What are the different output commands?



74

1.5 RESULT:

Thus the astable multivibrator is simulated using PSpice.



75

CIRCUIT DIAGRAM:

FIG.2.1

MODEL GRAPH:

FIG.2.2



76

2. MONO STABLE MULTIVIBRATOR

2.1 AIM:

To simulate an monostable multivibrator using PSPICE


1. PC

2. PSPICE software

2.3 THEORY:

Monostable multivibrator is an electronic circuit which has

one stable state and one quasi stable state. It needs external pulse to

change their stable state to quasi state and return back to its stable state

after completing the time constant RC. Thus the RC time constant

determines the duration of quasi state. Also called as one-shot, single shot

and one swing multivibrator.Used as triggering circuit for some circuits

like timer circuit, delay circuits etc.

2.4 PROCEDURE:


2. Select the parts required for the circuit from the parts menu and

place them in the work space



5. Simulate the circuit and observe the corresponding output

waveforms



77

QUESTIONS:

1. Give the other names of monostable multivibrator?

2. What is the use of commutating capacitor?

3. What is the frequency of oscillation of monostable multivibrator?

4. Why it is called as one-shot multivibrator?

5. List the applications of mono stable multivibrator.

2.5 RESULT:

Thus the monostable multivibrator is simulated using PSpice .



78

CIRCUIT DIAGRAM:

FIG.3.1

MODEL GRAPH:

FIG.3.2



79

3. BI-STABLE MULTIVIBRATOR

3.1 AIM:

To simulate an Bi-stable multivibrator using PSPICE


1. PC

2. PSPICE software

3.3 THEORY:

Bi- stable multivibrator contains two stable states and no quasi

states. It requires two clock or trigger pulses to change the states. It is also

called as flip flop, scale of two toggle circuit, trigger circuit. It is used in digital

operations like counting, storing data’s in flip flops and production of square

waveforms.

\

3.4 PROCEDURE:


2. Select the parts required for the circuit from the parts menu and place

them in the work space



5. Simulate the circuit and observe the corresponding output waveforms



80

QUESTIONS:

1. Define storage time of bistable multivibrator?

2. What are the different types of triggering of bistable

multivibrator?

3. List the application of bistable multivibrator.

4. What is the use of triggering in bistable multivibrators?

5. Give the differences between three multivibrators.

3.5 RESULT:

Thus the Bi-stable multivibrator is simulated using PSpice.



81

CMOS

CIRCUIT DIAGRAM:

FIG.4.1

MODEL GRAPH:



82

FIG.4.2

4. CMOS INVERTER

4.1 AIM:

To simulate an CMOS inverter using PSPICE


1. PC

2. PSPICE software

4.3 THEORY:

CMOS-Complementary metal oxide semiconductor.it uses

one pmos and nmos connected together in complementaryto the

another.any number of circuits can be designed using CMOS.input is

commonly given to the base and due to the circuit nconnection output

of a CMOS is inverted.

4.4 PROCEDURE:







waveforms



83

QUESTIONS:

1. What is the advantage of CMOS over NMOS and PMOS?

2. What are different types of CMOS inverter?

3. What is the current CMOS technology?

4. List the CMOS parameters.

5. Give the applications of CMOS.

4.5 RESULT:

Thus the CMOS inverter is simulated using PSpice.



84

CIRCUIT DIAGRAM:

FIG.5.1

MODEL GRAPH:

FIG.5.2



85

5. ANALOG MULTIPLIER

5.1 AIM:

To simulate an Analog multivibrator using PSPICE


1. PC

2. PSPICE software

5.3 THEORY:

Anolog multiplier is used to multiply two input singal.if a

input is given to a log amplifier an dthe output can be taken in the

antilog amplifier.it is the simple way to test the multiplied signal.in this

circuit it is designed using Ic.input is given to the terminals of two Ic’s

and output is taken across . It is similar to log and antilog operation.

5.4 PROCEDURE:

1. Click on the start menu and select the p spice simulation software






waveforms



86

QUESTIONS:

1. Draw the analog multiplier circuit using log and antilog.

2. Give the effect of output using log and antilog amplifiers.

3. Give the applications of analog multiplier.

4. Give the advantage of analog multiplier.

5. What are the circuits used to multiply two inputs.

5.5 RESULT:

Thus the analog multivibrator is simulated using PSpice.



87

CIRCUIT DIAGRAM:

FIG.6.1

MODEL GRAPH:

FIG.6.2



88

6. BUTTER WORTH FILTER

6.1 AIM:

To simulate a second order active low pass butter worth filter

using PSPICE


1. PC

2. PSPICE software

6.3 THEORY:

A second order filters can be constructed using RC-(resistor-

capacitor) passive circuits, and they have been implemented for radio

frequency for cheap and simplicity. For audio frequency range,

unfortunately the size for the inductor and capacitor become too large,

space consuming, and the most important is they’re really expensive.

Because of this, active filter is commonly used for audio application.

6.4 PROCEDURE:

1. Click on the start menu and select the p spice simulation software






waveforms



89

QUESTIONS:

1. Calculate the cutoff frequency from the graph.

2. What is butter worth filter?

3. How second order varies from first order.

4. What is active filter?

5. Give the application of second order filter.

6.5 RESULT:

Thus the second order active low pass butter worth filter is simulated using

PSpice.

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