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EC410 A2 Fall 2012 Final Name: ____________________________
UID: ____________________________
Relevant Equations
Diode:ID= I
S! e
VD /!VT( )"1( )
VT = Thermal Voltage
VT =kT
q! 25mV@300C
Approx. npn BJT DC Values:VBE(ACTIVE) = 0.7 VVCE(SAT) = 0.2
V
n-type MOSFET (cut-off):
VGS
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Problem 1-4 [10 points each]
1) [10 points] For the circuit below, find the voltage V2 that
ensures that all diodes (D1, D2, and D3)are on (forward-biased) and
also find the current flowing through each diode. Assume the
diodesare ideal.
2) [10 points] Real op-amps have non-idealities that limit their
functionality. Below is a non-exhaustive list of these
non-idealities. Create a circuit that is affected by a
non-ideality. Be sure togive a concise description of the
non-ideality and the circuit.
Unity-Gain Bandwidth Slew-Rate Input Bias Current Finite Output
Resistance Input-Offset Voltage
D1
D2
D3
0 V
5 V
V2
20 V
5 k 10 k
5 k
VA
VB
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3) [10 points] A circuit is required with a maximum gain of
1000, a -20 dB/decade rolloff above 100krads/s, and a +20 dB/decade
rolloff below 100 rads/s. Specify an appropriate system function
for
the circuit.
4) [5 points] Explain why you cant increase the voltage across
the Base to Emitter (V BE) of a BJT(npn) much beyond 0.7 Volts.
5) [5 points] Add the necessary components (such as independent
sources, dependent sources,resistors, capacitors, inductors) so
that the common-mode input (VCMI) is halfway between the
power supply voltages. Additionally, integrate a 100 mV
differential input (1 kHz sin-wave)independent source into the
circuit schematic.
-
+
VA
VOUT
R
5V
VB
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6) [5 points] Select the most appropriate statement regarding
the small-signal MOSFETtransconductance gm.
a. Can be used anytime when calculating the current and voltages
of MOSFETs when smallinput signals are applied.
b.
Defines the total currentiD through the drain of the
transistorc. Is equal to the slope ofiD with respect to vGS at a
particular VGS
d. All the abovee. None of the above
7) [5 points] Last year, Intel announced a break-through in
transistor design, the tri-gate transistor,which that was
introduced at the 22 nm line size. This new tri-gate transistor
offers numerous
enhancements to current planar transistors beyond the benefits
normally associated with lengthand width scaling.
Qualitatively, interpret the impact of the following figure
comparing supply voltage (V DD) vs transistor
gate delay () for tri-gate transistors and planar
transistors.
32 nm Planar Transistors 22 nm Tri-Gate Transistors
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8) [50 points] (a-j) For the amplifier below, use VTN = 3.82 V,
and KN = !"!.!"!
mA/V2 = 555.5mA/V2. You may assume that the Early voltage is
infinite. Also, you can approximate
!
!!!"!!=
160!"#.
a. Find the value for R1 such that the gate voltage of the
transistor is 2 Volts, i.e. V G = -3 V. Forthe calculated value of
R1, use R2 = 7 k.
b. If VGS = 4 Volts, what is the voltage at the source (VS) of
the transistor?
c. If VGS = 4 Volts, what is the current ID assuming the
transistor is in saturation? What must thedrain voltage (VD) be to
ensure the transistor is operating in the saturation region.
~
vout
vin
R1
R2
RD
RS
VDD = +10 V
VSS = -10 V
CS
CG
CD
RX
RY RL
VS
VG
VD
VX
rin
rout
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d. If VGS = 4 Volts and the drain voltage (VD) = 1 Volts, what
value resistors must be used for RDand RS? What is the drain to
source voltage (VDS)?
e. Draw the small-signal equivalent model.
f. Compute the small-signal mid-band gain vout/vin for RL = and
RX = 200 , and RY = 200 .
~
vout
vin
R1
R2
RD
RS
VDD = +10 V
VSS = -10 V
CS
CG
CD
RX
RY RL
VS
VG
VD
VX
rin
rout
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g. What is the AC steady-state input resistance (rin) of this
circuit if RX = 200 , and RY = 200 ?
h. What is the AC steady-state output resistance (rout) of this
circuit excluding RL?
i. If CG
= 1 F, CS
= 1 F, CD
= 1 F, RX
= 200 , RY
= 200 , and RL
= what is the low-
frequency cutoff value?
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j. If the parasitic capacitance (CGS, CGD, CGB) of the MOSFET
limits amplification beyond 100kHz, draw the Bode plot for the
magnitude of the amplifier? Be sure to label all relevant
points.
