EC-1 unit 5 Active Load

8/11/2019 EC-1 unit 5 Active Load

1/41

4. Active Loads and IC MOS Amplifiers

ECE 102, Winter 2011, F. Najmabadi

Reading: Sedra & Smith: Chapter 7 (MOS portions)


2/41

Progress towards an IC relevant amplifier

Resistors and capacitors take a lot of space on ICs:

o Minimize (i.e., very few) R & C and small sizes (e.g., nF or smaller)

o Get rid of coupling capacitors by

direct coupling between stages

(makes biasing design complicated)

o Replace Rs with a current source

o Still need to get rid of Cs!

o What to do about RD?


3/41

Current mirrors are the principle method

for biasing in ICs

Identical MOS: Same kn andVt

Q1 is always in saturation

VDS1 = VGS > VGS Vt

Q2 has to be in saturation for

current mirror to work

VDS2 > VGS Vt

refo ILW

LWI

1

2

)/(

)/(=


4/41

Small signal model of Current Mirrors

Small signal response of an ideal current source is an open circuit! However, Current mirrors are NOT ideal current sources as we used

vDS


5/41

Small signal model of Current Mirrors

0

inflows:D1atKCL

111

11

===gsogsmgsD

ogsm

vrvgvv

rvg

Real Circuit Small Signal Model

2orR =circuitopenissourcecurrent0 2 gsmgs vgv =

Current source

becomes open circuit


6/41

But what happens if we replace Irefcurrent source with practical elements?

Not a Practical Circuit Practical Circuit

Would practical elements that fix Irefchange the

small signal response?


7/41

Small signal response of a practical

current mirror

Practical Circuit

0)||(

||inflows:D1atKCL

111

11

===gsDogsmgsD

Dogsm

vRrvgvv

Rrvg

2orR =circuitopenissourcecurrent0 2 gsmgs vgv =


8/41

Generalized Small signal Model of

Current Mirrors

Any circuit that

fixesIref

V..

)1()()/('2

1

saturationinQ1

.

G1

12

111

11

1

===

+=

=

==

GGGSGS

DStnGSnD

GSDS

refD

vconstvconstvv

vVvLWki

vv

constii

Small Signal Model


9/41

Summary of Current Mirrors

Bias Model Small Signal Model

refo ILW

LWI

1

2

)/(

)/(=

Bias current

goes through

this leg

Signal current

goes through

this leg

( capacitor)

It is sufficient to consider

only Q2 in circuit calculations


10/41

PMOS Version:

Summary of Current Mirrors

NMOS Version:

Intuitive Model

It is sufficient to consider

only Q2 in circuit calculations


11/41

Biasing a CS Stage: Can we place a current

mirror in the source circuit?Typical bias of a

discrete CS amplifier

Placing a current mirror in the source circuit will not Work!

Current mirror Bias works fine!

o A large R in the source circuit for small signal

reducing the gain by (1+ gm1 rO2)

Bias Small Signal


12/41

We need to Bias a CS Stage by placing a

current mirror in the drain circuit!

Signal

Current mirror

provides RD !

Current mirror sets ID = Io

However, a precise bias

voltage should be applied

to the Gate (corresponding

to the ID set by the current

source)

Several ways to do this

Bias


13/41

Basic gain cell in IC

NMOS Version:

PMOS Version:)||( 211 oomv rrgA =


14/41

Bias point of CS amp with current mirror

||22

2

tpSGOV

GDDSG

VVV

VVV

==

222 2)/('

2

1OV

VLWkI pD =

222

111

111

/

/

/2

DAo

DAo

OVDm

IVr

IVr

VIg

=

=

=

2/1

1

11

21

)/('

2

=

=

LWk

IV

II

n

DOV

DD

Ignore Channel Width Modulation,o Fast and relatively accurate

method to findgm1 , ro1 and ro2o Cannot find VDS1 and VDS2


15/41


Include Channel Width Modulation,

o Lengthy Analysis

o Gives VDS1 and VDS2o See S&S Example 7.2 (pp500-504)

o Can gain insight with load-line analysis

iD2

vDS2


16/41


12 DSSDDD vvV +=

Setting Vss = 0 (For simplicity), the load line (or

load curve!) equation for Q1 is (note iD1 = iD2)


17/41

Biasing CS amp with current mirror allows

a very largeRD without increasing VDD

Q2in triodeQ2in saturation

Load line for a discrete

resistor of value ro2

Needed VDD


18/41

Biasing a Source Follower in ICs

Current mirror Bias works fine! Small signal OK

Common-Drain (Source Follower) stages are biased with

current mirror in the source circuit (as above)

Common-Gate stages are biased with current mirror in the

drain circuit similar to CS amplifier.


19/41

PMOS version of Basic gain cell in IC

NMOS CS Amp PMOS CS Amp NMOS CD Amp PMOS CD Amp

l f d ll


20/41

Implementation of CS and Follower

configurations on IC


21/41

Cascode Amplifiers and Current Mirrors

C d lifi i


22/41

Cascode amplifier is a two-stage,

CS-CG configuration

Cascode Configuration

CG stage

CS stage

signalbias

C d lifi i


23/41


CS-CG configuration


CG stage

CS stage

Small Signal Model

Small Signal Model configured as two-stage amplifier


24/41

Open-Loop gain of a Cascode amplifier

122 )1( vrgv omo +=

22112211

)1( omomomom

i

o

vo

rgrgrgrgv

vA +==

Node Voltage Method:

0122

1=

vgr

vvm

o

o

Node vo:

0011

1=++ im

o

vgr

vNode v1: iom vrgv 111 =

By KCL around Q2

Open Loop Gain(RL , io = 0):


25/41

Output Resistance of a Cascode amplifier

1122 )1( oomoo rrgrR ++=

RRgr mo ++ )1(

21221 oomooo rrgrrR ++=

Exercise: Compute Ro from the small signal circuit of the previous slide

(Attach a voltage source vxto the output and compute ix, see S&S pp 509-510)

R


26/41

Amplifier models*

Voltage Amplifier

Current Amplifier

Transconductance Amplifier

0for == oivoo ivAv

Avo : Open-Loopvoltage gain

0for == oimo vvGi

Gm : Short-circuit

transconductance

0for == oiiso viAi

Ais : Short-circuit

current gain

Ideal Amplifier

Ri

Ro = 0

Ri

Ro

Ri = 0

Ro

* See S&S pp 26-27


27/41

Amplifier models

Voltage Amplifier

Current Amplifier


isiovo

imis

omvo

ARRA

RGA

RGA

)/(=

=

=

From the point of view of circuit analysis:

amplifier models are identical

(The output stages are

Thevenin/Norton Equivalent)

omvo

oimivoo

RGA

RvGvAvi

=

===

0For 0 Avo ,Ais , and Gm are related to each other


28/41

Amplifier models*

Voltage Amplifier


0for == oivoo ivAv

0for == oimo vvGi

Alternate method to computeAvo:

1. Set RL = 0 (short output)

2. Compute Gm = io/vi3. Avo = Gm Ro

omvo RGA =


29/41

Example: CS amplifier gain fromGm

gsmo vgi =

oo rR =

omomvo rgRGA ==

gsmimo vGvGi ==

gsmgsm vgvG =

mm gG =

CS Amplifier

Alternate method to computeAvo:

1. Set RL = 0 (short output)2. Compute Gm = io/vi3. Avo = Gm Ro

Short circuit


Gm = gm because current source is flipped

0


30/41

Cascode amplifier gain from Gm

1

1

1

1

1

11

o

im

o

gsmor

vvg

r

vvgi ==

21221

2211 )1(

oomoo

omom

i

om

rrgrr

rgrg

v

iG

++

+==

21221 oomooo rrgrrR ++=22112211 )1( omomomomomvo rgrgrgrgRGA +==

121and vvvv gsigs ==

Node equation at v1

i

moooo

moo

imm

oo

o

gsmgsm

o

vgrrrr

grrv

vgvgrr

r

vvgvg

r

v

22121

1211

112

21

2

12211

1

1

11

0

++=

=

++

=++

KCL at D1


31/41

Insight into operation of Cascode amplifier

For simplicity assume ro1 = ro2 = ro andgm1 = gm2 = gm

CG section has kept Gm the same (i.e., since Gm = io/vi , same

current is passed through) but has increased Ro substantiallyresulting in a large increase in overall open-loop voltage gain!

CG section acted as a current buffer!

Cascode amplifier needs a large load!

m

om

omom

oomoo

omomm g

rg

rgrg

rrgrr

rgrgG =

++

+=

2

21221

2211 )()1.(

221221 )2( omomooomooo rgrgrrrgrrR +=++=Cascode amplifier:

oomm rRgG == and1CS amplifier (1st

stage of cascode):


32/41

Distribution of the gain in a Cascode Amp.

)||( 222 Lomv RrgA =

22222

221

1

1 om

L

mom

LoiL

rg

R

grg

RrRR +

+

+==

)||( 2111 iomv RrgA =

21 vvv AAA =

CG stages reduces the load seen by the

CS stage bygm2ro2

CG StageCS Stage


33/41

Cascode Amplifier needs a large load

)||( 222 Lomv RrgA =22222

221

1

1 om

L

mom

LoiL

rg

R

grg

RrRR +

+

+==)||( 2111 iomv RrgA =


gmro gmro (gmro)2

(gmro) ro = Ro ro 0.5gmro gmro 0.5(gmro)2

ro 2/gm 2 0.5gmro gmro

RL Ri2 = RL1 Av1(CS) Av2(CG) Av= Av1Av2

Max. Gain

Same gain

as a CS Amp.

PracticalGain

Cascode amplifier is a two stage


34/41


CS-CG configuration


CG stage

CS stage

Small Signal Model

Small Signal Model configured as two-stage amplifier


35/41

Cascode Amplifier needs a large load

)||( 222 Lomv RrgA =22222

221

1

1 om

L

mom

LoiL

rg

R

grg

RrRR +

+

+==)||( 2111 iomv RrgA =


gmro gmro (gmro)2

(gmro) ro = Ro ro 0.5gmro gmro 0.5(gmro)2

ro 2/gm 2 0.5gmro gmro

RL Ri2 = RL1 Av1(CS) Av2(CG) Av= Av1Av2

Max. Gain

Same gain

as a CS Amp.

PracticalGain

Cascode amplifier needs a large load to


36/41

Cascode amplifier needs a large load to

get a high gain

RL = ro3

Av gmro

Gain did not increase compared to a CSamplifier.

This is still a useful circuit because of its

high gain-bandwidth (we see this later).

To get a high gain,Av = 0.5(gmro)2 ,

we need to increase the small-signalresistance of the current mirror to

(gmro) roo Cascode current mirror

Current

Mirror

Cascode


37/41

Cascode Current mirror

Identical MOS: Same kn and Vt ,

and

Usually: (W/L)1 = (W/L)3and

(W/L)2= (W/L)4

1

2

3

4

)/()/(

)/()/(

LWLW

LWLW

=

Q1 and Q3 are always in saturation

Q2 and Q4 have to be in saturation

for current mirror to work

VDS2 > VGS Vt

VDS4 > VGS Vt

Straight forward to show

refo ILW

LWI

1

2

)/(

)/(=

Exercise: For VSS= 0, show that a single current mirror (no cascoding) works only if

VD2 > VOV and a cascode current mirror requires VD4> Vt + 2VOV

Small signal resistance of a cascode


38/41

Small signal resistance of a cascode

current mirror is quite large

Equivalent

circuit

Small-signal

circuit

2244 )1( oomoo rrgrR ++=

Cascode amplifier with a


39/41


cascode current mirror

Cascode

amplifier

Cascode

current mirror

Signal

Bias



40/41


cascode current mirror

A high gain,Av 0.5(gmro)2 , high gain-bandwidth circuit.

Draw-back: Low voltage headroom because 4 MOS should be in

active for a given VDD

Cascode

amplifier

Cascode

current mirror

4433 )1( oomo rrgr ++


41/41

Folded Cascode increases voltage overhead

PMOS CG stageNMOS CS stage

Biased with I1

I2

Exercise: Draw the small-signal circuit of a folded cascode and show that it is exactly

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EC-1 unit 5 Active Load