E-Paper ESL Tag 2 Inch GDE0210C1 Specification

Version: 0.9

TECHNICAL SPECIFICATION

MODEL : GDE021OC1

The content of this information is subject to be changed without notice. Please contact Good Display or its agent for further information

Customer’s Confirmation Customer Date By

Good Display’s Confirmation

GDE021OC1

DALIAN GOOD DISPLAY CO.,LTD

Revision History Rev. Issued Date Revised Contents 0.1 Jul. 11, 2009 Preliminary

0.2 Oct. 08, 2009

1. Add [2. Features] description 2. Add FPC Drawing 3. Modify [5. Input/Output Terminal] 4. Add [6. Command Table] 5. VCI from 2.4V to 3.3V 6. Modify [11. Block Diagram]

0.3 Jan. 14, 2010

1. Modify [4. Mechanical Drawing] 2. Modify [5-1] Pin out List] 3. Modify [6. Command Table] 4. Add [7-6] Reference Circuit] 5. Modify [8. Typical Operating Sequence]

0.4 Mar. 01, 2010

1. Add UV exposure Resistance in [11. Reliability test] 2. Description of screen size modify from 2.1” to 2.04” 3. Modify [8. Typical Operating Sequence] 4. Modify [6. Command Table] 5. Modify drawing of 9-2) Definition of contrast ratio 6. pin out list：change pin 38 from FB to NC 7. Modify 7-6) Reference Circuit

0.5 Jun. 01, 2010

1. Weight = 4±0.5 g 2. Add power consumption： Typ.= 0.657(mW) , Max. = 3.610(mW) 3. Revise update time： Before：

After：

0.6 Jul. 01, 2010

1. Add Command Table

2. Modify [8. Typical Operating Sequence]

0.7 Feb. 25,2011

1. 5-1) Modify Pin out List and add I：input；O：output；I/O：Bi-directional；C：

capacitor 2. Modify (6.command table) 3. Modify (8. Typical Operating Sequence)

0.8 Mar. 18,2011 1. Add Note7-1 & Note7-2(page11). 2. Add part table(page23) & notes(reference circuit). 3. Modify block diagram(page33).

0.9 Mar. 30,2011

1. Modify 7-2) Panel DC characteristics - Standby power - Maximum image update time at 25℃

2. Delete 7-5) Power Consumption 3. Modify 9-1) Specifications - Contrast Ratio

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TECHNICAL SPECIFICATION

CONTENTS

NO. ITEM PAGE

- Cover 1

- Contents 2

1 Application 3

2 Features 3

3 Mechanical Specifications 3

4 Mechanical Drawing of EPD module 5

5 Input/Output Terminals 6

6 Command Table 8

7 Electrical Characteristics 11

8 Typical Operating Sequence 24 9 Optical Characteristics 29

10 Handling, Safety and Environment Requirements 31 11 Reliability test 32

12 Block Diagram 33

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1. Application The display is a TFT active matrix electrophoretic display, with interface and a reference system design. The 2.04” active area contains 180 x 75 pixels, and has 1-bit and 2-bit full display capabilities. An integrated circuit contains gate buffer, source buffer, interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM, and border are supplied with each panel.

2. Features High contrast High reflectance Ultra wide viewing angle Ultra low power consumption Pure reflective mode Bi-stable Commercial temperature range Landscape, portrait mode Antiglare hard-coated front-surface Low current deep sleep mode On chip display RAM Waveform stored in On-chip OTP 8-bits Parallel (6800 & 8080), Serial peripheral interface available On-chip oscillator On-chip booster and regulator control for generating VCOM, Gate and source driving voltage. 12C Single Master Interface to read external temperature sensor reading Available in COG package, IC thickness 250um

3. Mechanical Specifications

Parameter Specifications Unit Remark Screen Size 2.04 Inch -

Display Resolution 180(H)×75(V) Pixel Dpi : 95

Active Area 20.0(H)×48.0(V) mm -

Pixel Pitch 0.266×0.266 mm - Pixel Configuration Rectangle - Outline Dimension 26.60 (H)×59.50(V)×1.18(D) mm -

Weight 4±0.5 g

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4. Mechanical Drawing of EPD module

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5. Input/Output Terminals 5-1) Pin out List I：input；O：output；I/O：Bi-directional；C：capacitor

Pin # Type Signal Description Remark

1 C VCOM A stabilizing capacitor should be connected between

VCOM and VSS

2 - NC Do not connect with other NC pins Keep Open

3 C PREVGL Power Supply pin for VCOM, VGL and VSL

4 NC Do not connect with other NC pins Keep Open

5 C VSL Negative Source driving voltage


7 C PREVGH Power Supply pin for VGH and VSH


9 C VSH Positive Source driving voltage


11 C VDD Core logic power pin

12 VSS Ground

13 I VCI Power Supply for the chip


15 I/O D7 data signal source driver








23 I CS# Chip Select input pin Note 5-1

24 I R/W#(WR#) Read / Write control input pin Note 5-2

25 I D/C# Data / Command control pin Note 5-3

26 I E(RD#) Enable pin Note 5-4

27 I RES# Reset Note 5-5

28 O BUSY Busy state output pin Note 5-6

29 I BS1 Bus selection pins

30 I BS0 Bus selection pins Note 5-7

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31 I/O TSDA I2C Interface to digital temperature sensor Data pin

32 O TSCL I2C Interface to digital temperature sensor Clock pin


34 C VGH Positive Gate driving voltage


36 C VGL Negative Gate driving voltage



39 I RESE Current Sense Input for the Control Loop

40 O GDR N-Channel MOSFET Gate Drive Control Note 5-1：This pin is the chip select input connecting to the MCU. The chip is enabled for MCU

communication only when CS# is pulled LOW in parallel interface. When CS# is not in use, please connect to VCI or VSS.

Note 5-2：This pin is read / write control input pin connecting to the MCU interface. When 6800 interface

mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin R/W (WR#) can be connected to either VCI or VSS.

Note 5-3：This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH,

the data at D [7:0] will be interpreted as data. When the pin is pulled LOW, the data at D [7:0] will be interpreted as command.

Note 5-4：This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as

the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin E (RD#) should be connected to either VCI or VSS.

Note 5-5：This pin is reset signal input. Active Low. Note 5-6：This pin is Busy state output pin. When Busy is High, the operation of the chip should not be

interrupted, command should not be sent. e.g., The chip would put Busy pin High when - Outputting display waveform; or - Programming with OTP - Communicating with digital temperature sensor

Note 5-7： Table：Bus interface selection

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6. Command Table D/C# = 0；R/W#(WR#) = 0；E(RD# = 1) unless specific setting is stated；POR：Default value.

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7. Electrical Characteristics 7-1) Absolute maximum rating

7-2) Panel DC characteristics

The following specifications apply for：VSS = 0V, VCI = 3.3V, TA = 25℃

Parameter Symbol Conditions Min Typ Max Unit

Signal ground VSS - 0 - V

Logic Supply Voltage VCI 2.4 3.0 3.3 V

High level input voltage VIH 0.8 VCI V

Low level input voltage VIL 0.2 VCI V

High level output voltage VOH IOH= -100uA 0.9 VCI V

Low level output voltage VOL IOH=100uA 0.1 VCI V

Maximum power panel PMAX - - 3.610 mW

Standby power panel PSTBY - - 0.165 mW

Typical power panel PTYP - 0.657 - mW

Operating temperature 0 - 50 ℃

Storage temperature -25 - 70 ℃

Maximum image update time at 25℃

- - 4000 ms

Deep sleep mode current

Note 7-1

VCI

DC/DC off No clock

No input load Ram data not retain

- 2 5 uA

Sleep mode current

Note 7-2 VCI

DC/DC off No clock

No input load Ram data retain

- 35 50 uA

Note 7-1: From deep sleep mode to normal mode,typical is 10ms,maximum is 50ms. Note 7-2: When module power on,don’t transfer any command to module.It will into sleep mode. (From sleep mode to normal mode is immediately)

Parameter Symbol Rating Unit Logic Supply Voltage VCI -0.5 to +3.6 V

Logic Input voltage VIN -0.5 to VCI+0.5 V

Logic output voltage VOUT -0.5 to VCI+0.5 V Operating Temp. range TORP 0 to +50 ℃

Storage Temp. range TSTG -25 to +70 ℃

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- The Typical power consumption is measured with following pattern transition: from horizontal 4 gray scale pattern to vertical 4 gray scale pattern.(Note 7-1)

- The standby power is the consumed power when the panel controller is in standby mode. - The listed electrical/optical characteristics are only guaranteed under the controller & waveform

provided by Good Display. - Vcom is recommended to be set in the range of assigned value ± 0.1V.

Note 7-1： The Typical power consumption

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7-3 ) Panel AC characteristics The following specifications apply for：VSS = 0V, VCI = 3.3V, TA = 25℃

Parameter Symbol Conditions Min Typ Max Unit

Internal Oscillator frequency Fosc VCI = 2.4 to 3.3V 0.95 1 1.05 MHz 7-3-1) MCU Interface Note 7-2：L is connected to VSS Note 7-3：H is connected to VCI 7-3-1-1) MCU Interface Selection SPD2701 MCU interface consist of 8 data pins and 5 control pins. The pin assignment at different interface mode is summarized in Table 7-1. Different MCU mode can be set by hardware selection on BS[2:0] pins.

Pin Name Data/Command Interface Control Signal Bus

interface D7 D6 D5 D4 D3 D2 D1 D0 E (RD#)

R/W# (WR#) CS# D/C# RES#

SPI4 L NC SDin SCLK L L CS# D/C# RES# 8-bit 8080 D [7:0] RD# WR# CS# D/C# RES#

SPI3 L NC SDin SCLK L L CS# L RES# 8-bit 6800 D [7:0] E R/W# CS# D/C# RES#

MCU interface assignment under different bus interface mode 7-3-1-2) MCU Parallel 6800-series Interface

The parallel interface consists of 8 bi-directional data pins (D[7:0]), R/W#, D/C#, E and CS#. A LOW in R/W# indicates WRITE operation and HIGH in R/W# indicates READ operation. A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write. The E input serves as data latch signal while CS# is LOW. Data is latched at the falling edge of E signal.

Function E R/W# CS# D/C# Write Command

↓ L L L

Read status ↓ H L L Write data ↓ L L H Read data ↓ H L H

Control pins of 6800 interface Note 7-4：↓ stands for falling edge of signal In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline processing is internally performed which requires the insertion of a dummy read before the first actual display data read. This is shown in Figure 7-1.

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7-3-1-3) MCU Parallel 8080-series Interface The parallel interface consists of 8 bi-directional data pins (D[7:0]), RD#, WR#, D/C# and CS#. A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write. A rising edge of RD# input serves as a data READ latch signal while CS# is kept LOW. A rising edge of WR# input serves as a data/command WRITE latch signal while CS# is kept LOW.

high low

high low

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Function RD# WR# CS# D/C# Write Command

H ↑ L L

Read status ↑ H L L Write data H ↑ L H Read data ↑ H L H

Control pins of 8080 interface (Form 1) Note 7-5：↑ stands for rising edge of signal Note 7-6：Refer to Figure 13-2 for Form 1 8080-Series MPU Parallel Interface Timing Characteristics Alternatively, RD# and WR# can be keep stable while CS# serves as the data/command latch signal.

Function RD# WR# CS# D/C# Write Command

H L ↑ L

Read status L H ↑ L Write data H L ↑ H Read data L H ↑ H

Control pins of 8080 interface (Form 2) Note 7-7：↑ stands for rising edge of signal Note 7-8：Refer to Figure 13-3 for Form 2 8080-Series MPU Parallel Interface Timing Characteristics In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline processing is internally performed which requires the insertion of a dummy read before the first actual display data read. This is shown in Figure 7-4.

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7-3-1-4) MCU Serial Interface (4-wire SPI) The serial interface consists of serial clock SCLK, serial data SDIN, D/C#, CS#. In SPI mode, D0 acts as SCLK, D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7, E and R/W# can be connected to an external ground.

Function E(RD#) R/W#(WR#) CS# D/C# SCLK Write Command

Tie LOW Tie LOW L L ↑

Write data Tie LOW Tie LOW L H ↑ Control pins of Serial interface

Note 7-9：↑ stands for rising edge of signal SDIN is shifted into an 8-bit shift register on every rising edge of SCLK in the order of D7, D6, D0. D/C# is sampled on every eighth clock and the data byte in the shift register is written to the Graphic Display Data RAM (RAM) or command register in the same clock. Under serial mode, only write operations are allowed.

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7-3-1-5) MCU Serial Interface (3-wire SPI)

The 3-wire serial interface consists of serial clock SCLK, serial data SDIN and CS#. In 3-wire SPI mode, D0 acts as SCLK, D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7, R/W# (WR#)#, E and D/C# can be connected to an external ground.

The operation is similar to 4-wire serial interface while D/C# pin is not used. There are altogether 9- bits will be shifted into the shift register on every ninth clock in sequence: D/C# bit, D7 to D0 bit. The D/C# bit (first bit of the sequential data) will determine the following data byte in the shift register is written to the Display Data RAM (D/C# bit = 1) or the command register (D/C# bit = 0). Under serial mode, only write operations are allowed.

Function E(RD#) R/W#(WR#) CS# D/C# SCLK Write Command

Tie LOW Tie LOW L Tie LOW ↑

Write data Tie LOW Tie LOW L Tie LOW ↑ Control pins of 3-wire Serial interface

Note 7-10：↑ stands for rising edge of signal

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7-3-2) Timing Characteristics of 6800-Series MCU Parallel Interface 6800-Series MCU Parallel Interface Timing Characteristics (VCI-VSS = 1.8V to 2.0V, TA = 25℃, CL=20pF)

6800-series MCU parallel interface characteristics

[20% ~ 80%] [20% ~ 80%]

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7-3-3) Timing Characteristics of 8080-Series MCU Parallel Interface 8080-Series MCU Parallel Interface Timing Characteristics (VCI-VSS= 1.8V to 2.0V, TA= 25℃, CL=20pF)

8080-series MCU parallel interface characteristics

[20% ~ 80%] [20% ~ 80%]

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7-3-4) Timing Characteristics of Series Interface Series Interface Timing Characteristics (VCI-VSS= 1.8V to 2.0V, TA= 25℃, CL=20pF)

Series interface characteristics

[20% ~ 80%] [20% ~ 80%]

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7-4) Reference Circuit

Figure. 7-4 (1)

Note: 40pins connector (Connect to FPC of 2.04” panel)

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Figure. 7-4 (2)

Figure. 7-4 (3)

Note: C1,C6,C7 for stable voltage. C3,C5,C9,C10 for ic inside charge

pump circuit.

Note: Thermal sensor circuit

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Figure. 7-4 (4) BOM

or MBR0530

Note: For IC inside PWM circuit (Generate PREVGH,PREVGL)

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8. Typical Operating Sequence Initialize Display:

Close charge pump:

Open charge pump:

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Normal display:

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Convert image format: Converting from a picture in Windows 24-bit bitmap (BMP) format.

2x2 (4 pixels) Bitmap Data Structure

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Converting monochrome BMP to Driver IC

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Converting color BMP to Driver IC

Since the BMP file is the last line at the beginning, here are some suggested

approach to convert a picture without frame buffer: Flip the image up side down before save to BMP. Change the scan direction of the driver IC; make the last line scan 1st.

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9. Optical characteristics 9-1) Specifications Measurements are made with that the illumination is under an angle of 45 degrees, the detection is perpendicular unless otherwise specified. T = 25oC SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT Note

R Reflectance White 30 35 - % Note 9-1

Gn Nth Grey Level - - DS+(WS-DS)×n/(m-1) - L* -

CR Contrast Ratio - 10 12 - -

Tupdate Update time 2~4-bit mode - 2~4 - sec -

WS：White state , DS：Dark state Gray state from Dark to White：DS、G1、G2…、Gn…、Gm-2、WS m：4, when 2 bits mode Note 9-1：Luminance meter：Eye – One Pro Spectrophotometer 9-2) Definition of contrast ratio

The contrast ratio (CR) is the ratio between the reflectance in a full white area (Rl) and the reflectance in a dark area (Rd)：

CR = Rl/Rd

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9-3) Reflection Ratio The reflection ratio is expressed as： R = Reflectance Factorwhite board x ( Lcenter / Lwhite board ) Lcenter is the luminance measured at center in a white area (R=G=B=1). Lwhite board is the luminance of a standard white board. Both are measured with equivalent illumination source. The viewing angle shall be no more than 2 degrees.

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10. HANDLING, SAFETY AND ENVIROMENTAL REQUIREMENTS

WARNING The display glass may break when it is dropped or bumped on a hard surface. Handle with care. Should the display break, do not touch the electrophoretic material. In case of contact with electrophoretic material, wash with water and soap.

CAUTION The display module should not be exposed to harmful gases, such as acid and alkali gases, which corrode electronic components.

Disassembling the display module can cause permanent damage and invalidate the warranty agreements. Observe general precautions that are common to handling delicate electronic components. The glass can break and front surfaces can easily be damaged. Moreover the display is sensitive to static electricity and other rough environmental conditions. Data sheet status Product specification

This data sheet contains final product specifications.

Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification.

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11. Reliability test

TEST CONDITION METHOD REMARK

1 High-Temperature Operation T = 50°C, 30% for 240 hrs IEC 60 068-2-2Bp

2 Low-Temperature Operation T = 0°C for 240 hrs IEC 60 068-2-2Ab

3 High-Temperature Storage

T = +70°C, 23% for 240 hrs Test in white pattern IEC 60 068-2-2Bp

4 Low-Temperature Storage

T = -25°C for 240 hrs Test in white pattern IEC 60 068-2-1Ab

5 High Temperature, High- Humidity Operation T = +40°C, RH = 90% for 168 hrs IEC 60 068-2-3CA

6 High Temperature, High- Humidity Storage

T = +60°C, RH = 80% for 240 hrs Test in white pattern IEC 60 068-2-3CA

7 Temperature Cycle -25℃ → +70℃ , 100 cycles

30 mins 30 mins Test in white pattern

IEC 60 068-2-14

8 UV exposure Resistance 765 W/m2 for 168hrs,40℃ IEC60 068-2-5Sa

9 Electrostatic Effect (non-operating)

Machine mode +/- 250V, 0Ω, 200pF IEC 62179, IEC 62180

10 Package Vibration 1.04G, Frequency：10~500Hz

Direction：X,Y,Z Duration：1 hours in each direction

Full packed for shipment

11 Package Drop Impact

Drop from height of 122 cm on concrete surface.

Drop sequence：1 corner, 3 edges, 6 faces

One drop for each.

Full packed for shipment

12 Altitude test Operation 700hPa ( = 3000m ),48Hr

13 Altitude test Storage

260hPa ( = 10000m ),48Hr Test in white pattern

Actual EMC level to be measured on customer application. Note：The protective film must be removed before temperature test.

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12. Block Diagram (schematic drawing)

(As page22 , Figure. 7-4 (2))

2.04” Panel

CPU or MCU or ARM…etc

Data bus (6800 or 8080 or SPI)

Control bus

Power circuit (Generate VCI voltage)

VCI

FPC 40pins

PCBA

PWM circuit


Connector 40pins as page21 , Figure. 7-4(1)

Thermal sensor


Capacitor

(Designed by customer)

(Designed by customer)

Active area Driver IC

Pin1 )

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E-Paper ESL Tag 2 Inch GDE0210C1 Specification