Implementation of DSP Based SPWM for Single Phase Inverter

M. F. N. Tajuddin, N. H. Ghazali, I. Daut and B. Ismail

School of Electrical System Engineering, Universiti Malaysia Perlis, (Malaysia)

AbstractThis paper presents theoretical and experimental aspects related to the implementation of a Digital Signal Processor (DSP) based Sinusoidal Pulse Width Modulation (SPWM) for single phase inverter. Two sinusoidal reference signals complement to each other are compared with a carrier signal to generate PWM signals for the switches. A digital SPWM algorithm is implemented in DSP TMS320F2812 using SIMULINK model constructed from blocks of the C2000 Embedded target Library. The efficiency of the inverter is high and its offers less total harmonic distortion. The proposed system is verified through simulation and is implemented in a prototype, and the experimental results are compared

Keywords-Sinusoidal pulse width modulation (SPWM); inverter; TMS320F2812 DSP;

I. INTRODUCTION Pulse Width Modulation (PWM) is the most powerful

technique that offers a simple method for controlling of analog systems with the processors digital output. With the availability of low cost high performance Digital Signal Processor (DSP) chips characterized by the execution of most instructions in one instruction cycle, complicated control algorithms can be executed with fast speed, making very high sampling rate possible for digitally-controlled inverters[1]. Control methods, which generate the necessary PWM patterns, have been extensively discussed in literature. These could be classified as voltage controlled and current controlled PWM. All these methods aim at generating a sinusoidal inverter output voltage without low-order harmonics. This is possible if the sampling frequency is high compared to the fundamental output frequency of the inverter. Sinusoidal Pulse Width Modulation (SPWM) technique is one of the methods that widely used nowadays. It is characterized by constant amplitude pulses with different duty cycle for each period. The width of this pulses are modulated to obtain inverter output voltage control and to reduce its harmonic content [2]. Nowadays, sinusoidal pulse width modulation or SPWM is the most popular method used in motor control and inverter application. The control strategy of a SPWM inverter is one of the key aspects that influence its performance, size and cost. Although the inverters have traditionally been designed as analog circuitry, digital inverters are now preferred.

This paper presents theoretical and experimental aspects related to the implementation of a DSP based fully digital single phase SPWM voltage modulation inverter. The proposed method offers the advantage of effectively doubling the switching frequency of the inverter voltage, thus making the output filter smaller, cheaper and easier to implement. Texas Instruments TMS320 F2812 DSP is best suited to this study for

DSP based application development and is used to generate SPWM signals for single-phase inverter.

S1

S2

S3

S4

L

C R

Tx

VDC / 2

VDC / 2

DSPWM

-

Vsin -Vsin

-

DSP TMS320F2812

S1 S4

Figure 1. Pulse characterization.

II. DSP CONTROLLED SINGLE PHASE SPWM INVERTER The DSP based single-phase SPWM inverter topology is

shown in Fig. 1. The complete system can be divided into two sections: the control and the power circuit. The control circuit section is composed of three parts namely PC, DSP board and IGBT driver. Electrical isolation between control circuit and power circuit is provided by the optically coupled devices. The power circuit section is composed of four parts namely full bridge inverter circuits (S1-S4), DC power supply, LC filter and load. PWM inverters include semiconductor devices with nonlinear characteristics and can generate dominant harmonics in the system. Therefore, the waveform quality of the sensitive load is improved by putting an LC filter at the output of the PWM inverter. The output is then fed to step up transformer to get the required output level.

III. RULE OF SPWM Sinusoidal PWM is obtained by comparing a high-

frequency carrier with a low-frequency sinusoid, which is the modulating or reference signal [3]. The carrier has a constant period; therefore, the switches have constant switching frequency. The switching instant is determined from the

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crossing of the carrier and the modulating signal. A fundamental period in Fig. 2 consists of p pulses whose widths vary sinusoidally throughout the cycle to give the fundamental component of frequency. The basis of equivalence between the desired sinusoid and the actual pulsed waveform is taken to be voltseconds, as shown in Fig. 3, i.e., and . One of these pulses, the general kth pulse, is characterized in detail in Fig. 4. The switching period and the frequency modulation ratio p are, respectively, given by

(1) (2)

where is the switching frequency and is the fundamental frequency. The quarter period of pulse is given as

(3)is the position from the origin of the fundamental period of the midpoint of the period . The angles and are the modulating angles which vary throughout the cycle.

Figure 2. Sinusoidal PWM signal

Consider first the average voltages and during the two halves of the modulating pulse

(4)

where

(5)and, similarly

(6)where

(7)The voltsecond is the half-pulsewidth of the sine wave and is given according to Fig. 4 by

!" #$#%&

%&'() (8)

!" !" (9)Since, !" * when is small

!" (10)and similarly,

!" + (11)

Figure 3. Basis of equivalence for sinusoidal PWM: volt-second

Figure 4. Pulse characterization.

For the corresponding voltsecond , in the PWM waveform,

(12) (13)

and similarly,

(14)For equivalence of voltseconds from which the modulation rule can be derived, it is required that

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(15) (16)

By equating (10) and (12), and (11) and (14)

, !" (17)and, similarly,

, !" + (18)where M is the modulation index and

, (19) Equation (19) can be expressed in terms of amplitude of carrier signal -by replacing with - . Because, in this topology, two identical reference signals are used, -and ./0 ./01

If M >1, higher harmonics in the phase waveform are obtained. Therefore, M is maintained between zero and one. If the amplitude of the reference signal is increased to be higher than the amplitude of the carrier signal, i.e., M >1, this will lead to overmodulation. Large values of M in sinusoidal PWM techniques lead to full overmodulation. Equations (17) and (18) define the modulation law, which is more commonly expressed in terms of and, by substituting from (5) and (7) to give

2 + , !" (20) 2 + , !" + (21)

Thus, the switching angles and for the kth pulse can be calculated from (20) and (21) in terms of modulation index M and angles and which depend upon the fundamental frequency and frequency ratio.

IV. IMPLEMENTATION OF SPWM USING TMS320F2812 The generation of the PWM in the TMS320F2812 DSP is

mainly controlled by the Event Manager (EV). The event manager (EV) modules provide a broad range of functions and features that are particularly useful in power electronics converters and motor drives applications [4]. The principles of Event Manager Modules and SPWM signal generation process are comprehensively described in the following sections.

A. TMS320F2812 Event Manager (EV) The EV modules include general-purpose (GP) timers, full-

compare/PWM units, capture units, and quadrature-encoder pulse (QEP) circuits. There are two event manager modules in TMS320 F2812 called EVA and EVB. TMS320 F2812 has six independent pairs of PWM outputs: three of which are controlled by EVA and the other three are controlled by EVB [5]. In this study, GP Timers, Full Compare/PWM Units and PWM outputs are used to generate the gating pulse for the power circuit of the inverter.

There are two general purpose (GP) timers that can work independently from each other. GP Timer 1 and 2 are controlled by EVA while GP Timer 3 and 4 are controlled by EVB. These timers are used to provide a time base for the operation of compare units and associated PWM circuits to generate the PWM outputs [5]. Each GP Timer has updown

counter TxCNT, compare register TxCMPR, period register TxPR, control register TxCON and direction input TDIRx registers. The simplified block diagram of GP Timer is shown in Fig. 5.

TxPRPeriod Register

TxCMPRCompare Register

TxCNTGPTimer Counter

GP Timer

Compare Logic

Carrier Signal Generator

TxPWMPWM Signal

Figure 5. PWM Signal Generation using EV.

Figure 6. a) Asymmetric mode b) Symmetric mode.

There are six compare units: three of which are in EVA module and the other three are in EVB module. These registers depend on the associated GP Timers to generate PWM signals. The generation of PWM patterns comprises the following steps: counting mode, GP Timer compare operation and carrier signal generation. Details of each step are mentioned below. There are two counting modes, controlled by the content of TxCON register that can be applicable to generate the carrier signal: continuous count up mode results in asymmetric and continuous count updown mode results in symmetric carrier

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waveform. The timer values are incremented by one for each GP Timer clock pulse. Fig. 6 shows the counting modes that can be used.

Each GP Timer has a compare register TxCMPR and an output pin TxPWM. During each timer period, the carrier signal is compared with the value stored in the compare register TxCMPR. The + sign in Fig. 7 represents the compare matches. Before the first match, PWMx+1 is in logic zero and PWMx is in logic one and the value of the compare register is greater than the value of the carrier signal. Between the first and second compare matches, the value stored in the compare register is smaller than the value of carrier signal, as a result of this, the PWM outputs change their states (PWMx+1 is logic one, PWMx is logic zero).

Figure 7. GP Timer Compare / PWM Output in Up-/Down-Counting Modes.

The frequency of the carrier signal depends on the GP Timer period. The oscillator signal XCLKIN is scaled several times to obtain GP Timer clock. The crystal oscillator generates a signal at 30-MHz (XCLKIN). Fig. 8 shows the block diagram of GP Timer frequency determination.

Figure 8. Determination of GP Timer frequency.

The period and frequency of the carrier signal are defined as:

3- 4 56789$:;>7:>?7@A=6BC375:> 4 DEFGH (22) For instance, the desired carrier signal in symmetric form is 2 kHz. Its period is calculated as 3- 2 IJK LMMN? . XCLKIN is 30 MHz. Using the default value of PLLCR [3-0], SYSCLKOUT becomes 150 MHz. Letting HISPCP [2-0] to be (011)2 = 3, then HSPCLK clock becomes SYSCLKOUT/6 = 25MHz. Adjusting T1CON [10-8] to be (000)2, GPTIMER1CLKIN equals HSPCLK = 25 MHz. According to carrier signal period and frequency equations 3- is computed as:

3- 56789$: 4 4 MA? (23)

The resulting amplitude is 6250. To get 2 KHz carrier signal the following parameters should be adjusted: PLLCR [3-0] = 10, HISPCP [2-0] = 3, T1CON [10-8] = 0, T1PR = 6250.

B. SPWM Generation In this work, the single-phase PWM inverter controller

model is developed in SIMULINK and experiments are performed by using eZdsp TMS320F2812 board. A SIMULINK model is constructed from blocks of the C2000 Embedded target Library which are used to represent algorithms and peripherals specific to the C2800 DSP family. A target preference block has to be added to the model, in this case the F2812 eZdsp block. It is not connected to any other blocks, but stands alone to set the target preferences for the model. However, it allows control build options for the compiler, assembler and linker which will be invoked to generate the executable image file for download to the DSP Texas Instruments.

The switching scheme implemented in this work is unipolar switching scheme. In this switching scheme, the switches in two legs of the full bridge inverter of Fig. 1 are not switched simultaneously. Leg A of the inverter turned on and off based on the comparison of modulating signal, OPwith the carrier signal while the turned on and off of leg B is based on comparison of the inverse modulating signal, OPwith same carrier signal. Fig. 9 illustrates the SIMULINK model for PWM inverter controller. The model consists of two sine wave blocks, two data type conversion units, C28x PWM and F2812 eZdsp board. The sine wave block provides a sine reference signal of the same frequency, amplitude and phase as that of the signal of interest. The sine wave generates signal in double data type and data type conversion is needed due to F2812 eZdsp works with uint16 (unsigned integer 16) data type.

Figure 9. SIMULINK model.

C28x PWM generates the PWM signals by comparing the sine wave with a carrier signal and configures the EV modules. This block enables us to activate one of the event manager modules EVA or EVB to generate the carrier signal waveforms. For the single-phase PWM schemes that apply to four switches in the full-bridge DC-AC converter described in Fig. 1, EVA block with four PWM outputs PWM1 to PWM4 can satisfy the gate control requirements. Each PWM output bit

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is used to control one IGBT switch in DC-AC converter. The implementation of SPWM in DSP is represented by the flow charts shown in Fig. 10.

Figure 10. Pulse characterization.FLOWchart

V. SIMULATION RESULTS In order to validate that the inverter can be practically

implemented, simulations were performed by using PSIM software. It also helps to confirm the PWM switching strategy which then can be implemented in a DSP. Fig. 11 shows the PWM switching strategy used in this work. It consists of two reference signals and a triangular carrier signal. Both the reference signals are compared with the triangular carrier signal to produce PWM switching signals for switches S1S4 as shown in Fig. 12. The unfiltered output voltage and current waveform are shown in Fig 13 while the filtered output voltage and current are shown in Fig. 14.

Figure 11. PWM switching strategy

Figure 12. SPWM switching pattern

Figure 13. Unfiltered inverter output voltage and current

Figure 14. Inverter output voltage and current

VI. EXPERIMENTAL RESULTS The switching scheme algorithm discussed so far has been

implemented and tested experimentally on a single-phase inverter. The algorithm of this inverter switching scheme is implemented in fix-point TMS320F2812. Measurements were recorded using four channel digital storage oscilloscopes, Tektronix TPS 2014.

PWM switching signals for the switches are generated by comparing a triangular carrier signal with two sinusoidal reference signals. The generated signals are shown in Fig. 15. SPWM 1 is the output from PWM1 and SPWM 2 is the output from PWM3 of the DSP. Fig. 16 shows experiment result of output inverter before filtering process. This figure shows that the output of the inverter before the filtering process is in unipolar PWM pattern. The waveforms of the output voltage and current after the filtering and amplification process are shown in Fig. 17. The waveform is pure sinusoidal with amplitude around 240 Vrms, 50Hz and THD is less than 3 %.

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Figure 15. SPWM1 and SPWM2 waveform generated by DSP (2V/div).

Figure 16. Output voltage (50V/div) and current (200mA/div) waveform of

single phase inverter before filter.

Figure 17. Output voltage (100V/div) and current (1A/div) waveform with

resistive load.

VII. CONCLUSION This paper presents implementation of a Digital Signal

Processor (DSP) based Sinusoidal Pulse Width Modulation (SPWM) for single phase inverter. It utilizes two sinusoidal reference signals and a carrier signal to generate PWM switching signals. The theoretical and experimental aspects related to generation of the DSP based SPWM, modulation law, and operational principle of the inverter were analyzed in detail. A digital sinusoidal pulse width modulation (DSPWM) algorithm is implemented in DSP TMS320F2812 using SIMULINK model constructed from blocks of the C2000 Embedded target Library which are used to represent algorithms and peripherals specific to the C2800 DSP family. Experimental results indicate that the THD of the inverter low and the efficiency of the inverter is around 88%.

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[2] O. Pop, G. Chindris and A. Dulf, Using DSP Technology for True Sine PWM Generators for Power Inverters, Electronics Technology: Meeting the Challenges of Electronics Technology Progress, pp. 141 - 146 vol.1, 27th International Spring Seminar on Volume 1, 13-16 May 2004.

[3] J. Selvaraj and N. A. Rahim, Multilevel Inverter For Grid-Connected PV System Employing Digital PI Controller, IEEE Transactions On Industrial Electronics, Vol. 56, No. 1, January 2009.

[4] L. Mihalache. "DSP Control Method of Single -Phase Inverters for UPS Applications ". IEEE Trans. On Industry Application. 2002, pp 590-595.

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