Embed Size (px)
Citation preview
DS26522DK
Dual T1/E1/J1 TransceiverDemo Kit
1 of 9 REV: 091806
www.maxim-ic.com
GENERAL DESCRIPTION The DS26522DK is an easy-to-use demo kit for the DS26522 T1/E1/J1 dual transceiver. The DS26522DK is a stand-alone system. The board comes complete with a transceiver, transformer, termination resistors, configuration switches, network connectors, microprocessor, and RS-232 connector. The on-board processor and Dallas’ ChipView software give point-and-click access to configuration and status registers from a Windows®-based PC. On-board LEDs indicate receive loss-of-signal and interrupt status, as well as multiple clock and signal routing configurations.
Windows is a registered trademark of Microsoft Corp.
DEMO KIT CONTENTS DS26522DK PCB CD_ROM Including:
ChipView Software DS26522 Definition files DS26522 Initialization files DS26522DK Data Sheet DS26522 Data Sheet
DS26522 Errata Sheet (if applicable)
FEATURES Demonstrates Key Functions of DS26522
T1/E1/J1 Dual Transceiver Includes Transceiver, Transformers, and
Termination Passives BNC Connections for 75Ω E1 RJ48 Connector for 120Ω E1 and 100Ω T1 On-Board Processor and ChipView Software
Provide Point-and-Click Access to the DS26522 Register Set
Accessible Address/Data Bus with Tri-State Control to Allow Interface for External Processor
All Equipment-Side Framer Pins are Easily Accessible for External Data Source/Sink
LEDs for Loss-of-Signal and Interrupt Status Easy-to-Read Silkscreen Labels Identify the
Signals Associated with All Connectors, Jumpers, and LEDs
ORDERING INFORMATION PART DESCRIPTION
DS26522DK Demo kit for DS26522
DS26522DK
2 of 23
TABLE OF CONTENTS 1. BOARD FLOORPLAN........................................................................................................3
2. PCB ERRATA.....................................................................................................................3
3. BASIC OPERATION...........................................................................................................4 3.1 HARDWARE CONFIGURATION...........................................................................................................4
3.1.1 General .................................................................................................................................................. 4 3.2 QUICK SETUP (REGISTER VIEW) ......................................................................................................4
3.2.1 Miscellaneous ........................................................................................................................................ 4 4. ADDRESS MAP..................................................................................................................5
5. TEST POINTS AND CONNECTORS .................................................................................5
6. ADDITIONAL INFORMATION/RESOURCES ....................................................................6 6.1 DS26522 INFORMATION..................................................................................................................6 6.2 DS26522DK INFORMATION.............................................................................................................6 6.3 TECHNICAL SUPPORT ......................................................................................................................6
7. COMPONENT LIST ............................................................................................................7
8. SCHEMATICS ....................................................................................................................9
LIST OF TABLES Table 4-1. Address Map .............................................................................................................................................. 5 Table 5-1. Main Board PCB Configuration .................................................................................................................. 5
DS26522DK
3 of 23
1. BOARD FLOORPLAN
1.2V FPGA SUPPLY BOARD POWER
5.0V DC JACK TEST POINTS:
DS26522 ADDRESS[12:0]
DATA[7:0] INT, CS, RW, RD
TEST POINTS: SPI_CPOL, SPI_CPHA, SPI_SWAP,
SPI_SEL, BTS, TXENABLE FPGA CONFIG PROM
5V PROCESSOR
FLASH SUPPLY
P O R T 1 T R A N S F O R M E R
B N C s , R J 4 5 INT LED
LATTICE
EC3 FPGA
DS26522JTAG
DS26522 RS-232 DB9
CONNECTOR
2. PCB ERRATA DS26522DK01A0 4/17/2006: A 100pF capacitor has been added between processor reset and VCC. This was added to eliminate crosstalk issues present in the OnCE programming pod.
FPGA JTAG
RLOS LED RLF LED
TEST POINTS: TSER, RSER, TSSYNCIO, TSYNC, RSYNC,
REFCLKIO, MCLK, RSIG, TSIG
TEST POINTS: BPCLK, MCLK,
RSYSCLK, TSYSCLK, TCLK, RCLK
TEST POINTS: RCHBLK_CLK,
RLF_LTC, AL_RSIGF, RM_RFSYNC, TCHBLK
CLK
P O R T 2 T R A N S F O R M E R
B N C s , R J 4 5 MMC2107 PROCESSOR
PROCESSOR SRAM OSCILLATOR
SELECTION 1.544MHz, 2.048MHz
DS26522DK
4 of 23
3. BASIC OPERATION This design kit relies upon several supporting files, which are available for downloading on our website at www.maxim-ic.com/DS26522DK QuickView page.
3.1 Hardware Configuration
• Supply 5.0V to the wall jack receptacle on the bottom of the PCB.
• Install the following jumpers (see Table 5-1):
o JP06: MCLK driven by 1.544MHz for T1. (Set E1 for 2.048MHz.)
o JP01, JP03: RSYSCLK driven by MCLK.
o JP02, JP04: TSYSCLK driven by MCLK.
o JP09, JP12: TCLK driven by MCLK.
o JP16 SPI_SEL to GND. JP17 BTS to VCC. JP18, JP19 TXENABLE to VCC.
• From the Programs menu, launch the host application named ChipView.exe. Run the ChipView application. If the default installation options were used, click the Start button on the Windows toolbar and select Programs → ChipView → ChipView.
3.1.1 General
Upon power-up, the RLF and AL_LOS LEDs (red) will be lit, but the INT LED (red) will not be lit. The board draws approximately 200mA at power-up.
3.2 Quick Setup (Register View)
1) The PC loads ChipView, offering a choice among DEMO MODE, REGISTER VIEW, and TERMINAL MODE. Select REGISTER VIEW.
2) The program will request a definition file. Navigate to the .def files in the T1 or E1 folder, then select the file named DS26522_GLB_T1_DEV1.def (T1 mode) or DS26522_GLB_E1_DEV1.def (E1 mode). Note: Through the Links section, this will also load the LIU def file and framer def file.
3) Repeat Step 2 for DS26522_GLB_T1_DEV2.def (or DS26522_GLB_E1_DEV2.def).
4) The Register View Screen will appear, showing the register names, acronyms, and values for the DS26522.
5) Predefined register settings for several functions are available as initialization files.
o .ini files are loaded by selecting the menu File→Reg Ini File→Load Ini File. o Load the .ini file Load_T1_LBO0_0_133_impMatchOn_DEV1.ini (T1 mode) or
Load_E1_75_impMatchOn_DEV1.ini (E1 mode). o Load the .ini file Load_T1_LBO0_0_133_impMatchOn_DEV2.ini (T1 mode) or
Load_E1_75_impMatchOn_DEV2.ini (E1 mode).
6) After loading the .ini file, the following may be observed:
o The DS26522 begins transmitting AIS with impedance match. o The AL_LOS LEDs extinguishes upon external loopback.
3.2.1 Miscellaneous
The DS26522 uses three register definition files. All three files are loaded when the DS26522_GLOBAL*.def file is loaded. Individual files are selected from the Def File Selection menu in ChipView.
DS26522DK
5 of 23
4. ADDRESS MAP The on-board microcontroller is configured to start the user address space at 0x81000000. All offsets given in Table 4-1 are relative to the beginning of the user address space.
Table 4-1. Address Map
OFFSET DEVICE DESCRIPTION 0X0000 to
0X0087 FPGA Board identification and FPGA test registers
0X2000 to 0X3FFF DS26522 DS26522 framer, LIU, and BERT registers on CS1
0X4000 to 0X5FFF DS26522 DS26522 framer, LIU and BERT registers on CS2
5. TEST POINTS AND CONNECTORS The DS26522DK has several connectors, test points, oscillators, and jumpers. Table 5-1 provides a description of these signals, given in order of appearance on the PCB from left to right, then top to bottom (with the board held so that the RS-232 connector is on the top edge).
Table 5-1. Main Board PCB Configuration
SILKSCREEN REFERENCE FUNCTION DEFAULT
SETTING SCHEMATIC
PAGE DESCRIPTION
JB01 (PCB bottom side)
Power supply 5.0V 3 System VDD. Always connected to power supply.
DS01 LED On (green) 3 Power OK LED.
J02 RS-232 Connector
Connected to host PC 6
Used for communication with host PC. Basic setting is 57.6K baud, 8 bits, no stop bit, 1 parity bit (57.6, 8, N, 1).
J01 OnCE BDM Connector — 6 OnCE debug connector for MMC2107
processor. SW01 System Reset — 4 System reset. Connects to all device reset pins.
J03 Flash VPP Jumper Not Installed 6 Provides flash programming voltage (5V) to
processor. J04 Lattice FPGA — 9 JTAG connector for Lattice EC3 FPGA.
DS04, DS06 LED — 11 DS26522 LEDs. Analog loss or receive signaling freeze or framer LOS.
DS05, DS07 LED — 11 DS26522 LEDs. Receive loss of frame or loss of transmit clock.
J05 DS26522 Test points — 10 DS26522 JTAG chains.
J06 DS26522 Test points — 14 DS26522 test points for RCHBLK, TCHBLK,
RMSYNC, REFCLKIO.
JP01, JP03 RSYSCLK Selection
Jumpered Pins 1+2
14 RSYSCLK selection: MCLK (default), BPCLK.
JP02, JP04 TSYSCLK Selection
Jumpered Pins 1+2
14 TSYSCLK selection: MCLK (default), BPCLK.
JP05 BPCLK MUX Jumpered Pins 1 + 2
14 BPCLK mux, driven to pin 3 of JP01, JP02, JP03, JP04.
J07 DS26522 Test points — 14 DS26522 test points for RSYNC, TSYNC, and
TSSYNCIO. YB01, YB02
(PCB bottom side) Oscillators — 14 Oscillators for 2.048MHz and 1.544MHz.
J08, J09 Test points — 8 Test points for DS26522 address/data bus and control lines.
DS26522DK
6 of 23
SILKSCREEN REFERENCE FUNCTION DEFAULT
SETTING SCHEMATIC
PAGE DESCRIPTION
J09.12 + J09.14 Bus Tri-state Not Jumpered 8 Install jumper to tri-state the FPGA pins that connect to the DS26522.
JP06 MCLK Selection Jumpered Pins 2+3
14 MCLK Selection: 1.544MHz, 2.048MHz (default).
JP09, JP12 TCLK Selection Jumpered Pins 1+2
14 TCLK Selection: MCLK (default), RCLK.
JP07, JP08 TSER Selection Not Jumpered 14 TSERx Selection: RSER2, RSER1. JP14, JP11 TSIG Selection Not Jumpered 14 TSIGx Selection: RSIG2, RSIG1.
JP10 SPI_CPOL Bias Not Jumpered 10 SPI_CPOL Selection: pulldown, pullup. JP13 SPI_CPHA Bias Not Jumpered 10 SPI_CPHA Selection: pulldown, pullup JP15 SPI_SWAP Bias Not Jumpered 10 SPI_SWAP Selection: pulldown, pullup
JP16 SPI_SEL Bias Jumpered Pins 1+2
10 SPI_SEL Selection: pulldown (default), pullup.
JP17 BTS Bias Jumpered Pins 2+3
10 BTS Selection: pulldown, pullup (default).
JP18, JP19 TXENABLE Bias Jumpered Pins 2+3
10 TXENABLE Selection: pulldown, pullup (default).
J15 + J14 Network BNC J11 Network RJ48
— 12 Port 2 BNC for 75Ω network connection and RJ48 network connection.
J12 + J13 Network BNC J10 Network RJ48
— 13 Port 1 BNC for 75Ω network connection and RJ48 network connection.
6. ADDITIONAL INFORMATION/RESOURCES
6.1 DS26522 Information For more information about the DS26522, refer to the DS26522 data sheet at www.maxim-ic.com/DS26522.
6.2 DS26522DK Information For more information about the DS26522DK including software downloads, refer to the DS26522DK Quick View page at www.maxim-ic.com/DS26522DK.
6.3 Technical Support For additional technical support, e-mail your questions to [email protected].
DS26522DK
7 of 23
7. COMPONENT LIST DESIGNATION QTY DESCRIPTION SUPPLIER PART
C01, CB08, CB11-CB13, CB16, CB18, CB21, CB31, CB34-CB36, CB38-CB40
15 0.1µF ±10%, 16V ceramic capacitors (0603) Phycomp 06032R104K7B20D
C02 1 1µF ±10%, 16V ceramic capacitor (1206) Panasonic ECJ-3YB1C105K
C03, C04, CB01, CB02 4 10F ±20%, 10V ceramic capacitors (1206) Panasonic ECJ-3YB1A106M
CB03, CB05 2 68µF ±20%, 16V tantalum capacitors (D case) Panasonic ECS-T1CD686R
CB04 1 470µF ±20%, 6.3V tantalum capacitor (D case) Digi-Key 399-3002-1-ND
CB06, CB09, CB15, CB17, CB19, CB25, CB27, CB29, CB32, CB41,
CB42
11 10µF ±20% 10V ceramic capacitors (1206) Panasonic ECJ-3YB1A106M
CB07, CB24, CB26, CB28, CB43, CB44
6 0.1µF ±20%, 16V X7R ceramic capacitors (0603) AVX 0603YC104MAT
CB10, CB14, CB20, CB22, CB23, CB30, CB33, CB37
8 4.7µF, 6.3V multilayer ceramic capacitors (0603) Digi-Key ECJ-1VB0J475M
CB45, CB46 2 560pF ±5%, 50V ceramic capacitors (1206) Digi-Key 478-1489-2-ND
DB01 1 1A, 40V Schottky diode Internatioanl Rectifier 10BQ040
DS01 1 Green LED (SMD) Panasonic LN1351C
DS02 1 Green LED (SMD) Panasonic LN1351C
DS03–DS07 5 Red LEDs (SMD) Panasonic LN1251C
GND_TP02, GND_TP19–GND_TP22, GND_TP24
6 Standard ground clip Keystone Electronics 4954
H01, H02, H04, H07, h08, H09 6 Kit, 4-40 hardware, 0.50 nylon standoff and nylon
hex-nut — 4-40KIT4
J01 1 100-mil 2-7 position jumper Lab Stock —
J02 1 DB9 right-angle connector (long case) AMP 747459-1
J03 1 100-mil 2-position jumper Lab Stock —
J04, J05, J06 3 10-pin terminal strip headers (dual row, vertical) Samtec TSW-105-07-T-D
J07 1 14-pin header (dual row, vertical) Samtec HDR-TSW-107-14-T-D
J08, J09 2 14-pin headers (dual row, vertical) NON POPULATED Samtec NOPOP-HDR-TSW-
107-14-T-D
DS26522DK
8 of 23
DESIGNATION QTY DESCRIPTION SUPPLIER PART
J10, J11 2 8-pin single-port connectors (RJ48) Molex 15-43-8588
J12–J15 4 5-pin right-angle BNC connectors Trompetor UCBJR220
JB01 1
2.1mm/5.5mm closed frame power jack, high current (right angle PCB, 24VDC at 5A) Also requires 5V AC-DC adapter. Input: 100–240VAC, 50–60Hz, 0.6A. Output: DC 5V, 2.6A. PN DMS050260-P5P-SZ. Model 3Z-161WP05
CUI Inc. PJ-002AH
JP01–JP09, JP10–JP19 19 3 position jumpers (100 mils) Lab Stock —
R01, R02, RB28, RB41, RB42, RB43, RB48–RB52
11 1.0kΩ ±5%, 1/16W resistors (0603) Panasonic ERJ-3GEYJ102V
R03–R09, R10, RB09 9 0Ω ±5%,1/8W resistors (1206) Panasonic ERJ-8GEYJ0R00V
RB01–RB06, RB11–RB17, RB20, RB21, RB23, RB30
17 10kΩ ±5%, 1/16W resistors (0603) Panasonic ERJ-3GEYJ103V
RB07 1 1.0MΩ ±5%, 1/16W resistor (0603) Panasonic ERJ-3GEYJ105V
RB08, RB24, RB32–RB35 6 330Ω ±5%, 1/16W resistors (0603) Panasonic ERJ-3GEYJ331V
RB10, RB19, RB25, RB26, RB31, RB38, RB39, RB40
8 10kΩ ±5%, 1/16W resistors (0603) Panasonic ERJ-3GEYJ103V
RB18 1 1.0kΩ ±5%, 1/16W resistor (0603) Panasonic ERJ-3GEYJ102V
RB22 1 330Ω ±5%, 1/16W resistor (0603) Panasonic ERJ-3GEYJ331V
RB27 1 0.0Ω ±5%, 1/16W resistor (0603) Panasonic ERJ-3GEY0R00V
RB29 1 10kΩ ±1%, 1/10W resistor (0805) Panasonic ERJ-6ENF1002V
RB36, RB37 2 30Ω ±5%, 1/16W resistors (0603) Panasonic ERJ-3GEYJ300V
RB44–RB47 4 61.9Ω ±1%, 1/10W resistors (0805) Panasonic ERJ-6ENF61R9V
RB53, RB54 2 51.1Ω ±1%, 1/10W resistors (0805) Panasonic ERJ-6ENF51R1V
RPB01–RPB07 7 30Ω ±5% 4-pack resistors (0402) Panasonic EXB-N8V300JX
SW01 1 4-pin single-pole switch Panasonic EVQPAE04M
TB01, TB02 2 16-pin SMT transformers Pulse Engineering TX1099
TP01, TP02 2 1 plated hole test points DO NOT STUFF Lab Stock —
U01, U04 2 Cypress SRAM Lab Stock —
U02 1 3V to 5V Regulating charge pump Maxim MAX1686HEUA
U03 1 Processor Freescale Semiconductor MMC2107
DS26522DK
9 of 23
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products , 120 San Gabrie l Dr ive , Sunnyvale , CA 94086 408-737-7600
© 2006 Maxim Integrated Products The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
DESIGNATION QTY DESCRIPTION SUPPLIER PART
U05 1 1.2V FPGA (144-pin, 20mm x 20mm TQFP) Lattice LFEC3E-3T144C
U06 1 Dual T1/E1/J1 transceiver (144-pin, 12mm x 12mm CSBGA)
Dallas Semiconductor DS26522
UB01 1 Dual RS-232 transceivers with 3.3V/5V internal capacitors Maxim MAX3233E
UB02 1 Linear regulator (1.5W, 3.3V or adjustable, 1A, 16-pin TSSOP-EP) Maxim MAX1793EUE-33
UB03 1 Microprocessor voltage monitor (2.93V reset, 4-pin SOT143) Maxim MAX811SEUS-T
UB04 1 2Mb High-speed serial flash memory (2.7V to 3.6V, 8-pin SO) Atmel AT25F2048N-
10SU-2.7
UB05 1 300mA LDO regulator with RESET (1.20V output, 6-pin thin SOT23-6) Maxim MAX1963EZT120-T
UB06, UB07 2 High-speed buffers Fairchild NC7SZ86
XB01 1 8.0MHz low-profile crystal ECL EC1-8.000M
YB01 1 3.3V 1.544MHz crystal clock oscillator SaRonix NTH 039A3-1.5440
YB02 1 3.3V 2.048MHz crystal clock oscillator SaRonix NTH 039A3-2.0480
8. SCHEMATICS The DS26522DK schematics are featured in the following 14 pages.
MIC
RO
PR
OC
ES
SO
RH
IER
AR
CH
YB
LO
CK
PA
GE
S04-0
9D
S26522
HIE
RA
RC
HY
BLO
CK
PA
GE
S10-1
4
HIE
RA
RC
HY
BLO
CK
.T
HE
SE
SIG
NA
LS
AP
PE
AR
AS
PIN
SO
NT
HE
HIE
RA
RC
HY
BLO
CK
CO
NN
EC
TO
RO
NLY
SIG
NA
LS
WIT
HIM
PO
RT
/OU
TP
OR
TC
ON
NE
CT
OR
SH
AV
EC
ON
NE
CT
ION
OU
TS
IDE
TH
EN
OT
ES
:E
AC
HH
IER
AR
CH
YB
LO
CK
ISIN
DE
PE
ND
EN
TO
FT
HE
NE
XT
.
CO
NT
EN
TS
PA
GE
S03-0
3:
PO
WE
RS
UP
PLY
PA
GE
S04-0
9:
MIC
RO
PR
OC
ES
SO
RA
ND
INT
ER
FA
CE
PA
GE
S10-1
4:
DS
26522
DE
VIC
E,
LIN
EB
UIL
DO
UT
AN
DT
ES
TP
OIN
TS
PA
GE
02:
DE
CO
UP
LIN
G/
MO
UN
TIN
GH
OLE
SP
AG
E01:
DS
26522
DE
SIG
NK
ITT
OP
LE
VE
LH
IER
AR
CH
YB
LO
CK
S
HIE
RA
RC
HY
BL
OC
KS
:D_D
UT
<7..0>
WR
_D
UT
CS
_X
2
INT
_2
CS
_X
1
RD
_D
UT
RE
SE
T_
DU
T
A_
DU
T<
12
..0
>
I9
CR
-1:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1
DS
26522D
KT
OP
LE
VE
L0
4/1
7/2
00
6
BLO
CK
NA
ME
:_ds26522to
pdn_.
PA
RE
NT
BLO
CK
:<
CO
N_P
AR
EN
T_N
AM
E>
ST
EV
ES
CU
LLY
1/1
4(T
OT
AL)
1/2
(BL
OC
K)
DS
26522D
K01A
0
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
_D
S26522D
K01A
0D
UT
DN
_
CS
_X
2
INT
_D
UT
CS
_X
1
RD
_D
UT
WR
_D
UT
D_D
UT
<7..0>
RE
SE
T_D
UT
A_D
UT
<12..0>
_m
otp
rocre
scard
_dn
SP
I_M
ISO
SP
I_M
OS
I
SP
I_S
CK
SP
I_C
S
RE
SE
T
CS
_X
1
CS
_X
2
INT
2
INT
3
INT
5
D_D
UT
<7..0>
WR
_D
UT
RD
_D
UT
CS
_X
5
CS
_X
4
CS
_X
3
INT
4
A_D
UT
_<
12..0>
PA
GE
S03-0
3P
OW
ER
SU
PP
LY
HIE
RA
RC
HY
BLO
CK
0.1UF
2
0.1UF
CB12
1
CB35
1
GN
D_T
P19
GN
D_T
P02
H0
9
CB17
10UF
CB15
10UF
CB29
10UF
CB32
10UF
CB41
10UF
CB42
0.1UF4.7UF
10UF
CB06
10UF
CB04
470UF
GN
D_T
P22
GN
D_T
P24
GN
D_T
P20
H0
4H
07
H0
1H
02
H0
81
1
0.1UF
CB39
CB362
2
0.1UF
CB402
0.1UF
12
CB31 1
12
0.1UF
1
0.1UF
CB16
CB082
2 1
1
0.1UF
CB382
CB20
4.7UF
CB37
4.7UF
CB33
0.1UF
0.1UF
CB342
1
0.1UF
CB212
4.7UF
CB14
4.7UF
CB23
4.7UF
CB10 CB182 1
1
0.1UF
C012
0.1UF
1CB112
4.7UF
CB22
4.7UF
CB30
GN
D_T
P21
2/1
4(T
OT
AL
)
BLO
CK
NA
ME
:_ds26522to
pdn_.
PA
RE
NT
BLO
CK
:<
CO
N_P
AR
EN
T_N
AM
E>
ST
EV
ES
CU
LLY
2/2
(BLO
CK
)
04/1
7/2
006
DS
26522D
K01A
0
CR
-2:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
2
21
11
11
11
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
44
4
PO
WE
R_S
UP
PLY
RE
GU
LA
TO
R_IN
PU
TR
EG
ULA
TO
R_O
UT
PU
T
RE
SE
T_O
UT
44
4
V3
_3
V3
_3
V3
_3
RE
VE
RS
EB
IAS
PR
OT
EC
TIO
N
5V
DC
PO
WE
RS
UP
PL
Y
3.3
V1
%R
EG
UL
AT
OR
EN
DO
FP
OW
ER
SU
PP
LY
HIE
RA
RC
HY
BLO
CK
BE
GIN
NIN
GO
FP
OW
ER
SU
PP
LY
HIE
RA
RC
HY
BLO
CK
10UF
10UF
GREEN
RE
GU
LA
TO
R_O
UT
PU
T
68UF
68UF
10UF
10UF
RE
SE
T_
OU
T
1A
MP
RE
SE
T_
OU
T
RE
GU
LA
TO
R_IN
PU
T
3.3
V
RE
GU
LA
TO
R_O
UT
PU
T
10K
330
RE
GU
LA
TO
R_IN
PU
T
UB
02
DB
01
RB08
DS01
RB10
CB01
C03
CB02
C04
CB03
CB05
3A6<
3A
4<
>3A
6<
>
3/1
4(T
OT
AL)
DS
26522D
K01A
0
ST
EV
ES
CU
LLY
04/1
7/2
006
1/1
(BLO
CK
)
BLO
CK
NA
ME
:pow
er_
supply
_1am
p_dn.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
CR
-3:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
2_I2
30@
MO
DU
LE
S.P
OW
ER
_S
UP
PLY
_1A
MP
_D
N(S
CH
_1):
PA
GE
1
1 2
21
JB
01
21
21
15
6 7
13
542
1710111412
3
21
21
3D4>
3C8>
3D7<
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
MA
X1793_U
IN2
OU
T1
OU
T3
SE
T
GN
D
GN
D
IN1
IN3
IN4
OU
T2
SH
DN
RS
T
OU
T4
OU
T
INO
UT
BE
GIN
NIN
GO
FP
RO
CE
SS
OR
HIE
RA
RC
HY
BL
OC
K
PQB0
PQB2
PQB3 KIT_STATUS
INT2
1UF
17T
C2
TA
RCON
OE
VRH
TEA
RW
SC
I1_
IN
USER_LED1
SC
I2_
OU
T
ICO
C10
TE
ST
ICO
C13
ICO
C12
ICO
C11
ICO
C21
ICO
C20
ICO
C23
ICO
C22
PQA4
PQA3
PQA0
PQA1C
S3
TC
1
ONCE_TDI
2107_TDO
CS
E1
EB3
PQB1
EB1
EB2
CS
E0
CS
2
CP
UC
LK
_O
UT
YCO
XTAL
INT4
RUN_KIT_USR
USER_LED2
INT3
SC
I2_
IN
SC
I1_
OU
T
25
20
2.9
3V
22 13 12 11 10
89 7 6 5 3
21
4 1 0
.1UF
0.0
20
0
2
3
4
5
31 30 29
27
19
28
26
24
23
6
7
8
9
10
21 1819 17
18
16 13 12 11
16 15 14
GN
D
PA<22..0>
2
1
22 15 14
VD
DS
YN
FLASH_VPP
PR
OC
_R
ES
ET
1.0
K
RE
SE
T
SP
I_S
CK
EB0
ON
CE
_D
E_
B
PR
OC
_R
ES
ET
_O
UT
CS
0
CS
1
SP
I_C
S
PR
OC
_R
ES
ET
SPI_MOSI
SPI_MISO
OSC_MCU
ONCE_TCLK
ONCE_TRST_B
ONCE_TMS
TIM_16H_8L
PD
<31..0>
CB07
RB09
SW
01
UB
03
U0
3
U0
3
C02
R01
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
4/1
4(T
OT
AL)
ST
EV
ES
CU
LL
Y
04
/17
/20
06
1/6
(BL
OC
K)
DS
26
52
2D
K0
1A
0
PR
INT
ED
Fri
Aug
04
13:5
8:1
62006
CR
-4:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
1 4 3
1 2
3 1
4 2
45
9
19
17 20
21 22
25
27 30 31 34 3516151210
754321
36
37
38
39
40
41
42
43
46
48
51
114
73
126
140
127
76
64
44
32
18
8
50
49
47
29
28
26
24
231311613
9
13
7
13
6
13
4
13
2
131
12
2
121
11
9
11
7
11
6
14
4
14
112
59
65
33
123
141
129
77
87
115
74
103
102
92
113
95
97
99
69
68
82
84
75
79
124
91
90
80
71
138
86 11
8
12
8
12
0
93 14
3
83
85
62
67
98
100
101
104
105
106
88
96
60
135
133
78
81
110
111
109
108
107
94
142
130
125
53
52
55
54
58
57
56
72
63
61 66
89
70
6A3<
1D7^8C5<8C3<8B6<>7C4<>
5D6<
7D5<> 5B7<> 5B4<>
7D5<>
6B
8>
6D3<>
6D3<>
7D4<> 5B4<>
7D
5<
> 7C
8<
>
6C5<>
8C5<8C3<
8C5<8C3<8B6<>
6B
8<
6B1<>
6C
3<
>4B
5<
>
1C
7^
9B
4<
8C
2>
7C
8<
>
7D5<> 5B7<>
6C
2<
>
7D
5<
>5B
7<
>5B
3<
>
7D
5<
>
4A
4<
6C
3<
>
6D5<>
6C3<>
6C2<>
6C1<>
7D
65D
7<
5C
7<
5A
6>
5A
2>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
OU
T
OU
T
IN
OUT
MM
C2107
CO
NT
RO
L
RX
D1
INT7*
TX
D2
ICO
C10
TE
ST
INT1*
ICO
C13
ICO
C12
ICO
C11
ICO
C21
ICO
C20
ICO
C23
ICO
C22
EXTAL
TCLK
TRST*
SS
*
PQB0
PQA4
PQA3
PQA0
PQA1
CS
3*
TC
1
TDI
TDO
CS
E1
EB3*
INT6*
PQB1
PQB2
PQB3
EB0*
EB1*
EB2*
TC
2
CS
E0
CS
1*
CS
2*
DE
*
SC
K
RS
TO
UT
*
CLK
OU
T
RE
SE
T*
CS
0*
TMS
INT0*
YC0
MOSI
MISO
XTAL
INT3*
INT2*
INT5*
INT4
RX
D2
TX
D1
MM
C2107
PO
RT
TA*
SHS*
OE*
VRH
VSTBY
TEA*
VDDH
VDDF
VDDA
VPP
VDD6
VDD7
VDD8
VDDSYN
VDD3
VDD5
RW
VRL
A8
D3
1
A22
A2
1
A20
A19
A18
A1
7
A16
A15
A14
A13
A12
A1
1
A10 A9
A7
A6
A5
A4
A3
A2
A1
A0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSSSYN
VSSF
VSSA
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D30
D29
D28
D2
7
D26
D25
D24
D23
D22
D2
1
D1
1
D12
D13
D14
D15
D16
D1
7
D18
D19
D20
VDD2
VDD1
VDD4
V3
_3
MA
X811_U RE
SE
T*
VC
C
GN
D
MR
*
V3
_3
XT
AL
W/
PL
L
BO
OT
INT
ER
NA
LD
18
HA
SA
10
KL
OA
DT
OG
ND
D1
8H
AS
A1
0.5
KL
OA
DT
OV
3V
BO
OT
EX
T
WH
EN
SE
TF
OR
INT
ER
N/E
XT
ER
N
BO
OT
RE
SE
TC
ON
FIG
UR
AT
ION
FU
LL
DR
IVE
MA
ST
ER
MO
DE
INT
ER
NA
L
FL
AS
HE
NA
BL
E
PA
<17..1>
PD
<1
8>
PD
<1
9>
PD
<2
8>
PD
<2
2>
PD
<2
3>
PD
<2
1>
PD
<1
6>
PD
<1
7>
PD
<2
6>
16
10K
10K
10K
10K
10K
10K
10K
17
10K
10K
20 19
24
21
25
26
27
28
293031
10K
22
9101112131416
8
7
6
5
4
3
2
1
1517
OE
EB0
CS0
CY
62
12
8V
PA
<17..1>
CY
62
12
8V
OE
EB1
CS0
RC
ON
23
PD
<23..16>
18
PD
<31..24>
10
11
12
13
14
15
16
17
1 2 3 4 5 6 7 8 9
U04
RB
15
1
12
U0
1
RB
12
1
12
RB
11
1
21
RB
17
1
21
RB
21
RB
14
1
12
RB
13
1
12
RB
23
RB
16
1
12
RB
20
DS
26
52
2D
K0
1A
0
ST
EV
ES
CU
LL
Y
04
/17
/20
06
2/6
(BLO
CK
)
5/1
4(T
OT
AL
)
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
CR
-5:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
2
21 20 19 18 17 15 14 13
27
26
23
254
283
31
2
32
16
24
29
1
12
11
10
9
8
7
6
5
30
22
21 20 19 18 17 15 14 13
27
26
23
254
283
31
2
32
16
24
29
1
12
11
10
9
8
7
6
5
30
22
21
21
21
7B
85A
54A
1>
7D
65A
2>
4A
2>7
D6
5A
6>
4A
2>
7D
65A
2>
4A
2>
7D
65A
2>
4A
2>
7D
65A
2>
4A
2>
7D
65A
2>
4A
2>
7D
65A
2>
4A
2>
7D
65A
6>
4A
2>
7B
85A
84A
1>
7D5<> 5B7<> 4D3<>
7D4<> 4D7<>
7D5<> 5B7<> 4B5<>
4D
3<
>
7D
65D
7<
5C
7<
4A
2>
7D
65D
7<
5C
7<
4A
2>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
V3
_3
CY
62128V
CE1*
CE2
A7
A6
A5
A4
A3
A2
A1
A0
N_C
WE*
OE*
GND
VCC
A16
A15
A14
A13
A12
A11
A10
A9
A8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
V3
_3
CY
62128V
CE1*
CE2
A7
A6
A5
A4
A3
A2
A1
A0
N_C
WE*
OE*
GND
VCC
A16
A15
A14
A13
A12
A11
A10
A9
A8
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
V3
_3
BU
TD
ON
OT
PO
PU
LA
TE
AL
IGN
KE
Y
PL
AC
EP
AD
SF
OR
CA
P
HA
SB
EE
NA
DD
ED
BE
TW
EE
NP
RO
C_R
ES
ET
AN
DV
CC
NO
TE
:A
100P
FC
AP
AC
ITO
R
TH
ISA
DD
ITIO
NIS
NO
TS
HO
WN
INT
HE
SC
HE
MA
TIC
(SE
EE
RR
AT
AS
EC
TIO
NO
FD
ES
IGN
KIT
US
ER
MA
NU
AL)
10K
1RB06
12
CB
13
CB09
U0
2
12
1 RB
22
DS
02
J0
3
2 11
RB18
XB
01
1 21
RB07
RB01
1 21
RB05
J0
2
1 21
RB02
1 21
RB03
UB
01
RB04
2
1
J01
FL
AS
H_
VP
P
10UF
330
ON
CE
_T
DI
21
07
_T
DO
ON
CE
_T
CL
K
PR
OC
_R
ES
ET
8.0
MH
Z
1.0M
10K
10K
10K
10K
10K
XT
AL
PR
T1
_O
UT
PR
T1
_IN
OS
C_
MC
U
CO
N1
4P
ON
CE
_T
MS
ON
CE
_D
E_
B
ON
CE
_T
RS
T_
B
SC
I1_
OU
T
SC
I1_
IN
PR
T1
_O
UT
1.0K
GR
EE
N
KIT
_S
TA
TU
S
0.1
UF
PR
T1
_IN
3/6
(BLO
CK
)
04
/17
/20
06
ST
EV
ES
CU
LL
Y
DS
26
52
2D
K0
1A
0
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
6/1
4(T
OT
AL
)
CR
-6:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
3
13
975
11
31
10 12864 142
2 1
20
1 84 5 6 7 9
10111213141516171819
32
95421 3
6 7 8
2 1
1 2
21
12
3 28
6
4
5
1
7
4D3<
4D
6<
>
4D
6<
>
4A
6<
>
4B
5<
>4A
4<
4A
7<
>
6B
8>
6B
8<
4A
6<
>
4A
6<
>
4B
5<
>
4A
6<
>
4B
8<
>
4B
8<
>
6A
8<
>
4A
7<
>
6A
8<
>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
V3
_3
MA
X1686_U
CXP
V3/5
*
PGND
GND
CXN
OU
TS
HD
N
IN
V3
_3
V3
_3
V3
_3
CO
NN
_D
B9P
HGF
CA B D EJ
V3
_3
MA
X3233E
INV
ALID
*
T2IN
T2O
UT
GN
D
V-
C2-
C2+
C1-
C1+
V+
2
V+
1F
OR
CE
OF
F*
VC
C
T1O
UT
R1O
UT
FO
RC
EO
N
T1IN
R1IN
R2O
UT
R2IN
V3
_3
CO
N14P
ME
M_S
CK
MU
ST
BE
AT
PIN
77
FO
RT
QF
P144
TR
IST
AT
E_A
D_B
US
7
4
3
97_IO
ME
M_
SO
US
ER
FP
GA
2
0.0
INT
5
330
INT
_LE
D
AL
E_
DU
T
WR
_D
UT
PD
<31..16>
23
CS_X1
CS_X2
RE
SE
T
CS2
CS1CS0
RW
OE
INT
2
RD
_D
UT
0
1
2
3
4
5
6
7
D_
DU
T<
7..0
>
PA
<16..0>
16
17
18
19
20
21
22
24
25
26
28
30
31
29
27
CP
UC
LK
_O
UT
0
1
2
5
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
ME
M_
SC
K
EB0
EB1
ME
M_
CS
ME
M_S
I
CS_X3
CS_X4
CS_X5
9
12
6
A_
DU
T_
<1
2..
0>
8
U0
5
RB
24
DS
03
RB
27
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
04
/17
/20
06
ST
EV
ES
CU
LL
Y
DS
26
52
2D
K0
1A
0
4/6
(BLO
CK
)
7/1
4(T
OT
AL
)
CR
-7:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
4
85
87
88
127
77
8
75
74
76
78
79
82
8310
0
101
10
2
10
3
10
5
10
4
10
7
10
6
124
123
122
138
137
121
119
118
120
116
115
114
113
112
111
6 75432
69
70
68
66
64
6132
39
41
42
43
45
46
47
48
50
49
53
56
34 353330 3129
23
22
2120
57
62
65
67
40141
142
135
60
59
58
51
140
139
25
26
27
1348
6
81
131
132
133
129
130
9
8B
6<
>9C
8>
8C
5<
8C
3<
1C
7^
8B
2>
8A
6<
>
5D
7<
5C
7<
5A
6>
5A
2>
4A
2>
1C7^8B2>8A6<>
1C7^8B2>8A6<>
1C
7^
9B
4<
8C
2>
4A
4<
>
4C5<>
4B5<>
4D4<>
1D
7^
8C
5<
8C
3<
8B
6<
>4A
7<
>
1C
7^
8B
2>
8A
6<
>
1C
7^
8A
68B
2<
>
4B
5<
>
5B7<> 4D7<>
5B4<> 4D7<>
9B
8<
9C
8<
8B2>8A6<>
8B2>8A6<>
8B2>
1C
7^
8B
78B
2>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
V3
_3
BANK3
LF
EC
_T
14
4_
U
BA
NK
0
I/O
PO
RT
BANK6
BA
NK
4B
AN
K5
BA
NK
1
BANK2
INP
UT
PLL
PL
LIN
PU
T
PL
LIN
PU
T
BANK7
INP
UT
PLL
INPUTPLL
PLLINPUT
PL9B
/PC
LK
C7_0
PT16B/VREF1_0
PT17A/PCLKT0_0
PT15A
PT15B
PT16A/VREF2_0
PR
14A
/RLM
0_P
LLT
_F
B_A
PR
12A
/DO
UT
/CS
O*
PT14B
PL14A
PL13B
PL13A
PT12B
PT12A
PB17A/PCLKT5_0
PB19A/VREF1_4
PB19B/CS*
PB20A/VREF2_4
PT14A/TDQS14
PT10A
PT10B PB10B
PB23A
PB22A/BDQS22
PB21A/D2/SPID5
PB18B/CS1*
PL11A
/LLM
0_P
LLT
_IN
_A
PL11B
/LLM
0_P
LLC
_IN
_A
PL12A
/LLM
0_P
LLT
_F
B_A
PL12B
/LLM
0_P
LLC
_F
B_A
PL14B
PL15B
PL15A
/LD
QS
15
PL16B
PL18B
/VR
EF
2_6
PL18A
/VR
EF
1_6
PB18A/WRITE*
PB17B/PCLKC5_0
PB16A/VREF2_5
PB16B/VREF1_5
PB15B
PB15A
PB14B
PB14A/BDQS14
PB13B
PB11B
PB11A
PB10A
PL16A
PB20B/D0/SPID7
PB21B/D1/SPID6
PB22B/D3/SPID4
PB23B/D4/SPID3
PB25B/D6/SPID1
PB24B/D5/SPID2
PL2A
/VR
EF
2_7
PL2B
/VR
EF
1_7
PL7A
PL7B
PL8B
PL8A
PT25B
PT25A
PT23A
PT22B
PT22A/TDQS22
PT21B
PT20A
PT21A
PT20B
PT19B/VREF2_1
PT13B
PT13A
PT19A/VREF1_1
PT18B
PT18A
PR
2B
/VR
EF
1_2
PR
2A
/VR
EF
2_2
PR
7B
PR
7A
PR
8A
PR
8B
PR
9A
/PC
LK
T2_0
PR
9B
/PC
LK
C2_0
PR
13A
/RLM
0_P
LLT
_IN
_A
PR
13B
/RLM
0_P
LLC
_IN
_A
PR
14B
/RLM
0_P
LLC
_F
B_A
PR
15A
/RD
QS
15
PR
16A
PR
18A
/VR
EF
1_3
PR
16B
PL9A
/PC
LK
T7_0
PR
15B
PT17B/PCLKC0_0
PR
11A
/D7/S
PID
0
PR
11B
/BU
SY
/SIS
PI
PR
12B
/DI/C
SS
PI*
TH
ISA
LLO
WS
TH
EU
SE
RT
OC
ON
NE
CT
AD
IFF
ER
EN
TP
RO
CE
SS
OR
JU
MP
ER
PIN
S12+
14
TO
TR
IST
AT
ET
HE
AD
DR
ES
SD
AT
AB
US
SO
FT
HE
FP
GA
.
CS
_X
3
CS
_X
2
CS
_X
1
RD
_D
UT
WR
_D
UT
INT
3
INT
2
10K
8 7 6 5 4
A_
DU
T_
<1
2..
0>
CS
_X
4C
S_X
5C
S_
X1
CS
_X
2C
S_X
3
10K
INT
2
NO
PO
P
7654321
INT
4
10K
10K
RE
SE
T
INT
4
INT
5
RD
_D
UT
WR
_D
UT
INT
2
INT
3
0
NO
PO
P
INT
5
012
D_D
UT
<7..0>
312
A_D
UT
_<
12..0>
CS
_X
4
D_
DU
T<
7..
0>
10K
INT
3
TR
IST
AT
E_A
D_B
US
RB40
RB38
RB19
RB31
J0
8
J0
9
RB
39
1C
7^
8B
77A
6
8A
6<
>7A
5<
>
7A
5<
>
1C
7^
8A
6<
>7A
7<
>
1C
7^
8A
6<
>7A
7<
>
8A
6<
>7A
4<
>
1C
7^
9B
4<
7C
8<
>4A
4<
>
8C
5<
4A
7<
>
8C
5<
7B
4<
>
1C
7^
8A
6<
>7C
4<
>
1C
7^
8A
6<
>7C
4<
>
1D
7^
8C
5<
8B
6<
>7C
4<
>4A
7<
>
8C
5<
8B
6<
>4A
7<
>
1C
7^
8A
67A
6
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
5/6
(BLO
CK
)
DS
26
52
2D
K0
1A
0
ST
EV
ES
CU
LL
Y
04
/17
/20
06
8/1
4(T
OT
AL
)
CR
-8:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
5
2 1
2 1
2 1
2 1
2 4 86
31 9
11 13
10
5 7
14122 4 86
31 9
11 13
10
5 7
1412
21
8B
2>
7A
4<
>
1C
7^
8B
2>
7A
7<
>
1C
7^
8B
2>
7A
7<
>
1C
7^
8B
2>
7C
4<
>
1C
7^
8B
2>
7C
4<
>
8C
5<
8C
3<
4A
7<
>
1D
7^
8C
5<
8C
3<
7C
4<
>4A
7<
>
1D
7^
8C
3<
8B
6<
>7C
4<
>4A
7<
>
8C
3<
4A
7<
>
8C
3<
7B
4<
>
8B
2>
7A
5<
>
8C
3<
8B
6<
>4A
7<
>
7C
3>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
OU
T
OU
TO
UT
V3
_3
OU
TO
UT
2
3 7 13
8
5 9 11
64
10 12 14
1
CO
NN
_14P
2
3 7 13
8
5 9 11
64
10 12 14
1
CO
NN
_14P
OU
TOU
T
INININ IN
IOOU
TO
UT
V3
_3
EN
DO
FP
RO
CE
SS
OR
HIE
RA
RC
HY
BLO
CK
10K
97_IO
10K
10K
10UF
10UF
10UF
.1UF
.1UF
.1UF
2.7
V
V1_2
L_T
MS
L_T
CK
V1_2
L_T
CK
L_T
MS
RE
SE
T
L_T
DO
L_
TD
I
L_
TD
I
L_T
DO
ME
M_
CS
ME
M_
SC
K
ME
M_
SO
ME
M_S
I
I10
I24
I26
I28
I5
10K
ME
M_
SC
K
I6
RB
29 T
P02
TP
01
RB30
U0
5
RB26
RB25
CB27
CB25
CB19
CB28
CB24
CB26
J0
4
UB
04
UB
05
BL
OC
KN
AM
E:
_m
otp
rocre
sca
rd_
dn
.P
AR
EN
TB
LO
CK
:\_
ds2
65
22
top
dn
_\
DS
26
52
2D
K0
1A
0
ST
EV
ES
CU
LL
Y
04
/17
/20
06
6/6
(BLO
CK
)
9/1
4(T
OT
AL
)
CR
-9:
@\_
ZT
OP
_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I6
@\_
ZT
OP
_LIB
\.\_
MO
TP
RO
CR
ES
CA
RD
_D
N\(
SC
H_1):
PA
GE
6
36
1
52
28
63
12
11
128
117
109
72
80
37
144
15
96
98
97
14
24
44
13 92
17 9189
90
94
136
93
95
143
110
125
108
38
71
73
18169
9 19 54 12
6
10
84
55
1 95 7342 6 108
162
8 73 4
5
1
56 423
1 1
9A
6<
9C
4<
9C
4<
9C
1<
9D
6<
>
9D
6<
>
1C
7^
8C
2>
7C
8<
>4A
4<
>
9D
6<
>
9D
6<
>
9C
4<
9C
4>
7B
4<
>
7B
3<
9B
1<
>
7C
4<
>
7C
4<
>
9B
8<
7B
3<
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
V3
_3
MA
X1963
SH
DN
*
GN
DR
ST
*
OU
T
IC
IN
V3
_3
AT
25
16
0A
_U
SI
GN
D
WP
*
HO
LD
*
VC
C
SO
SC
K
CS
*
CO
NN
_10P
71 5 GN
D
3T
CK
TM
S
TD
I
VC
C
TD
O
V3
_3
V3
_3
CO
NT
RO
L
LF
EC
_T
14
4_
U
ALL
LO
WF
OR
SP
I3M
OD
E
NE
ED
S10K
,1%
RE
SIS
TO
R
PLA
CE
CLO
SE
TO
PIN
VCCIO4A
VCCIO3B
XR
ES
VC
CA
UX
2
VC
CA
UX
1
VC
CJ
VC
C3
TD
I
TD
O
VCCIO3A
VCCIO4B
VCCIO5A
VCCIO2
VCCIO1B
VCCIO1A
VCCIO0B
INIT
*P
RO
GR
AM
*
VCCIO0A
CC
LK
CF
G1
CF
G2
CF
G0
TM
S
VC
C2
VC
C1
VCCIO5B
VCCIO6A
TC
K
DO
NE
GND10
GND9
GND8
GND7/GND0
GND6B/GND5
GND3B
GND3A/GND4
GND2/GND1
GND1
GND0
NC1
NC2
GND4
GND6A
GND5
VCCIO7
VCCIO6B
V3
_3
AR
EIN
TH
EM
ICR
OP
RO
CE
SS
OR
BLO
CK
TE
ST
PO
INT
SF
OR
AD
DR
/DA
TA
/CT
RL
INT
_LE
DA
ND
TE
ST
PO
INT
SF
OR
AD
DR
/DA
TA
/CT
RL
(LO
WF
OR
PA
RA
LL
EL
PO
RT
)
(LO
WF
OR
NO
RM
AL
OP
ER
AT
ION
)
(HIG
HF
OR
MO
TO
MO
DE
)
(LO
WF
OR
NO
RM
AL
OP
ER
AT
ION
)
BE
GIN
NIN
GO
FD
S26522D
KH
IER
AR
CH
YB
LO
CK
(HIG
HF
OR
NO
RM
AL
OP
ER
AT
ION
)
0 3 54
I23
5
I23
6D
5_S
PI_
SW
AP
JT
MS
_D
UT
JT
DI_
2_D
UT
JT
DO
_2_D
UT
JT
RS
T_D
UT
I231
1.0
K
TX
EN
AB
LE
_1
BT
S_
DU
T
I21
9B
GA
DS
26
52
2
RE
SE
T_
DU
T
A_DUT<12..0>
D4
D3
D6_S
PI_
CP
HA
RE
SE
T_
DU
T
BT
S_
DU
T
SP
ISE
L_D
UT
SC
AN
EN
_D
UT
CS
_X
1
CS
_X
2
WR
_D
UT
JT
CLK
_D
UT
RD
_D
UT
JT
DI_
1_D
UT
JT
DI_
2_D
UT
JT
DO
_1_D
UT
JT
MS
_D
UT
JT
RS
T_
DU
T
MC
LK
_T
AP
7
INT
_D
UT
JT
DO
_2_D
UT
01234568
12
I23
7
I23
8
7
NA
SC
AN
EN
_D
UT
D7_S
PI_
CP
OL
D6_S
PI_
CP
HA
SP
ISE
L_D
UT
D5_S
PI_
SW
AP
TX
EN
AB
LE
_2
1.0
K
1.0
K
1.0
K
I52
7
1.0
K
1.0
K
1.0
K
I52
5
I51
5
I521
1.0
K
I52
0
1.0
K
I53
5
I53
8
D_
DU
T<
7..
0>
INT
_D
UT
WR
_D
UT
RD
_D
UT
SC
AN
MO
_D
UT
JT
DO
_1_D
UT
1.0
K
JT
DI_
1_D
UT
JT
CLK
_D
UT
JT
CL
K_
DU
T
21
SC
AN
MO
_D
UT
A_
DU
T<
12
..0
>
CS
_X
1
CS
_X
2
D7_S
PI_
CP
OL 7
I23
46
D_DUT<7..0>
U0
6
J0
5
JP10
RB
48
JP15
JP13
RB
43 R
B4
1
RB
49
JP16
JP17
R0
2
RB
42
JP18
JP19
RB
51 R
B52
RB
50
RB
28
1C
6^
10B
8<
1C
6^
10C
3
1D
6^
10C
8>
1C
6^
10B
8<
1C
6^
10B
8<
1C
6^
10B
4
1C
6^
10B
8<
1C
6^
10B
8<
DS
26522D
K01A
0
1/5
(BLO
CK
)
10/1
4(T
OT
AL)
ST
EV
ES
CU
LLY
04/1
7/2
006
BLO
CK
NA
ME
:_ds26522dk01a0dutd
n_.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
CR
-10
:@
\_Z
TO
P_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I9
@\_
ZT
OP
_LIB
\.\_
DS
26522D
K01A
0D
UT
DN
_\(
SC
H_1):
PA
GE
1
J2J1H2
G1
F2
F1
M8
G5
F5
K11
K10
C3
C2
C5
C4
C1
B7
E9
H9
A3
C7
A7
D10
D9
B3
B10
A10
F3
G9
F4
E4
E3
F10
F9
E10
D8
E8K
4
M9
L6
M5
M7
L7
L5
H3
M6
J3 M4
C6
L4
D6
D7
E5
K3
H10
J10
J9
G10
G3
J4
H4
G4
C12
C11
B6
A6
C10
D12
D11
C8
C9
D1
D3
D2
D4
D5
K9
H5
H1
G2
E2
E1
L3
M2
M1
L2
L1 K2
K1
M3
1 95 7342 6 108
13
2
13
2
13
2
13
2
13
2
13
2
13
2
10C
2<
10C
8<
10C
8<
10C
8>
10C
8<
11C
7<
10B
8<
1C
6^
10D
7<
10C
2<
1C
6^
10D
7<
10B
2<
10B
2<
10A
2<
1C
6^
10D
7<
1C
6^
10D
7<
1C
6^
10D
7<
10A
7<
10A
7<
>
1C
6^
10D
7<
10A
7<
>
10A
8<
>
10A
7<
>
10A
7<
>
10A
8<
>
14D
5>
1D
6^
10D
7<
10A
8<
>
10B
8<
10C
4<
>
10C
4<
>
10B
8<
10C
4<
>
11A
7<
10B
8<
10C
8>
10C
8<
10C
8<
10A
7<
10C
8<
10A
7<
>
10B
2<
10B
2<
1C
6^
10D
7<
>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
IN
V3
_3
ININ IN
IN
IN
IN
IOV
3_
3
CO
NN
_10P
71 5 GN
D
3T
CK
TM
S
TD
I
VC
C
TD
OV
3_
3
DS
26522
D0
D7
D6
D5
D4
D3
D2
D1
A12 A8
A4
A3
ACVDD1_1
ACVDD2_2
ARVDD1_1
ARVDD1_2
ARVDD1_4
ARVDD1_3
ARVDD1_5
ARVDD2_1
ARVDD2_2
ARVDD2_3
ARVDD2_4
ARVDD2_5
ATVDD1_1
ATVDD1_2
ATVDD2_1
ATVDD2_2
DVDD1_1
DVDD1_2
DVDD1_3
DVDD1_4
DVDD2_1
DVDD2_2
DVDD2_3
DVDD2_4
RE
SE
TB
BT
S
SP
I_S
EL
SC
AN
_E
N
CS
B1
SC
AN
_M
OD
E
CS
B2
WR
B_R
WB
JT
CL
K
RD
B_D
BS
JT
DI1
JT
DI2
JT
DO
1
JT
MS
JT
RS
T
MC
LK
INT
DVSS2_5
DVSS2_4
DVSS2_3
DVSS2_2
DVSS2_1
DVSS1_4
DVSS1_2
DVSS1_3
DVSS2_6
DVSS1_1
ATVSS2_2
ATVSS2_1
ATVSS1_1
ARVSS2_5
ARVSS2_4
ARVSS2_3
ARVSS2_2
ATVSS1_2
DVSS2_7
DVSS2_8
ARVSS2_1
ARVSS1_5
ARVSS1_4
ARVSS1_1
ARVSS1_2
ARVSS1_3
ACVSS2_2
ACVSS2_1
ACVSS1_2
ACVSS1_1
JT
DO
2
A7
A6
A5
A2
A1
A0
NA
DS
26
52
2B
GA
BG
AD
S2
65
22
NA
RT
IP_1
RR
ING
_1
TR
ING
_1
TT
IP_1
RT
IP_
2
RR
ING
_2
TR
ING
_2
TT
IP_
2
RS
IG_1
BP
CLK
_1
RC
LK
_1
RC
HB
LK
_C
LK
_1
RS
YN
C_1
RM
_R
FS
YN
C_
1
RE
FC
LK
IO_
1
RS
YS
CL
K_
1
RS
ER
_1
TC
HB
LK
_C
LK
_1
TX
EN
AB
LE
_1
TS
SY
NC
IO_
1
TC
LK
_1
TS
YS
CL
K_
1
TS
IG_1
TS
YN
C_1
TS
ER
_1
AL_R
SIG
F_F
LO
S_1
RL
F_
LT
C_
1
RC
LK
_2
RC
HB
LK
_C
LK
_2
RM
_R
FS
YN
C_2
RS
YN
C_
2
RE
FC
LK
IO_2
RS
IG_
2
RS
YS
CL
K_
2
BP
CL
K_
2
RS
ER
_2
TX
EN
AB
LE
_2
TC
HB
LK
_C
LK
_2
TC
LK
_2
TS
SY
NC
IO_
2
TS
YN
C_
2
TS
YS
CL
K_
2
TS
IG_
2
TS
ER
_2
RL
F_
LT
C_
2
I1
I2
330 330
330 330
AL_R
SIG
F_F
LO
S_1
RL
F_
LT
C_
1
AL_R
SIG
F_F
LO
S_2
RLF
_LT
C_2
I7
I8
I13
I14
AL_R
SIG
F_F
LO
S_2
U0
6
U0
6
RB
32
RB
33
DS
04
DS
05 R
B34
RB
35
DS
06
DS
07
DS
26522D
K01A
0
ST
EV
ES
CU
LLY
04/1
7/2
006
2/5
(BLO
CK
)
11/1
4(T
OT
AL)
BLO
CK
NA
ME
:_ds26522dk01a0dutd
n_.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
CR
-11
:@
\_Z
TO
P_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I9
@\_
ZT
OP
_LIB
\.\_
DS
26522D
K01A
0D
UT
DN
_\(
SC
H_1):
PA
GE
2
H6
K6
A1
L8
J6K7
G6
K8
J8K5
F7
E6
G7
G8
H8
H7
J7F8
A5
B5
A4
B4
B1
A2
B2
F6
J5
12
12
L9
M1
1
L1
2
K1
2
L1
0
L1
1
J11
M1
0
H1
2
E7
G1
2
G1
1
F1
2
F1
1
H1
1
E1
1
E1
2
B1
2
A1
2
B1
1
A1
1
A8
B8
A9
B9
J1
2
M1
2
12
12
12B
7<
12B
7<
12B
7<
12C
7<
13B
7<
13B
7<
13B
7<
13C
7<
14C
6<
14A
2<
>
14B
8<
14B
3<
14A
6<
>
14B
3<
14B
2<
>
14A
5<
>
14D
3<
14B
3<
10A
2<
14A
8<
>
14B
6<
>
14A
5<
>
14C
4<
>
14A
8<
>
14D
1<
>
11C
3<
>
11B
3<
>
14A
8<
14C
3<
14C
3<
14A
6<
>
14B
2<
>
14B
6<
14A
5<
>
14A
2<
>
14D
3<
10A
2<
14C
3<
14A
6<
>
14A
8<
>
14A
8<
>
14B
5<
>
14B
4<
>
14D
1<
>11B
3<
>
11D
5>
11D
5>
11B
5>
11B
5>
11B
3<
>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
DS
26522
RLF
_LT
C2
AL_R
SIG
F_F
LO
S2
RT
IP2B
RT
IP2A
RR
ING
2A
RR
ING
2B
TR
ING
2B
TR
ING
2A
TT
IP2A
TT
IP2B
TS
ER
2
TS
IG2
TS
YS
CLK
2
TS
YN
C2
TS
SY
NC
IO2
TC
LK
2
TC
HB
LK
_C
LK
2
TX
EN
AB
LE
2
RS
ER
2
BP
CLK
2
RS
YS
CLK
2
RS
IG2
RE
FC
LK
IO2
RS
YN
C2
RM
_R
FS
YN
C2
RC
HB
LK
_C
LK
2
RC
LK
2
DS
26522
RLF
_LT
C1
AL_R
SIG
_F
LO
S1
RT
IP1B
RT
IP1A
RR
ING
1B
TR
ING
1B
TR
ING
1A
TT
IP1A
TT
IP1B
TS
ER
1
TS
YN
C1
TS
IG1
TS
YS
CLK
1
TC
LK
1
TS
SY
NC
IO1
TX
EN
AB
LE
1
TC
HB
LK
_C
LK
1
RS
ER
1
RS
YS
CLK
1
RE
FC
LK
IO1
RM
_R
FS
YN
C1
RS
YN
C1
RC
HB
LK
_C
LK
1
RC
LK
1
RR
ING
1A
BP
CL
K1
RS
IG1
_1
51.1
0.0
0.0 0
.0
0.0
61.9
61.9
560PF
.1UF
TT
IP_1
TR
ING
_1
RT
IP_1
RR
ING
_1
J1
2
J1
0
TB
01
J1
3
TB
01
RB54
RB45
RB44 CB44
CB46
R0
9
R1
0
R08
R0
7
04/1
7/2
006
ST
EV
ES
CU
LLY
DS
26522D
K01A
0
BLO
CK
NA
ME
:_ds26522dk01a0dutd
n_.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
12/1
4(T
OT
AL)
3/5
(BLO
CK
)
CR
-12
:@
\_Z
TO
P_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I9
@\_
ZT
OP
_LIB
\.\_
DS
26522D
K01A
0D
UT
DN
_\(
SC
H_1):
PA
GE
3
1
2
21
21
1 2
1
4
7
2
3
68
5
8 7 6 5
9
1110
1
2
4321
1416 15
2 1
11C
5>
11C
5>
11D
5<
11C
5<
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
1:1
1:0
.8
CO
NN
_B
NC
_5P
IN
1:1
1:0
.8
CO
NN
_R
J48
E
H F
C
B
G
D
A
CO
NN
_B
NC
_5P
IN
_1
I6
I4
I3
I2
51.1
0.0
0.0 0
.0
0.0
61.9
61.9
560PF
.1UF
TT
IP_
2
TR
ING
_2
RT
IP_
2
RR
ING
_2
I5
J1
5
J11
TB
02
TB
02
J1
4
RB53
R0
3
R04
R0
6
R0
5
RB47
RB46
CB45
CB43
04/1
7/2
006
ST
EV
ES
CU
LLY
DS
26522D
K01A
0
11/3
4(T
OT
AL)
2/4
(BLO
CK
)
BLO
CK
NA
ME
:_ds26522dk01a0dutd
n_.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
CR
-13
:@
\_Z
TO
P_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I9
@\_
ZT
OP
_LIB
\.\_
DS
26522D
K01A
0D
UT
DN
_\(
SC
H_1):
PA
GE
4
21
21
1 2
1
2
1
4
7
2
3
68
5
8 7 6 5
9
1110
4321
1416 15
1
2
2 1
11A
5>
11A
5>
11B
5<
11A
5<
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
CO
NN
_B
NC
_5P
IN
1:1
1:0
.8
1:1
1:0
.8
CO
NN
_R
J48
E
H F
C
B
G
D
A
CO
NN
_B
NC
_5P
IN
EN
DO
FD
S26522D
KH
IER
AR
CH
YB
LO
CK
TO
DU
T(N
OT
ER
MIN
AT
ION
RE
SIS
TO
RS
)P
LA
CE
SY
NC
AN
DS
YN
CIO
PIN
SC
LO
SE
RS
YN
C_
2
TS
IG_1
MC
LK
_T
AP
8
RM
_R
FS
YN
C_
1
RC
HB
LK
_C
LK
_1
TC
HB
LK
_C
LK
_1
RM
_R
FS
YN
C_2
RC
HB
LK
_C
LK
_2
TC
HB
LK
_C
LK
_2
3030
RS
IG_1
MC
LK
_T
AP
2
T1
_O
SC
E1
_O
SC
30
1.5
44
MH
Z_
3.3
V
2.0
48M
HZ
_3.3
V
TS
ER
_2
TS
ER
_1
RS
ER
_2
30
TS
YS
CL
K_
2
MC
LK
_T
AP
4
BP
CLK
_1
TS
YS
CL
K_
1
BP
CL
K_
2
30
30
MC
LK
_T
AP
1
RC
LK
_1
RC
LK
_2
30
TC
LK
_1
TS
YN
C_
2
TS
YN
C_1
TS
YN
C_1
TS
SY
NC
IO_
2
TS
YN
C_
2
TS
SY
NC
IO_
1
TS
IG_
2
30M
CLK
_T
AP
5
TC
LK
_2
MC
LK
_T
AP
3
MC
LK
_T
AP
6
RS
YS
CL
K_
2
RS
YS
CL
K_
1
RS
YN
C_1
RE
FC
LK
IO_2
RE
FC
LK
IO_
1M
CLK
_T
AP
8
MC
LK
_T
AP
5
MC
LK
_T
AP
6
MC
LK
_T
AP
8
MC
LK
_T
AP
7
30
MC
LK
_T
AP
1
MC
LK
_T
AP
2
MC
LK
_T
AP
3
MC
LK
_T
AP
4
BU
FF
ER
BU
FF
ER
RS
IG_
2
RS
ER
_1
JP
08
YB
02
YB
01
JP
07
JP
06
RP
B0
1
J0
6
RP
B02
RP
B06
RP
B04
RP
B07
UB
06
RP
B05
UB
07
RB
37
RB
36
RP
B03
JP
14
JP
11
JP
09
JP
12
JP
05
JP
02
JP
01
JP
04
JP
03
J0
7
BLO
CK
NA
ME
:_ds26522dk01a0dutd
n_.
PA
RE
NT
BLO
CK
:\_
ds26522to
pdn_\
14/1
4(T
OT
AL)
5/5
(BLO
CK
)S
TE
VE
SC
ULLY
04/1
7/2
006
DS
26522D
K01A
0
CR
-14
:@
\_Z
TO
P_LIB
\.\_
DS
26522T
OP
DN
_\(
SC
H_1):
PA
GE
1_I9
@\_
ZT
OP
_LIB
\.\_
DS
26522D
K01A
0D
UT
DN
_\(
SC
H_1):
PA
GE
5
13
2
13
2
13
2
13
2
132
13
2
13
2
2 4 86
31 9
11 13
10
5 7
1412
18
45
18
45
13
2
13
2
31 2
5678
4
65
4
973
10
8
12
31 2
5678
4
13
2
31 2
5678
431 2
5678
4
31 2
5678
4
41
31 2
5678
44
1
31 2
5678
413
2
13
2
11A
7<
>
11D
7<
14D
5>
14B
1<
>
11C
7>
11B
7>
11D
7>
11A
7>
11A
7>
11A
7>
11C
7>
14C
5>
11B
7<
11D
7<
11A
7>
11B
7<
14D
5>
11C
7>
11D
7<
11A
7>
14C
5>
11C
7>
11A
7>
11D
7<
14A
8<
>11B
7>
14A
8<
>11D
7<
>
14A
8<
>11D
7<
>
11B
7<
>
14A
8<
>11B
7>
11D
7<
>
11B
7<
14D
5>
11A
7<
14D
5>
14D
5>
11A
7>
11C
7<
11C
7<
>
11A
7<
>
11C
7<
>14D
5>
14B
1<
>
14A
4<
>
14A
4<
>
14B
1<
>
10C
8<
14B
7<
>
14A
7<
>
14A
4<
>
14A
4<
>
11A
7>
11C
7>
PA
GE
:
DA
TE
:T
ITLE
:
EN
GIN
EE
R:
AA
BB
CC
DD
112 2
334 4
556 6
778 8
NC
7S
Z86_U
NC
7S
Z86_U
6 1084
12
3 5 7 9
CO
NN
_10P
VC
C1
OS
C
GN
DO
UT
V3
_3
VC
C1
OS
C
GN
DO
UT
V3
_3
2
3 7 13
8
5 9 11
64
10 12 14
1
CO
NN
_14P
