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DS26334 3.3V, 16-Channel, E1/T1/J1 Short- and Long-Haul Line · PDF file 2011-03-21 · E1/T1/J1 Multiplexer and Channel Banks . E1/T1/J1 LAN/WAN Routers . FUNCTIONAL DIAGRAM TNEG

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    Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

    GENERAL DESCRIPTION The DS26334 is a 16-channel short/long-haul line interface unit (LIU) that supports E1/T1/J1 from a single 3.3V power supply. A single bill of material can support E1/T1/J1 that requires no external termination. Redundancy is supported through nonintrusive monitoring, optimal high-impedance modes and configurable 1:1 or 1+1 backup enhancements. An on-chip synthesizer generates the E1/T1/J1 clock rates by a single master clock input of various frequencies. Two clock output references are also offered. The device is offered in a 256-pin TE-CSBGA, the smallest package available for a 16-channel LIU.

    APPLICATIONS T1 Digital Cross-Connects ATM and Frame Relay Equipment Wireless Base Stations ISDN Primary Rate Interface E1/T1/J1 Multiplexer and Channel Banks E1/T1/J1 LAN/WAN Routers

    FUNCTIONAL DIAGRAM

    TNEG

    RCLK TPOS TCLK

    RPOS RNEG

    SOFTWARE CONTROL AND JTAG

    TRANSMITTER

    RECEIVER

    LOSS

    1

    16

    RTIP RRING

    MODE JTAG

    TTIP TRING

    FEATURES  16 E1, T1, or J1 Short/Long-Haul Line

    Interface Units  Independent E1, T1 or J1 Selections  Fully Internal Impedance Match Requires No

    External Resistors  Software-Selectable Transmit and Receive-

    Side Impedance Match  Crystal-Less Jitter Attenuator  Selectable Single-Rail and Dual-Rail Mode

    and AMI or HDB3/B8ZS Line Encoding and Decoding

     Detection and Generation of AIS  Digital/Analog Loss of Signal Detection as

    per T1.231, G.775 and ETS 300 233  External Master Clock Can Be Multiple of

    2.048MHz or 1.544MHz for T1/J1 or E1 Operation; This Clock Will Be Internally Adapted for T1 or E1 Usage

     Receiver Signal Level Indicator from -2.5dB to -38dB in T1 Mode and -3dB to -43dB in E1 Mode in 2.5dB Increments

     Two Built-In BERT Testers for Diagnostics  8-Bit Parallel Interface Support for Intel or

    Motorola Mode or a 4-Wire Serial Interface  Transmit Short-Circuit Protection  G.772 Nonintrusive Monitoring  Receive Monitor Mode Handles Combinations

    of 14dB to 30dB of Resistive Attenuation Along with 12dB to 30dB of Cable Attenuation

     Specification Compliance to the Latest T1 and E1 Standards

     Single 3.3V Supply with 5V Tolerant I/O  JTAG Boundary Scan as Per IEEE 1149.1

    ORDERING INFORMATION PART TEMP RANGE PIN-PACKAGE

    DS26334G 0°C to +70°C 256 TE-CSBGA DS26334G+ 0°C to +70°C 256 TE-CSBGA DS26334GN -40°C to +85°C 256 TE-CSBGA DS26334GN+ -40°C to +85°C 256 TE-CSBGA +Denotes a lead(Pb)-free/RoHS compliant package.

    DEMO KIT AVAILABLE

    DS26334

    3.3V, 16-Channel, E1/T1/J1 Short- and Long-Haul Line Interface Unit

    19-5753; Rev 3/11

  • DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit

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    TABLE OF CONTENTS 1 STANDARDS COMPLIANCE ........................................................................................................ 6

    1.1 TELECOM SPECIFICATIONS COMPLIANCE ....................................................................................... 6 2 DETAILED DESCRIPTION ............................................................................................................ 7 3 BLOCK DIAGRAMS ...................................................................................................................... 8 4 PIN DESCRIPTION ...................................................................................................................... 10 5 FUNCTIONAL DESCRIPTION ..................................................................................................... 17

    5.1 PORT OPERATION ...................................................................................................................... 17 5.1.1 Serial Port Operation ..................................................................................................................... 17 5.1.2 Parallel Port Operation ................................................................................................................... 18 5.1.3 Interrupt Handling .......................................................................................................................... 18

    5.2 POWER-UP AND RESET .............................................................................................................. 19 5.3 MASTER CLOCK ......................................................................................................................... 19 5.4 TRANSMITTER ............................................................................................................................ 20

    5.4.1 Transmit Line Templates ................................................................................................................ 22 5.4.2 LIU Transmit Front-End .................................................................................................................. 25 5.4.3 Transmit Dual-Rail Mode ............................................................................................................... 26 5.4.4 Transmit Single-Rail Mode ............................................................................................................. 26 5.4.5 Zero Suppression—B8ZS or HDB3 ................................................................................................ 26 5.4.6 Transmit Power-Down.................................................................................................................... 26 5.4.7 Transmit All Ones .......................................................................................................................... 27 5.4.8 Driver Fail Monitor.......................................................................................................................... 27

    5.5 RECEIVER .................................................................................................................................. 27 5.5.1 Receiver Impedance Matching Calibration ..................................................................................... 27 5.5.2 Receiver Monitor Mode .................................................................................................................. 27 5.5.3 Peak Detector and Slicer ............................................................................................................... 28 5.5.4 Receive Level Indicator .................................................................................................................. 28 5.5.5 Clock and Data Recovery............................................................................................................... 28 5.5.6 Loss of Signal ................................................................................................................................ 28 5.5.7 AIS ................................................................................................................................................ 29 5.5.8 Receive Dual-Rail Mode ................................................................................................................ 30 5.5.9 Receive Single-Rail Mode .............................................................................................................. 30 5.5.10 Bipolar Violation and Excessive Zero Detector ............................................................................... 30

    5.6 JITTER ATTENUATOR .................................................................................................................. 31 5.7 G.772 MONITOR ........................................................................................................................ 32 5.8 LOOPBACKS ............................................................................................................................... 32

    5.8.1 Analog Loopback ........................................................................................................................... 32 5.8.2 Digital Loopback ............................................................................................................................ 33 5.8.3 Remote Loopback .......................................................................................................................... 33

    5.9 BERT........................................................................................................................................ 34 5.9.1 General Description ....................................................................................................................... 34 5.9.2 Configuration and Monitoring ......................................................................................................... 35 5.9.3 Receive Pattern Detection.............................................................................................................. 36 5.9.4 Transmit Pattern Generation .......................................................................................................... 38

    6 REGISTER MAPS AND DEFINITION .......................................................................................... 39 6.1 REGISTER DESCRIPTION ............................................................................................................. 48

    6.1.1 Primary Register Ban