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‘D Ø Run 2b Silicon Tracker’ An overview. Director’s Baseline Review (Temple Review) April 16-18, 2002 Marcel Demarteau Fermilab. For the Run 2b Silicon Group. L xy ~ 3 mm. Run2b Focus: Higgs Boson. Production Dominant production channel gg H Overwhelmed by background - PowerPoint PPT Presentation
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Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 1
Director’s Baseline Review (Temple Review)
April 16-18, 2002
Marcel DemarteauFermilab
‘‘DDØ Ø Run 2b Silicon Tracker’Run 2b Silicon Tracker’An overviewAn overview
For the Run 2b Silicon GroupFor the Run 2b Silicon Group
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 2
Run2b Focus: Higgs Boson Run2b Focus: Higgs Boson
Production Dominant production channel gg H
» Overwhelmed by background Observable production channel qq WH, ZH
» Lepton(s) from W/Z provides trigger Decay
H coupling proportional to mass Dominant decay to bbar
Requirements Excellent b-tagging efficiency
» b > ~65 % per jet at mistag rate < ~1% Robust silicon tracker
» lean but with adequate redundancy
Lxy~ 3 mm
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 3
OutlineOutline
Design considerations Boundary conditions
» Space » DAQ constraint» Silicon track trigger» Radiation damage
Brief overview of proposed detector Anticipated performance Project overview
Organization Cost: M&S Schedule Resources
Conclusion
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 4
Design ConsiderationsDesign Considerations
Do not compromise on the performance of the Run2a silicon tracker Choose design adequate to achieve physics goals but do not over-
design (no 90-degree stereo),
Provide stand-alone tracking up to || < 2.0 Fiber tracker has full coverage only up to || < 1.6
Modular design, minimize the number of different elements Use established technologies
Use single sided silicon only Due to harsh radiation environment, divide tracker in two radial
groups: Inner layers
» Design to withstand integrated luminosity of 15 fb-1, with adequate margin
» Provide path for possible replacement of innermost layers Outer layers
» Design to last a long time
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 5
Boundary ConditionsBoundary Conditions
Z=0
Spatial Installation within existing fiber tracker, with inner radius of 180 mm Installation in collision hall
» Tracker will be built in two independent half-modules, split at z=0
Data Acquisition Retain all of the downstream readout electronics Re-use current cable plant
» allows for ~912 readout modules Total number of readout modules cannot exceed 912
Silicon Track Trigger Respect 6-fold symmetry
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 6
Radiation DamageRadiation Damage
Sensors will be subjected to fluence of 2 1014 1 MeV neutron equiv./cm2
Parameters for detector Vdepl after irradiation Signal to Noise ratio
Requirements S/N ratio > 10 after 15 fb-1
Vdepl « Vbreak to allow for over-depletion for full chargecollection
Signal to noise ratio for layer 0
88.5
99.510
10.511
11.512
0 5 10 15 20 25
luminosity (fb-1)
S/N
L0 T=-10C
L0 T=-5C
L0 T=0C
L0 T=+5C
Depletion Voltage Prediction Layer 0
0
50
100
150
200
250
300
350
400
450
0 200 400 600 800 1000 1200 1400 1600
days
Vd
epl (
V)
Days
Layer 0 12.9 fb-
1 +10 0C
0 0C
-10 0C
Layer T_silicon ( C )
Layer 0 -10
Layer 1 -5
Layer 2 0
Layer 3 >0
Layer 4 >0
Layer 5 >0
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 7
Basic LayoutBasic Layout
Six layer silicon tracker, divided in two radial groups Inner layers: Layers 0 and 1
» Axial readout only» Mounted on integrated support» Assembled into one unit
» Designed for Vbias up to 700 V Outer layers: Layers 2-5
» Axial and stereo readout» Stave support structure
» Designed for Vbias up to 300 V
Employ single sided silicon only, 3 sensor types
2-chip wide for Layer 0 3-chip wide for Layer 1 5-chip wide for Layers 2-5
No element supported from the beampipe Drilled Be Beampipe with ID of 0.96”, 500m wall thickness
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 8
Layer 0Layer 0
Support Structure 12-fold crenellated geometry carbon fiber support possible use of pyrolitic graphite sensors cooled to T=-10 oC Rin = 18.5 mm
Silicon
Analogue cable
Hybrid
Assembly 2-chip wide sensors 25 mm pitch, 50 mm readout Analogue cables for readout Hybrids off-board Staggered in z for 6 readouts per end
per phi-sector Space is extremely tight !
Outside tracking volume
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 9
Layer 1 Layer 1
Support Structure 12-fold castellated geometry carbon fiber support Integrated cooling sensors cooled to T=-5 oC Rin = 34.8 mm
Assembly 3-chip wide sensors,
58 m pitch, axial readout Hybrids on-board 6-chip double-ended hybrid
readout
Cooling lines
Silicon
Hybrid
Digital cable
L0
Full view layer 1
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 10
Layers 2-5Layers 2-5
12, 18, 24 and 30-fold geometry All layers:
Use the same sensor, 5-chip wide sensor, 30 m pitch, 60 m readout
Hybrids on-board 10-chip hybrid readout Stereo and axial readout Stereo angle obtained by rotating
sensor Support
Modules are assembled into staves Staves are positioned with carbon-
fiber bulkheads
CMS Endplate
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 11
Stave StructureStave Structure
Stave is doublet structureof four readout modules
Two layers of silicon » Axial and stereo» Two readout modules each
separated by cooling lines Total of 168 staves
Stave has carbon fiber cover Protect wirebonds Provide path for digital cables
Staves are mounted in end carbon fiber bulkheads
Cooling manifold similar to bulkhead design
Layer 4-5 stave
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 12
Outer Layer Readout ModulesOuter Layer Readout Modules
Staves are assembled from readout modules Readout modules:
6 types » 10-10 (axial, stereo)» 10-20 (axial, stereo)» 20-20 (axial, stereo)
Stereo angle determined by mechanical constraints
» 10cm readout: = 2.5o
» 20cm readout: = 1.25o Ganged sensors will have traces aligned
Module configuration
Each readout module serviced by double-ended hybrid Each hybrid has two independent readout segments
Layer 4-5
Layer 2-3
10-10 10-20
20-20
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 13
Readout SchematicsReadout Schematics
Layer 0: due to cooling requirements hybrids off-board Fine pitch flexible cables to bring analogue signals out of tracking volume
Layers 1-5: Hybrids mounted on silicon; digital cable connects to hybrid» Provides chip control signals» Power for chip and bias voltage
SVX4 chip employed in SVX2 readout mode to readout silicon MOSIS submission of FE 06/04/01 MOSIS submission of full chip 03/28/02
» Submission delay of ~5 months; both projects will get about 500 chips from this run
Project assumes in its schedule that second full chip submission is needed» Second submission: October ’02» Production submission: April ’03;
SVX4 drives the schedule
Sensor8’ Twisted Pair Cable
Interface with current DAQ system
Adapter Card
Junction Card
2’ Digital Cable
Hybrid
AnalogueCable
Hybrid
Layer 0
Layers 1-5
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 14
Testing and Quality AssuranceTesting and Quality Assurance
First pass database exists to track all components for detector Fields for data entry being defined for first parts received
» Sensors, hybrids and cables Relations for proper queries being defined
Test stands for testing first components being setup at SiDet Two hybrid burn-in test stands, 16 channels each Two module burn-in test stands, 32 modules each
Devices under test
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 15
Parameters of Proposed DetectorParameters of Proposed Detector
Few Characteristics: Sensors: 2184; Silicon area of 8.3 m2
888 hybrids, i.e readout cables (Run2a: 912) 7440 SVX4 chips for a total of 952320 channels (Run2a: 792576)
Layer 0A Layer 0B Layer 1A Layer 1B Layer 2A Layer 2B Layer 3A Layer 3B Layer 4A Layer 4B Layer 5A Layer 5B TotalStrip orientation A A A A A+S A+S A+S A+S A+S A+S A+S A+S# sectors 6 6 6 6 6 6 9 9 12 12 15 15# sensors in z 12 12 12 12 10 10 10 10 12 12 12 12Total # sensors 72 72 72 72 120 120 180 180 288 288 360 360 2184Pitch (m) 25 25 29 29 30 30 30 30 30 30 30 30Readout Pitch (m) 50 50 58 58 60 60 60 60 60 60 60 60Sensor Active Width 12.8 12.8 22.3 22.3 38.4 38.4 38.4 38.4 38.4 38.4 38.4 38.4Sensor Cut Width 15.5 15.5 25.0 25.0 41.1 41.1 41.1 41.1 41.1 41.1 41.1 41.1Sensor Active Length 76.4 76.4 76.4 76.4 97.0 97.0 97.0 97.0 97.0 97.0 97.0 97.0Sensor Cut Length 79.4 79.4 79.4 79.4 100.0 100.0 100.0 100.0 100.0 100.0 100.0 100.0Radius Axial 17.8 24.7 34.8 39.1 53.2 68.9 89.3 103.4 116.9 130.6 150.1 163.6Radius Stereo --- --- --- --- 56.3 72.0 86.2 100.3 120.0 133.7 147.0 160.5Axial Coverage (%) 65.9 48.5 59.1 53.1 66.1 51.9 60.7 52.6 62.2 55.8 60.8 55.8Stereo Coverage (%) --- --- --- --- 62.7 49.8 62.8 54.2 60.6 54.5 62.0 56.8
Silicon Area (m2) 0.09 0.09 0.14 0.14 0.49 0.49 0.74 0.74 1.18 1.18 1.48 1.48 8.26dphi/dz for stereo Positive Positive Negative Negative Positive Positive Negative Negative# RO segments in z 12 12 12 12 8 8 8 8 8 8 8 8# SVX4 chips per RO 2 2 3 3 5 5 5 5 5 5 5 5# Hybrids in z 12 12 6 6 4 4 4 4 4 4 4 4Total # Hybrids 72 72 36 36 48 48 72 72 96 96 120 120 888# SVX4 chips 144 144 216 216 480 480 720 720 960 960 1200 1200 7440# RO channels 18,432 18,432 27,648 27,648 61,440 61,440 92,160 92,160 122,880 122,880 153,600 153,600 952,320
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 16
Performance of Proposed DetectorPerformance of Proposed Detector
Performance studies based on full Geant simulation Full model of geometry and material Model of noise, mean of 2.1 ADC counts Single hit resolution of ~10 m Longitudinal segmentation implemented Pattern recognition and track reconstruction
Benchmarks (pT)/PT ~ 3% at 10 GeV/c
(d0)2 = 5.22 + (25/pT)2
» (d0) < 15 m for pT > 10 GeV/c
2b 2a
Impact Parameter (cm)
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 17
Performance of Proposed DetectorPerformance of Proposed Detector
B-tagging Loose b-tag algorithm: signed impact parameter, Eb > 20 GeV
» Track selection within cone R < 0.5 of b-jet pT > 0.5 GeV/c, good 2, hits in silicon 2
» Impact parameter significance 2 tracks: d0/(d0) > 3
3 tracks: d0/(d0) > 2
b-jet tagging efficiency of ~ 65% per jet » Compare to Higgs working group assumptions
Based on WH-events, with b’s falling within acceptance
TDR
P(nb1) 76%
P(nb2) 29%
Mistag Rate < 1.5 %
ET (GeV)
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 18
OrganizationOrganization Major commitments from various groups
Mechanical design and fabrication» University of Washington: Layer 0, 1
Sensor Testing» Kansas State University» Stony Brook» Cinvestav, Moscow Stave University
Electronics» Kansas State University
Digital cables; Adapter card, Junction card, Test card
» University of Kansas, Fresno University Hybrid testing
» Louisiana Tech Digital cable testing
QA» UIC, Northwestern University
Monitoring» Radiation monitoring, NIKHEF» Temperature Monitoring, Rice
Trying to strengthen group further
SiliconM. Demarteau
A. Bean, Deputy
Sensor Accounting, TestingR. Demina, F. Lehner
ElectronicsA. Nomerotski, W. Reay
QA, Testing, & Burn-inC. Gerber, TBA
MechanicalW. Cooper, K. Krempetz
Radiation MonitorS. de Jong
ProductionTBA
Simulation L. Chabalina, F. Rizatdinova
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 19
Cost and NSF FundingCost and NSF Funding
Cost drivers Silicon sensors Cables: analogue, digital and twisted pair in near equal amounts Hybrids
Project has secured Major Research Instrumentation (MRI) Grant from NSF $1.6M of NSF equipment funds and $800k of Cost Share by participating
universities» 10 participating universities; University of Kansas grant administrator
M&S ITEM CONTINGENCY LABOR HRS
1.1 SILICON TRACKER M&S TOTAL
TOTAL % Cost Cost
1.1.1 Silicon Sensors 2,678,531 25 681,640 3,360,171
1.1.2 Readout System 4,029,215 45 1,797,590 5,826,805
1.1.3 Mechanical Design and Fabrication 1,340,696 51 679,818 2,020,514
1.1.4 Detector Assembly and Testing 445,250 37 165,415 610,665
1.1.5 Monitoring 55,000 45 24,500 79,500
1.1.6 Installation 90,000 47 42,500 132,500
1.1.7 Computing 101,000 11 11,400 112,400
1.1 SILICON TRACKER 8,739,692 39 3,402,863 12,142,555
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 20
Approach to Cost EstimateApproach to Cost Estimate
Strongly relies on Run2a experience Estimates for assembly, fixturing Initial quotes for equipment
General philosophy regarding contingency Uniform 50% Areas with little experience: 70% Quote in hand, or previously purchased commercial items: 30% Spare count part of production cost, never included in contingency Items already purchased: 0%
MRI contribution MRI contribution is fixed dollar amount When identified as such in M&S cost estimate, assumed no contingency Permits to verify overall level of contingency
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 21
Cost ProfileCost Profile
We are in the process of setting up budget tracking tools Tracking of MRI and Fermilab encumbrances
Obligations and spending profile match to good degree
Silicon Spending Profile
0
1,000
2,000
3,000
4,000
5,000
6,000
7,000
8,000
9,000
10,000
Oct-0
0
Jan-0
1
Apr-0
1
Jul-0
1
Oct-0
1
Jan-0
2
Apr-0
2
Jul-0
2
Oct-0
2
Jan-0
3
Apr-0
3
Jul-0
3
Oct-0
3
Jan-0
4
Apr-0
4
Jul-0
4
Oct-0
4
Jan-0
5
Apr-0
5
Jul-0
5
Oct-0
5
CY Quarters
Co
st
(k$
)
Total Fixed Cost
Cumulative Cost
Sensor purchase
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 22
ScheduleSchedule
Project broken down in subtasks at level 9 using MSProject Project resource loaded, manpower estimates follow from resource loading Broken down into over 800 subtasks
» No stand alone tasks; all tasks in reference to successors or predecessors Some Key tasks:
SVX4 production and testing 4/11/03 – 3/10/04 Outer layer sensor production and probing 1/21/03 – 5/14/04 Outer layer hybrid production and testing 6/23/03 – 6/10/04 Outer layer module production and burn-in 1/14/04 – 8/30/04
Some key milestones SVX4 chip released for production 4/11/03 Last outer layer sensor received 4/30/04 South silicon complete 11/17/04 Shutdown starts 3/14/05 Silicon Ready to move to DAB 5/31/05
An explicit 8 weeks contingency is built in at the end of the project
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 23
MilestonesMilestones
Major task have associated milestones, which are evenly distributed in time
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 24
Sensitivity AnalysisSensitivity Analysis
Using current schedule, added (equivalent of) third prototype run for various critical items and looked at the effect on the schedule
Task Description
additional
duration (wks) End Date Shift (days)
Nominal Schedule 5/ 31/ 2005
89 Third SVX4 prototype 28 12/ 19/ 2005 202
156 Third L2-5 Hybrid prototype 28 12/ 12/ 2005 195
176 Third Analogue Cable prototype 24 5/ 31/ 2005 0
209 Third Digital Cable prototype 40 5/ 31/ 2005 0
239 Second J unction Card prototype 20 5/ 31/ 2005 0
252 Third Twisted Pair prototype 24 5/ 31/ 2005 0
266 Third Adapter Card prototype 28 5/ 31/ 2005 0
285 Second Test Card prototype 26 5/ 31/ 2005 0
364 Fabrication L0 South structure 32 5/ 31/ 2005 0
368,502 L0 North+South sensor mounting 20 (each) 6/ 22/ 2005 22
399 Fabrication L1 South structure 32 5/ 31/ 2005 0
403,512 L1 North+South sensor mounting 20 (each) 5/ 31/ 2005 0
76 Production f aults at HPK (600 sensors) 12 6/ 27/ 2005 27
All of the above: the unpredictable 1/ 20/ 2006 234
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 25
Approach to Labor EstimateApproach to Labor Estimate
Blanket assumption for labor: 1456 hrs/yr or 364 hrs/quarter, which corresponds to 70% efficiency
» 52 weeks/yr * 5 days/week - 39 days vacation, sick, holidays = 221 days, which corresponds to 85% efficiency
» Efficiency of use of those available hours 82% (meetings, coffee break, bathroom break, …)
When converting hours of labor into FTE’s, this number is applied
In addition, there’s an efficiency factor folded in task by task Example: 10-10 axial Module production
» Duration: 8 weeks, 2.1 modules/day» Resources: 0.5 CMMT, 0.5 MTF
In production mode, module assembly should take about 1 hour/module Needs some setup time, cleanup time, and things may go wrong
Manpower estimates come from resource loaded schedule
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 26
Total SiDet Manpower NeedsTotal SiDet Manpower Needs
Comparison of total manpower needs for SiDet where laboratory has given guidance
Total SiDet Manpower
0
5
10
15
20
25
30
35
1Q01
2Q01
3Q01
4Q01
1Q02
2Q02
3Q02
4Q02
1Q03
2Q03
3Q03
4Q03
1Q04
2Q04
3Q04
4Q04
1Q05
2Q05
3Q05
4Q05
Calendar Quarters
FT
Es
CMMT
CMMP
WBNDRT
ETSF
MTSF
DESF
MEF
Lab Guidance: 18 FTE’s
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 27
Selected Fermilab Manpower NeedsSelected Fermilab Manpower Needs
Projected needs for mechanical engineers and designers
FNAL Engineering and Designing Manpower
0
2
4
6
8
10
12
14
16
1Q01
2Q01
3Q01
4Q01
1Q02
2Q02
3Q02
4Q02
1Q03
2Q03
3Q03
4Q03
1Q04
2Q04
3Q04
4Q04
1Q05
2Q05
3Q05
4Q05
Calendar Quarters
FT
Es
DESF
MEF
Available manpower for engineers and designers So far has matched more or less project needs Worry about second quarter: if not matched, project will fall behind
current schedule
Lab Guidance for SiDet: 5 FTE’s
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 28
Selected SiDet Manpower NeedsSelected SiDet Manpower Needs
Comparison of technical manpower needs for SiDet where laboratory has given guidance
SiDet Selected Technical Manpower
0
5
10
15
20
25
30
35
1Q01
2Q01
3Q01
4Q01
1Q02
2Q02
3Q02
4Q02
1Q03
2Q03
3Q03
4Q03
1Q04
2Q04
3Q04
4Q04
1Q05
2Q05
3Q05
4Q05
Calendar Quarter
FT
Es
CMMT
CMMP
WBNDRT
ETSF
MTSF
Lab Guidance: 13 FTE’s
Peak production Really need people with the right skills. Finding people with the right skills has been
a problem in the past. We are optimistic that we can try to recruit CMMT’s from the collaboration as was done for Run2a
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 29
Total Fermilab Manpower EstimateTotal Fermilab Manpower Estimate
Add all Fermilab manpower and all physicists from Fermilab and Universities
All Fermilab Manpower with all Physicists
0
10
20
30
40
50
60
70
80
1Q01
2Q01
3Q01
4Q01
1Q02
2Q02
3Q02
4Q02
1Q03
2Q03
3Q03
4Q03
1Q04
2Q04
3Q04
4Q04
1Q05
2Q05
3Q05
4Q05
Calendar Quarters
FT
Es
PhysTot
COMPF
ETF
MTF
EEF
CMMP
CMMT
WBNDRT
ETSF
MTSF
DESF
MEF
FNAL Resources Person-yrsCMM Prog 0.8CMM Tech 5.9Computing Prof. 3.4Designer/Drafter 9.1Electrical Engineer 10.2Electrical Tech 5.9Electrical Tech - SiDet 5.9Mechanical Engineer 13.3Mechanical Tech 6.3Mechanical Tech - Sidet 16.6Wire Bonder 2.2Total 79.7Physicist (FNAL) 34.9Physicist (Other) 46.1
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 30
Concluding RemarksConcluding Remarks
The Run2b upgrades will allow us to exploit the unique opportunity for discovery available to the Laboratory; however, it is only available within a limited time frame
The silicon detector proposed is well suited to address the physics issues of Run2b
Emphasis on impact parameter measurement at small radii The design is not overextended A lot of progress has been made in all areas
Some significant issues and risks remain Schedule Manpower needs Funding
We are looking for your advice and help trying to get the project on a solid footing for a possible future baseline review.
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 31
NomenclatureNomenclature
MEF Mechanical Engineer, Fermilab DESF Designer, Fermilab MTSF Mechanical Technician, SiDet, Fermilab ETSF Electrical Technician, SiDet, Fermilab WBNDRT Wirebonder Technician CMMT Coordinate Measuring Machine Technician CMMP Coordinate Measuring Machine Programmer EEF Electrical Engineer Fermilab MTF Mechanical Technician, Fermilab (non-SiDet) ETF Electrical Technician, Fermilab (non-SiDet) COMPF Computing Professional, Fermilab
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 32
Run 2bRun 2b
Although we just built a major silicon detector, construction of a new silicon detector is planned
Current silicon detector designed for ~ 2 fb-1; will most likely survive 4-5 fb-1
The most appropriate rad-hard technology used at that time Laboratory:
Supports extended running to ~ 15 fb-1 / exp
» Unique window of opportunity for Fermilab to be the sole laboratory with possibility to find the Higgs boson
Asked both collaborations to study options for replacing Si detectors
» Choice of exp’s is full replacement Suggested a time scale and asked for
submission of TDR by fall ’01 Field of High Energy Physics
Higgs search is highest priority of the laboratory and perhaps the field
LHC: turn on of LHC sets clear end date for window of opportunity
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 33
Overall Plan ViewOverall Plan View
Junction cards
Cooling bulkheads
Positioning bulkhead
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 34
Designed the detector to have uniform coverage in pseudorapidity Layers 0/1: 6 sensors per half-module; sensor length 79.4 mm Layers 2/3: stave populated by 5 sensors only; sensor length 100 mm
» reduction of sensor count by 120 sensors Layers 4/5: stave populated by 6 sensors; sensor length 100 mm
Longitudinal segmentation Determined by
» Number of allowed readout cables» Occupancy, cluster sharing » Configuration
L0, L1: each sensor readout L2, L3: 10-10-10-20 readout L4, L5: 10-10-20-20 readout
Hybrids are all double-ended Services two readout segments
Longitudinal SegmentationLongitudinal Segmentation
Z=0 Z (mm)0 40 80 120 160 200 240 280 320 360 400 440 480 520 560 600
Layer 0 S S S S S SLayer 1 1/2D 1/2D 1/2D 1/2D 1/2D 1/2D
Layer 2 1/2D 1/2D 1/2D 1/2D
Layer 3 1/2D 1/2D 1/2D 1/2D
Layer 4 1/2D 1/2D 1/2D 1/2D
Layer 5 1/2D 1/2D 1/2D 1/2D
Readout segment #
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 35
SVX4 ChipSVX4 Chip
Nov ’00 decision to employ common readout chip for CDF and DØ SVX4 in deep sub-micron, 0.25 m technology, intrinsically rad-hard
» Brand new chip with own personality/features Commercial foundries used (TSMC)
Test chips MOSIS submission of FE 06/04/01
» Decided on pre-amp and pipeline design» ENC = 450e + 43.0e/pF (optimum)
MOSIS submission of full chip 03/28/02 » Submission delay of ~5 months» Two versions of chip (same padring)
On chip bypassing employed (DØ) On chip bypassing not used (CDF)
» Both projects get ~300 chips each» Projects need working chips to certify all readout electronics components
Project assumes in its schedule that second full chip submission is needed Second submission: October ’02 Production submission: April ’03 SVX4 drives the schedule
LBL Pre-amp
FNAL Pre-amp
Pip
elin
e
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 36
Sensitivity AnalysisSensitivity Analysis
Using current schedule, removed second prototype run for various critical items when appropriate and looked at the effect on the schedule
Close coupling SVX4 chips and hybrids Sensors third driving schedule
Task Description
reduction in
duration (wks) End Date Shift (days)
Nominal Schedule 5/31/2005
89 No second SVX4 prototype -28 5/ 23/ 2005 -8
156 No second L2-5 Hybrid prototype -28 5/ 31/ 2005 0
176 No second Analogue Cable prototype -24 5/ 31/ 2005 0
209 No second Digital Cable prototype -24 5/ 31/ 2005 0
252 No second Twisted Pair prototype -20 5/ 31/ 2005 0
266 No second Adapter Card prototype -24 5/ 31/ 2005 0
76 Production gain at HPK (600 sensors) -12 5/ 31/ 2005 0
All of the above 4/ 25/ 2005 -36
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 37
Expenditures to DateExpenditures to Date
MRI Layer 1 sensors ELMA
$6.0k Layer 1 sensors HPK$65.0k Standalone Seq. $70.0k Analogue Flex cables
» Prototype 1 $6.0k» Prototype 2 $6.0k
Layer 1 hybrids $16.1k» Connectors $2.4» Components $1.6
Mexico setup $80.0k Stony Brook setup $80.0k KSU setup
$80.0k Mexico HV
$200k
FNAL Carbon fiber $5.5k Digital Jumper Cables
» Honeywell $21.5k» Basis Electronics $3.9k» Material $2.0k
Standalone Seq. $10.0k Layer 1 Hybrids
» Layout $2.0k
SiDet CMM$35.0k
SVX4 $54.0k Beampipe $98k
MRI Matching UIC $4k Fresno $7k KU (Ledford) $10k KU Logic analyzer $8k UW $35.5k
Total of ~$910k
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 38
Near Term Start DatesNear Term Start Dates
Selected near- term start dates Start Dates
Produce L0 sensor prototypes 9/ 11/ 01
Procure L1 hybrid prototypes 11/ 29/ 01
Prepare adapter card prototypes 11/ 29/ 01
Prototype support cylinder 11/ 29/ 01
Order L1 preproduction sensors 12/ 12/ 01
Order L2-L5 preproduction sensors 12/ 12/ 01
Beam Tube Order Placed 12/ 19/ 01
Perf orm L0 sensor irradiation testing 1/ 14/ 02
Fabricate prototype stave cores 1/ 16/ 02
Prepare digital jumper cable prototypes 1/ 21/ 02
Produce L2-L5 preproduction sensors 1/ 25/ 02
Produce pre-production analog cables 3/ 27/ 02
Complete resource loaded schedule being prepared Some near term start dates / milestones
Submitted to ELMA
Ready for submission
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 39
Boundary Conditions: spatialBoundary Conditions: spatial
Silicon tracker to be installed within existing fiber tracker, with inner radius of 180 mm
Full tracking coverage Fiber tracker up to || < 1.6 Silicon stand-alone up to || <
2.0 Installation in collision hall
Tracker will be split at z=0 Two independent half-modules Reproducible mount at z=0 Alignment verified at SiDet Installation of beampipe
after tracker installation There will be a 3mm gap from
sensor to sensor at z=0
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 40
Luminous RegionLuminous Region
Addresses uncertainty on evolution of beam size over the course of a store Assumed beam crossing centered at z=0; no uncertainties folded in
Coverage of inner layers of 100 cm results in loss of < ~2% of integrated luminosity
Length of inner layer set at 96 cm
0.84
0.86
0.88
0.9
0.92
0.94
0.96
0.98
1
0 50 100 150 200
Silicon Fiducial Length (cm)
Lu
min
osi
ty A
ccep
tan
ce
3 eV-s40E10/hr
2 eV-s40E10/hr
3 eV-s60E10/hr
2 eV-s60E10/hr
From M. Church
Luminosity acceptance of detector in Run2b running conditions
Longitudinal emittance 2, 3 eV-sec
Stacking rate 40, 60 E10/hr Assumptions:
* = 35 cm Trans. .mm.mrad
0.5 crossing angle 136 rad
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 41
Layer 0 Support StructureLayer 0 Support Structure
Prototype support structure made by University of Washington Crenellated mandrel
» Stacking sequences Cylindrical Shell: 3 ply 0º, 90º, 0º laminate Castellated Shell: 6 ply [0º, +20º, -20º]s laminate
RTV pressure strips, vacuum bag Pressured to 85 psi Cured in autoclave at 275 °F
castellated shell
Measurements and comparisons of elastic properties of prepreg. laminates
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 42
Irradiation StudiesIrradiation Studies
Irradiation studies carried out with ELMA sensors and CDF layer 00 sensors from Hamamatsu and Micron
Measured Ileak, Vdepl
Measurements agree well with other measurements Calculate Ileak, Vdepl and ENC for various Si temperatures to determine
Si running temperature during operation
T = -10C
R(mm) Mrad Vdep(V) IL/strip(nA) ENCL e-
15 19.98 677.90 883.5 900.020 12.32 425.18 544.9 706.830 6.24 224.29 275.7 502.840 3.85 145.42 170.1 394.850 2.64 105.74 116.9 327.460 1.95 82.72 86.1 280.975 1.34 62.65 59.2 232.9
100 0.83 45.78 36.5 182.9145 0.44 35.60 19.5 133.8165 0.36 36.15 15.7 120.1
Conclude that the design value for Silicon operating temperature at the inner layer should be T= -10 oC
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 43
Comparison 2a and 2bComparison 2a and 2b
2a:» Innermost radius 25.7 mm» Outermost radius 94.3 mm
2b:» Innermost radius 17.5 mm » Outermost radius 163.6 mm
End views drawn to scale
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 44
Sensor ProcurementSensor Procurement
Sensor procurement funding profileHPK Elma Total
Month Category Quantity Price/unit, $ Cost, $ Contingency, %Cost+contingency, $Category QuantityPrice/unit, $ Cost, $ Contingency, %Cost+contingency, $11/1/01 L1 NRE 1 54,810.00$ 54,810.00$ 20% 65,772.00$ L1 NRE 1 8,000.00$ 8,000.00$ 20% 9,600.00$ 62,810.00$ 12/1/01 L2 NRE 1 76,734.00$ 76,734.00$ 20% 92,080.80$ L0 prototype 20 350.00$ 7,000.00$ 20% 8,400.00$ 83,734.00$ 1/1/02 L0 NRE 1 54,810.00$ 54,810.00$ 20% 65,772.00$ 1 8,000.00$ 8,000.00$ 20% 9,600.00$ 62,810.00$ 2/1/02 -$ 20% -$ L1 prototype 10 700.00$ 7,000.00$ 20% 8,400.00$ 7,000.00$ 3/1/02 -$ 20% -$ -$ 20% -$ -$ 4/1/02 L1 prototype 10 1,223.66$ 12,236.60$ 20% 14,683.92$ 20% 12,236.60$ 5/1/02 L2 prototype 100 712.75$ 71,275.00$ 20% 85,530.00$ 0 -$ -$ 20% -$ 71,275.00$ 6/1/02 L0 prototype 10 1,159.71$ 11,597.10$ 20% 13,916.52$ 20% 11,597.10$ 7/1/02 L1 production 216 469.45$ 101,401.20$ 20% 121,681.44$ L1 production 0 400.00$ -$ 20% -$ 101,401.20$ 8/1/02 L0 production 216 276.01$ 59,618.16$ 20% 71,541.79$ L0 production 0 250.00$ -$ 20% -$ 59,618.16$ 9/1/02 L2 production 0 -$ -$ 20% -$ L2 production 0 -$ -$ 20% -$ -$
10/1/02 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ FY02 576,714.06$ 20% 692,056.87$ 0 -$ 30,000.00$ 20% 36,000.00$ 606,714.06$
11/1/02 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 12/1/02 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 1/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 2/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 3/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 4/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 5/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 6/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 7/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 8/1/03 L2 production 200 671.16$ 134,232.00$ 20% 161,078.40$ L2 production 0 -$ -$ 20% -$ 134,232.00$ 9/1/03 L2 production -$ 20% -$ L2 production 0 -$ 20% -$ -$
10/1/03 L2 production -$ 20% -$ L2 production -$ 20% -$ -$ FY03 1,342,320.00$ 1,610,784.00$ -$ -$ 1,342,320.00$ FY02+FY03 1,919,034.06$ 2,302,840.87$ 30,000.00$ 36,000.00$ 1,949,034.06$
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 45
Why no 90-degree StereoWhy no 90-degree Stereo
Issues: Due to multiplexing of signals more difficult pattern recognition; more fakes Large incident angles, large number of strips hit
» Preferentially use thinner silicon to partially compensate
Fraction of tracks that have a close neighbor is rather high
» Need to resort to splitting shared clusters Requires double-metal layer; HPK no experience with
dm layers on 6” wafers No definitive answer yet from Run2a data
We have confidence that we can achieve our physics goals with the current design
Of course, 3d-vertex gives additional information, but has to be compared to additional requirements
Complicates design, more sensor types, more testing, probing, more manpower, … DØ made conscientious decision not to adopt 90-degree stereo readout given
manpower and time constraints
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 46
Director's Baseline Review, April 16-18, 2002 - M. Demarteau Slide 47
Sensor8’ Twisted Pair Cable
Interface with current DAQ system
Adapter Card
Junction Card
2’ Digital Cable
Hybrid
AnalogueCable
Hybrid